diff --git a/download b/download index 56a807382861d91123494c185358a5d15217f1a5..74dbd17391f1b89af79f46d0a99d4224dd57216e 100644 --- a/download +++ b/download @@ -1,2 +1,2 @@ -fb02aac10a17256e9e19547bf6e53eff openjdk-jdk17u-jdk-17.0.5+8.tar.xz +0f8e21dbaa54380ecc1673be1b5f97a0 openjdk-17.0.13+11.tar.xz 5d441d6217cc75372ca5a0943997cb24 tapsets-icedtea-6.0.0pre00-c848b93a8598.tar.xz diff --git a/java-17-openjdk.spec b/java-17-openjdk.spec index 2fc1c6fcce7907ff584b6f1abf65159600324943..81dce55b3c7f8516045c5314a5f96257ac567ec1 100644 --- a/java-17-openjdk.spec +++ b/java-17-openjdk.spec @@ -13,7 +13,7 @@ # Only produce a release build on x86_64: # $ fedpkg mockbuild --without slowdebug --without fastdebug -%global anolis_release 4 +%global anolis_release 1 # Enable fastdebug builds by default on relevant arches. %bcond_without fastdebug # Enable slowdebug builds by default on relevant arches. @@ -126,7 +126,6 @@ # Set of architectures which support SystemTap tapsets %global systemtap_arches %{jit_arches} # Set of architectures with a Ahead-Of-Time (AOT) compiler -%global aot_arches x86_64 # Set of architectures which support the serviceability agent %global sa_arches loongarch64 # Set of architectures which support class data sharing @@ -138,9 +137,7 @@ # Set of architectures for which we build the Z garbage collector %global zgc_arches loongarch64 # Set of architectures for which alt-java has SSB mitigation -%global ssbd_arches x86_64 # Set of architectures for which java has short vector math library (libjsvml.so) -%global svml_arches x86_64 # Set of architectures where we verify backtraces with gdb %global gdb_arches %{jit_arches} @@ -268,7 +265,7 @@ # New Version-String scheme-style defines %global featurever 17 %global interimver 0 -%global updatever 5 +%global updatever 13 %global patchver 0 # buildjdkver is usually same as %%{featurever}, # but in time of bootstrap of next jdk, it is featurever-1, @@ -287,13 +284,21 @@ %global icedteaver 6.0.0pre00-c848b93a8598 # Define current Git revision for the FIPS support patches %global fipsver 0bd5ca9ccc5 +%global newjavaver %{featurever}.%{interimver}.%{updatever}.%{patchver} +%global javaver %{featurever} + +# Strip up to 6 trailing zeros in newjavaver, as the JDK does, to get the correct version used in filenames +%global filever %(svn=%{newjavaver}; for i in 1 2 3 4 5 6 ; do svn=${svn%%.0} ; done; echo ${svn}) + +# The tag used to create the OpenJDK tarball +%global vcstag jdk-%{filever}+%{buildver}%{?tagsuffix:-%{tagsuffix}} # Standard JPackage naming and versioning defines %global origin openjdk %global origin_nice OpenJDK -%global top_level_dir_name %{origin} +%global top_level_dir_name %{vcstag} %global top_level_dir_name_backup %{top_level_dir_name}-backup -%global buildver 8 +%global buildver 11 %global rpmrelease 3 # Priority must be 8 digits in total; up to openjdk 1.8, we were using 18..... so when we moved to 11, we had to add another digit %if %is_system_jdk @@ -307,14 +312,6 @@ # for techpreview, using 1, so slowdebugs can have 0 %global priority %( printf '%08d' 1 ) %endif -%global newjavaver %{featurever}.%{interimver}.%{updatever}.%{patchver} -%global javaver %{featurever} - -# Strip up to 6 trailing zeros in newjavaver, as the JDK does, to get the correct version used in filenames -%global filever %(svn=%{newjavaver}; for i in 1 2 3 4 5 6 ; do svn=${svn%%.0} ; done; echo ${svn}) - -# The tag used to create the OpenJDK tarball -%global vcstag jdk-%{filever}+%{buildver}%{?tagsuffix:-%{tagsuffix}} # Define milestone (EA for pre-releases, GA for releases) # Release will be (where N is usually a number starting at 1): @@ -324,7 +321,7 @@ %if %{is_ga} %global build_type GA %global ea_designator "" -%global ea_designator_zip "" +%global ea_designator_zip %{nil} %global extraver %{nil} %global eaprefix %{nil} %else @@ -781,10 +778,6 @@ exit 0 %{_jvmdir}/%{sdkdir -- %{?1}}/lib/libsaproc.so %endif %{_jvmdir}/%{sdkdir -- %{?1}}/lib/libsctp.so -%{_jvmdir}/%{sdkdir -- %{?1}}/lib/libsystemconf.so -%ifarch %{svml_arches} -%{_jvmdir}/%{sdkdir -- %{?1}}/lib/libjsvml.so -%endif %{_jvmdir}/%{sdkdir -- %{?1}}/lib/libsyslookup.so %{_jvmdir}/%{sdkdir -- %{?1}}/lib/libverify.so %{_jvmdir}/%{sdkdir -- %{?1}}/lib/libzip.so @@ -1187,7 +1180,7 @@ URL: http://openjdk.java.net/ # The source tarball, generated using generate_source_tarball.sh -Source0: openjdk-jdk%{featurever}u-%{vcstag}.tar.xz +Source0: https://openjdk-sources.osci.io/openjdk%{featurever}/open%{vcstag}%{ea_designator_zip}.tar.xz # Use 'icedtea_sync.sh' to update the following # They are based on code contained in the IcedTea project (6.x). @@ -1673,27 +1666,34 @@ sh %{SOURCE12} %{top_level_dir_name} # Patch the JDK pushd %{top_level_dir_name} -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch6 -p1 +# This syntax is deprecated: +# %patchN [...] +# and should be replaced with: +# %patch -PN [...] +# For example: +# %patch1001 -p1 +# becomes: +# %patch -P1001 -p1 +# The replacement format suggested by recent (circa Fedora 38) RPM +# deprecation messages: +# %patch N [...] +# is not backward-compatible with prior (circa RHEL-8) versions of +# rpmbuild. +%patch -P1 -p1 +%patch -P6 -p1 # Add crypto policy and FIPS support -%patch1001 -p1 +%ifnarch loongarch64 +%patch -P1001 -p1 # nss.cfg PKCS11 support; must come last as it also alters java.security -%patch1000 -p1 -# tzdata updates targetted for 17.0.6 -%patch2001 -p1 -%patch2002 -p1 -%patch2003 -p1 +%patch -P1000 -p1 +%endif +# alt-java support +%patch -P600 -p1 %ifarch loongarch64 -%patch3000 -p1 +%patch -P3000 -p1 %endif popd # openjdk -%patch600 - -%patch2000 - # The OpenJDK version file includes the current # upstream version information. For some reason, # configure does not automatically use the @@ -2013,21 +2013,19 @@ $JAVA_HOME/bin/java $(echo $(basename %{SOURCE14})|sed "s|\.java||") # Check system crypto (policy) is active and can be disabled # Test takes a single argument - true or false - to state whether system # security properties are enabled or not. +%ifnarch loongarch64 $JAVA_HOME/bin/javac -d . %{SOURCE15} export PROG=$(echo $(basename %{SOURCE15})|sed "s|\.java||") export SEC_DEBUG="-Djava.security.debug=properties" $JAVA_HOME/bin/java ${SEC_DEBUG} ${PROG} true $JAVA_HOME/bin/java ${SEC_DEBUG} -Djava.security.disableSystemPropertiesFile=true ${PROG} false +%endif # Check java launcher has no SSB mitigation if ! nm $JAVA_HOME/bin/java | grep set_speculation ; then true ; else false; fi # Check alt-java launcher has SSB mitigation on supported architectures -%ifarch %{ssbd_arches} -nm $JAVA_HOME/bin/%{alt_java_name} | grep set_speculation -%else if ! nm $JAVA_HOME/bin/%{alt_java_name} | grep set_speculation ; then true ; else false; fi -%endif # Check translations are available for new timezones %ifnarch loongarch64 @@ -2493,6 +2491,9 @@ require "copy_jdk_configs.lua" %endif %changelog +* Sat Nov 15 2024 Pan Xuefeng - 1:17.0.13.0.11-1 +- upgrade LoongArch64 port to 17.0.13 + * Thu Nov 09 2023 Leslie Zhai - 1:17.0.5.0.8-4 - Disable gdb diff --git a/jdk17-LoongArch64.patch b/jdk17-LoongArch64.patch index dc1f45d5c5b6bfb487dd031228e28c1b0c126421..7e82ad59e361a07f216e96e94b8d4820949c7ee7 100644 --- a/jdk17-LoongArch64.patch +++ b/jdk17-LoongArch64.patch @@ -1,6 +1,13 @@ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/jvm-features.m4 jdk17u-ls/make/autoconf/jvm-features.m4 ---- openjdk/make/autoconf/jvm-features.m4 2022-10-13 03:49:17.000000000 +0800 -+++ jdk17u-ls/make/autoconf/jvm-features.m4 2023-11-01 10:27:44.201760755 +0800 +commit a5f77c9ba79081dcfcd7e6a8864895b1310a3988 +Author: panxuefeng +Date: Sat Nov 16 14:26:22 2024 +0800 + + 17.0.13.11 + +diff --git a/make/autoconf/jvm-features.m4 b/make/autoconf/jvm-features.m4 +index aa99b037b..d0c3a8575 100644 +--- a/make/autoconf/jvm-features.m4 ++++ b/make/autoconf/jvm-features.m4 @@ -23,6 +23,12 @@ # questions. # @@ -14,10 +21,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/jvm-features ############################################################################### # Terminology used in this file: # -@@ -243,6 +249,23 @@ +@@ -242,6 +248,23 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_CDS], + ]) ]) - ############################################################################### ++############################################################################### +# Check if the feature 'compiler1' is available on this platform. +# +AC_DEFUN_ONCE([JVM_FEATURES_CHECK_COMPILER1], @@ -34,11 +42,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/jvm-features + ]) +]) + -+############################################################################### + ############################################################################### # Check if the feature 'dtrace' is available on this platform. # - AC_DEFUN_ONCE([JVM_FEATURES_CHECK_DTRACE], -@@ -292,6 +315,8 @@ +@@ -295,6 +318,8 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_JVMCI], AC_MSG_RESULT([yes]) elif test "x$OPENJDK_TARGET_CPU" = "xaarch64"; then AC_MSG_RESULT([yes]) @@ -47,17 +54,17 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/jvm-features else AC_MSG_RESULT([no, $OPENJDK_TARGET_CPU]) AVAILABLE=false -@@ -308,7 +333,8 @@ - AC_MSG_CHECKING([if platform is supported by Shenandoah]) +@@ -312,7 +337,8 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_SHENANDOAHGC], if test "x$OPENJDK_TARGET_CPU_ARCH" = "xx86" || \ test "x$OPENJDK_TARGET_CPU" = "xaarch64" || \ -- test "x$OPENJDK_TARGET_CPU" = "xppc64le"; then -+ test "x$OPENJDK_TARGET_CPU" = "xppc64le" || \ + test "x$OPENJDK_TARGET_CPU" = "xppc64le" || \ +- test "x$OPENJDK_TARGET_CPU" = "xriscv64"; then ++ test "x$OPENJDK_TARGET_CPU" = "xriscv64" || \ + test "x$OPENJDK_TARGET_CPU" = "xloongarch64"; then AC_MSG_RESULT([yes]) else AC_MSG_RESULT([no, $OPENJDK_TARGET_CPU]) -@@ -365,6 +391,13 @@ +@@ -370,6 +396,13 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_ZGC], AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) AVAILABLE=false fi @@ -71,7 +78,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/jvm-features else AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) AVAILABLE=false -@@ -399,6 +432,7 @@ +@@ -404,6 +437,7 @@ AC_DEFUN_ONCE([JVM_FEATURES_PREPARE_PLATFORM], # JVM_FEATURES_PLATFORM_UNAVAILABLE. JVM_FEATURES_CHECK_CDS @@ -79,9 +86,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/jvm-features JVM_FEATURES_CHECK_DTRACE JVM_FEATURES_CHECK_JFR JVM_FEATURES_CHECK_JVMCI -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 jdk17u-ls/make/autoconf/platform.m4 ---- openjdk/make/autoconf/platform.m4 2022-10-13 03:49:17.000000000 +0800 -+++ jdk17u-ls/make/autoconf/platform.m4 2023-11-01 10:27:44.201760755 +0800 +diff --git a/make/autoconf/platform.m4 b/make/autoconf/platform.m4 +index eb6626626..931434c4e 100644 +--- a/make/autoconf/platform.m4 ++++ b/make/autoconf/platform.m4 @@ -23,6 +23,12 @@ # questions. # @@ -95,7 +103,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 # Support macro for PLATFORM_EXTRACT_TARGET_AND_BUILD. # Converts autoconf style CPU name to OpenJDK style, into # VAR_CPU, VAR_CPU_ARCH, VAR_CPU_BITS and VAR_CPU_ENDIAN. -@@ -539,11 +545,26 @@ +@@ -539,11 +545,26 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS_HELPER], HOTSPOT_$1_CPU=ppc_64 elif test "x$OPENJDK_$1_CPU" = xppc64le; then HOTSPOT_$1_CPU=ppc_64 @@ -122,10 +130,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 AC_SUBST(HOTSPOT_$1_CPU_ARCH) # Setup HOTSPOT_$1_CPU_DEFINE -@@ -561,6 +582,12 @@ - HOTSPOT_$1_CPU_DEFINE=PPC64 - elif test "x$OPENJDK_$1_CPU" = xppc64le; then +@@ -563,6 +584,12 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS_HELPER], HOTSPOT_$1_CPU_DEFINE=PPC64 + elif test "x$OPENJDK_$1_CPU" = xriscv64; then + HOTSPOT_$1_CPU_DEFINE=RISCV64 + elif test "x$OPENJDK_$1_CPU" = xmips64; then + HOTSPOT_$1_CPU_DEFINE=MIPS64 + elif test "x$OPENJDK_$1_CPU" = xmips64el; then @@ -135,225 +143,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/make/autoconf/platform.m4 # The cpu defines below are for zero, we don't support them directly. elif test "x$OPENJDK_$1_CPU" = xsparc; then -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp jdk17u-ls/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/aarch64/c1_LIR_aarch64.cpp 2023-11-01 10:27:44.253760817 +0800 -@@ -52,3 +52,24 @@ - "wrong type for addresses"); - } - #endif // PRODUCT -+ -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info) { -+ cmp(condition, left, right, info); -+ branch(condition, tgt); -+} -+ -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, CodeStub*, CodeEmitInfo*); -+ -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, block, unordered); -+} -+ -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp jdk17u-ls/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2023-11-01 10:27:44.253760817 +0800 -@@ -1121,7 +1121,9 @@ - } - } - -- -+void LIR_Assembler::emit_opCmpBranch(LIR_OpCmpBranch* op) { -+ ShouldNotReachHere(); -+} - - void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { - LIR_Opr src = op->in_opr(); -@@ -1660,6 +1662,10 @@ - __ csel(result->as_register(), opr1->as_register(), opr2->as_register(), acond); - } - -+void LIR_Assembler::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type) { -+ ShouldNotReachHere(); -+} -+ - void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { - assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp jdk17u-ls/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp 2023-11-01 10:27:44.253760817 +0800 -@@ -278,18 +278,29 @@ - __ store(reg, addr); - } - --void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, T tgt, CodeEmitInfo* info) { - LIR_Opr reg = new_register(T_INT); - __ load(generate_address(base, disp, T_INT), reg, info); -- __ cmp(condition, reg, LIR_OprFact::intConst(c)); -+ __ cmp_branch(condition, reg, LIR_OprFact::intConst(c), tgt); - } - --void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, CodeStub*, CodeEmitInfo*); -+ -+template -+void LIRGenerator::cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, T tgt, CodeEmitInfo* info) { - LIR_Opr reg1 = new_register(T_INT); - __ load(generate_address(base, disp, type), reg1, info); -- __ cmp(condition, reg, reg1); -+ __ cmp_branch(condition, reg, reg1, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, CodeStub*, CodeEmitInfo*); - - bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp jdk17u-ls/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp ---- openjdk/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp 2023-11-01 10:27:44.253760817 +0800 -@@ -209,7 +209,8 @@ - #define __ ce->masm()-> - - void ZBarrierSetAssembler::generate_c1_load_barrier_test(LIR_Assembler* ce, -- LIR_Opr ref) const { -+ LIR_Opr ref, -+ LIR_Opr res) const { - assert_different_registers(rscratch1, rthread, ref->as_register()); - - __ ldr(rscratch1, address_bad_mask_from_thread(rthread)); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.hpp jdk17u-ls/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.hpp ---- openjdk/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.hpp 2023-11-01 10:27:44.253760817 +0800 -@@ -79,7 +79,8 @@ - - #ifdef COMPILER1 - void generate_c1_load_barrier_test(LIR_Assembler* ce, -- LIR_Opr ref) const; -+ LIR_Opr ref, -+ LIR_Opr res) const; - - void generate_c1_load_barrier_stub(LIR_Assembler* ce, - ZLoadBarrierStubC1* stub) const; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.hpp jdk17u-ls/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.hpp ---- openjdk/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.hpp 2023-11-01 10:27:44.257760822 +0800 -@@ -28,6 +28,8 @@ - const size_t ZPlatformHeapViews = 3; - const size_t ZPlatformCacheLineSize = 64; - -+const bool ZPlatformLoadBarrierTestResultInRegister = false; -+ - size_t ZPlatformAddressOffsetBits(); - size_t ZPlatformAddressMetadataShift(); - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIR_arm.cpp jdk17u-ls/src/hotspot/cpu/arm/c1_LIR_arm.cpp ---- openjdk/src/hotspot/cpu/arm/c1_LIR_arm.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/arm/c1_LIR_arm.cpp 2023-11-01 10:27:44.265760831 +0800 -@@ -62,3 +62,24 @@ - #endif - } - #endif // PRODUCT -+ -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info) { -+ cmp(condition, left, right, info); -+ branch(condition, tgt); -+} -+ -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, CodeStub*, CodeEmitInfo*); -+ -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, block, unordered); -+} -+ -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp jdk17u-ls/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp ---- openjdk/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp 2023-11-01 10:27:44.265760831 +0800 -@@ -899,6 +899,9 @@ - __ b(*(op->label()), acond); - } - -+void LIR_Assembler::emit_opCmpBranch(LIR_OpCmpBranch* op) { -+ ShouldNotReachHere(); -+} - - void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { - LIR_Opr src = op->in_opr(); -@@ -1495,6 +1498,10 @@ - } - } - -+void LIR_Assembler::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type) { -+ ShouldNotReachHere(); -+} -+ - #ifdef ASSERT - static int reg_size(LIR_Opr op) { - switch (op->type()) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp jdk17u-ls/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp ---- openjdk/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/arm/c1_LIRGenerator_arm.cpp 2023-11-01 10:27:44.265760831 +0800 -@@ -313,18 +313,27 @@ - __ move(temp, addr); - } - -- --void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, T tgt, CodeEmitInfo* info) { - __ load(new LIR_Address(base, disp, T_INT), FrameMap::LR_opr, info); -- __ cmp(condition, FrameMap::LR_opr, c); -+ __ cmp_branch(condition, FrameMap::LR_opr, c, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, CodeStub*, CodeEmitInfo*); - --void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, T tgt, CodeEmitInfo* info) { - __ load(new LIR_Address(base, disp, type), FrameMap::LR_opr, info); -- __ cmp(condition, reg, FrameMap::LR_opr); -+ __ cmp_branch(condition, reg, FrameMap::LR_opr, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, CodeStub*, CodeEmitInfo*); - - bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { - assert(left != result, "should be different registers"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp 2023-09-08 09:39:50.357842028 +0800 +diff --git a/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp +new file mode 100644 +index 000000000..fbcd4050b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -488,9 +282,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + *interpreter_frame->interpreter_frame_mirror_addr() = method->method_holder()->java_mirror(); +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.cpp 2023-09-08 09:39:50.357842028 +0800 +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.cpp b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp +new file mode 100644 +index 000000000..e6e62ccca +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp @@ -0,0 +1,849 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -1341,10 +1137,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.hpp 2023-11-01 10:27:44.273760841 +0800 -@@ -0,0 +1,2812 @@ +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp +new file mode 100644 +index 000000000..5eae8b999 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp +@@ -0,0 +1,2831 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -2543,6 +2341,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + stptr_w_op = 0b00100101, + ldptr_d_op = 0b00100110, + stptr_d_op = 0b00100111, ++ csr_op = 0b00000100, + + unknow_ops8 = 0b11111111 + }; @@ -2639,6 +2438,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static int high6 (int x) { return high(x, 6); } + + ++ static ALWAYSINLINE void patch(address a, int length, uint32_t val) { ++ guarantee(val < (1ULL << length), "Field too big for insn"); ++ guarantee(length > 0, "length > 0"); ++ unsigned target = *(unsigned *)a; ++ target = (target >> length) << length; ++ target |= val; ++ *(unsigned *)a = target; ++ } ++ + protected: + // help methods for instruction ejection + @@ -3202,6 +3010,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void stptr_w (Register rd, Register rj, int si16) { assert(is_simm(si16, 16) && ((si16 & 0x3) == 0), "not a signed 16-bit int"); emit_int32(insn_I14RR(stptr_w_op, si16>>2, (int)rj->encoding(), (int)rd->encoding())); } + void ldptr_d (Register rd, Register rj, int si16) { assert(is_simm(si16, 16) && ((si16 & 0x3) == 0), "not a signed 16-bit int"); emit_int32(insn_I14RR(ldptr_d_op, si16>>2, (int)rj->encoding(), (int)rd->encoding())); } + void stptr_d (Register rd, Register rj, int si16) { assert(is_simm(si16, 16) && ((si16 & 0x3) == 0), "not a signed 16-bit int"); emit_int32(insn_I14RR(stptr_d_op, si16>>2, (int)rj->encoding(), (int)rd->encoding())); } ++ void csrrd (Register rd, int csr) { emit_int32(insn_I14RR(csr_op, csr, 0, (int)rd->encoding())); } ++ void csrwr (Register rd, int csr) { emit_int32(insn_I14RR(csr_op, csr, 1, (int)rd->encoding())); } + + void ld_b (Register rd, Register rj, int si12) { assert(is_simm(si12, 12), "not a signed 12-bit int"); emit_int32(insn_I12RR(ld_b_op, si12, (int)rj->encoding(), (int)rd->encoding())); } + void ld_h (Register rd, Register rj, int si12) { assert(is_simm(si12, 12), "not a signed 12-bit int"); emit_int32(insn_I12RR(ld_h_op, si12, (int)rj->encoding(), (int)rd->encoding())); } @@ -3375,18 +3185,25 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void bceqz(ConditionalFlagRegister cj, Label& L) { bceqz(cj, target(L)); } + void bcnez(ConditionalFlagRegister cj, Label& L) { bcnez(cj, target(L)); } + -+ // Now Membar_mask_bits is 0,Need to fix it after LA6000 + typedef enum { -+ StoreStore = 0, -+ LoadStore = 0, -+ StoreLoad = 0, -+ LoadLoad = 0, -+ AnyAny = 0 ++ // hint[4] ++ Completion = 0, ++ Ordering = (1 << 4), ++ ++ // The bitwise-not of the below constants is corresponding to the hint. This is convenient for OR operation. ++ // hint[3:2] and hint[1:0] ++ LoadLoad = ((1 << 3) | (1 << 1)), ++ LoadStore = ((1 << 3) | (1 << 0)), ++ StoreLoad = ((1 << 2) | (1 << 1)), ++ StoreStore = ((1 << 2) | (1 << 0)), ++ AnyAny = ((3 << 2) | (3 << 0)), + } Membar_mask_bits; + + // Serializes memory and blows flags + void membar(Membar_mask_bits hint) { -+ dbar(hint); ++ assert((hint & (3 << 0)) != 0, "membar mask unsupported!"); ++ assert((hint & (3 << 2)) != 0, "membar mask unsupported!"); ++ dbar(Ordering | (~hint & 0xf)); + } + + // LSX and LASX @@ -4157,9 +3974,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_ASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp jdk17u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp +new file mode 100644 +index 000000000..9ca0cd450 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp @@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4194,9 +4013,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "code/codeCache.hpp" + +#endif // CPU_LOONGARCH_ASSEMBLER_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/bytes_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/bytes_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/bytes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/bytes_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/bytes_loongarch.hpp b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp +new file mode 100644 +index 000000000..c15344eb3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp @@ -0,0 +1,73 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4271,9 +4092,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include OS_CPU_HEADER_INLINE(bytes) + +#endif // CPU_LOONGARCH_BYTES_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp +new file mode 100644 +index 000000000..663a9aec2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp @@ -0,0 +1,360 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -4635,9 +4458,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#undef __ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp +new file mode 100644 +index 000000000..1140e4443 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. @@ -4718,9 +4543,49 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_C1_DEFS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp +new file mode 100644 +index 000000000..047412d03 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp +@@ -0,0 +1,32 @@ ++/* ++ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++ ++// No FPU stack on LoongArch ++class FpuStackSim; ++ ++#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp +new file mode 100644 +index 000000000..1a89c437a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved. @@ -4753,12 +4618,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +// No FPU stack on LoongArch64 +#include "precompiled.hpp" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,32 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp +new file mode 100644 +index 000000000..4f0cf0536 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp +@@ -0,0 +1,143 @@ +/* -+ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -4782,16 +4649,129 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP + -+// No FPU stack on LoongArch -+class FpuStackSim; ++// On LoongArch64 the frame looks as follows: ++// ++// +-----------------------------+---------+----------------------------------------+----------------+----------- ++// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . ++// +-----------------------------+---------+----------------------------------------+----------------+----------- + -+#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp 2023-09-08 09:39:50.361842033 +0800 ++ public: ++ static const int pd_c_runtime_reserved_arg_size; ++ ++ enum { ++ first_available_sp_in_frame = 0, ++ frame_pad_in_bytes = 16, ++ nof_reg_args = 8 ++ }; ++ ++ public: ++ static LIR_Opr receiver_opr; ++ ++ static LIR_Opr r0_opr; ++ static LIR_Opr ra_opr; ++ static LIR_Opr tp_opr; ++ static LIR_Opr sp_opr; ++ static LIR_Opr a0_opr; ++ static LIR_Opr a1_opr; ++ static LIR_Opr a2_opr; ++ static LIR_Opr a3_opr; ++ static LIR_Opr a4_opr; ++ static LIR_Opr a5_opr; ++ static LIR_Opr a6_opr; ++ static LIR_Opr a7_opr; ++ static LIR_Opr t0_opr; ++ static LIR_Opr t1_opr; ++ static LIR_Opr t2_opr; ++ static LIR_Opr t3_opr; ++ static LIR_Opr t4_opr; ++ static LIR_Opr t5_opr; ++ static LIR_Opr t6_opr; ++ static LIR_Opr t7_opr; ++ static LIR_Opr t8_opr; ++ static LIR_Opr rx_opr; ++ static LIR_Opr fp_opr; ++ static LIR_Opr s0_opr; ++ static LIR_Opr s1_opr; ++ static LIR_Opr s2_opr; ++ static LIR_Opr s3_opr; ++ static LIR_Opr s4_opr; ++ static LIR_Opr s5_opr; ++ static LIR_Opr s6_opr; ++ static LIR_Opr s7_opr; ++ static LIR_Opr s8_opr; ++ ++ static LIR_Opr ra_oop_opr; ++ static LIR_Opr a0_oop_opr; ++ static LIR_Opr a1_oop_opr; ++ static LIR_Opr a2_oop_opr; ++ static LIR_Opr a3_oop_opr; ++ static LIR_Opr a4_oop_opr; ++ static LIR_Opr a5_oop_opr; ++ static LIR_Opr a6_oop_opr; ++ static LIR_Opr a7_oop_opr; ++ static LIR_Opr t0_oop_opr; ++ static LIR_Opr t1_oop_opr; ++ static LIR_Opr t2_oop_opr; ++ static LIR_Opr t3_oop_opr; ++ static LIR_Opr t4_oop_opr; ++ static LIR_Opr t5_oop_opr; ++ static LIR_Opr t6_oop_opr; ++ static LIR_Opr t7_oop_opr; ++ static LIR_Opr t8_oop_opr; ++ static LIR_Opr fp_oop_opr; ++ static LIR_Opr s0_oop_opr; ++ static LIR_Opr s1_oop_opr; ++ static LIR_Opr s2_oop_opr; ++ static LIR_Opr s3_oop_opr; ++ static LIR_Opr s4_oop_opr; ++ static LIR_Opr s5_oop_opr; ++ static LIR_Opr s6_oop_opr; ++ static LIR_Opr s7_oop_opr; ++ static LIR_Opr s8_oop_opr; ++ ++ static LIR_Opr scr1_opr; ++ static LIR_Opr scr2_opr; ++ static LIR_Opr scr1_long_opr; ++ static LIR_Opr scr2_long_opr; ++ ++ static LIR_Opr a0_metadata_opr; ++ static LIR_Opr a1_metadata_opr; ++ static LIR_Opr a2_metadata_opr; ++ static LIR_Opr a3_metadata_opr; ++ static LIR_Opr a4_metadata_opr; ++ static LIR_Opr a5_metadata_opr; ++ ++ static LIR_Opr long0_opr; ++ static LIR_Opr long1_opr; ++ static LIR_Opr fpu0_float_opr; ++ static LIR_Opr fpu0_double_opr; ++ ++ static LIR_Opr as_long_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ static LIR_Opr as_pointer_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ ++ // VMReg name for spilled physical FPU stack slot n ++ static VMReg fpu_regname (int n); ++ ++ static bool is_caller_save_register(LIR_Opr opr) { return true; } ++ static bool is_caller_save_register(Register r) { return true; } ++ ++ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } ++ static int last_cpu_reg() { return pd_last_cpu_reg; } ++ static int last_byte_reg() { return pd_last_byte_reg; } ++ ++#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp +new file mode 100644 +index 000000000..8d439fda0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp @@ -0,0 +1,362 @@ +/* + * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. @@ -5155,157 +5135,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +bool FrameMap::validate_frame() { + return true; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,143 @@ -+/* -+ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+ -+// On LoongArch64 the frame looks as follows: -+// -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+ -+ public: -+ static const int pd_c_runtime_reserved_arg_size; -+ -+ enum { -+ first_available_sp_in_frame = 0, -+ frame_pad_in_bytes = 16, -+ nof_reg_args = 8 -+ }; -+ -+ public: -+ static LIR_Opr receiver_opr; -+ -+ static LIR_Opr r0_opr; -+ static LIR_Opr ra_opr; -+ static LIR_Opr tp_opr; -+ static LIR_Opr sp_opr; -+ static LIR_Opr a0_opr; -+ static LIR_Opr a1_opr; -+ static LIR_Opr a2_opr; -+ static LIR_Opr a3_opr; -+ static LIR_Opr a4_opr; -+ static LIR_Opr a5_opr; -+ static LIR_Opr a6_opr; -+ static LIR_Opr a7_opr; -+ static LIR_Opr t0_opr; -+ static LIR_Opr t1_opr; -+ static LIR_Opr t2_opr; -+ static LIR_Opr t3_opr; -+ static LIR_Opr t4_opr; -+ static LIR_Opr t5_opr; -+ static LIR_Opr t6_opr; -+ static LIR_Opr t7_opr; -+ static LIR_Opr t8_opr; -+ static LIR_Opr rx_opr; -+ static LIR_Opr fp_opr; -+ static LIR_Opr s0_opr; -+ static LIR_Opr s1_opr; -+ static LIR_Opr s2_opr; -+ static LIR_Opr s3_opr; -+ static LIR_Opr s4_opr; -+ static LIR_Opr s5_opr; -+ static LIR_Opr s6_opr; -+ static LIR_Opr s7_opr; -+ static LIR_Opr s8_opr; -+ -+ static LIR_Opr ra_oop_opr; -+ static LIR_Opr a0_oop_opr; -+ static LIR_Opr a1_oop_opr; -+ static LIR_Opr a2_oop_opr; -+ static LIR_Opr a3_oop_opr; -+ static LIR_Opr a4_oop_opr; -+ static LIR_Opr a5_oop_opr; -+ static LIR_Opr a6_oop_opr; -+ static LIR_Opr a7_oop_opr; -+ static LIR_Opr t0_oop_opr; -+ static LIR_Opr t1_oop_opr; -+ static LIR_Opr t2_oop_opr; -+ static LIR_Opr t3_oop_opr; -+ static LIR_Opr t4_oop_opr; -+ static LIR_Opr t5_oop_opr; -+ static LIR_Opr t6_oop_opr; -+ static LIR_Opr t7_oop_opr; -+ static LIR_Opr t8_oop_opr; -+ static LIR_Opr fp_oop_opr; -+ static LIR_Opr s0_oop_opr; -+ static LIR_Opr s1_oop_opr; -+ static LIR_Opr s2_oop_opr; -+ static LIR_Opr s3_oop_opr; -+ static LIR_Opr s4_oop_opr; -+ static LIR_Opr s5_oop_opr; -+ static LIR_Opr s6_oop_opr; -+ static LIR_Opr s7_oop_opr; -+ static LIR_Opr s8_oop_opr; -+ -+ static LIR_Opr scr1_opr; -+ static LIR_Opr scr2_opr; -+ static LIR_Opr scr1_long_opr; -+ static LIR_Opr scr2_long_opr; -+ -+ static LIR_Opr a0_metadata_opr; -+ static LIR_Opr a1_metadata_opr; -+ static LIR_Opr a2_metadata_opr; -+ static LIR_Opr a3_metadata_opr; -+ static LIR_Opr a4_metadata_opr; -+ static LIR_Opr a5_metadata_opr; -+ -+ static LIR_Opr long0_opr; -+ static LIR_Opr long1_opr; -+ static LIR_Opr fpu0_float_opr; -+ static LIR_Opr fpu0_double_opr; -+ -+ static LIR_Opr as_long_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ static LIR_Opr as_pointer_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ -+ // VMReg name for spilled physical FPU stack slot n -+ static VMReg fpu_regname (int n); -+ -+ static bool is_caller_save_register(LIR_Opr opr) { return true; } -+ static bool is_caller_save_register(Register r) { return true; } -+ -+ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } -+ static int last_cpu_reg() { return pd_last_cpu_reg; } -+ static int last_byte_reg() { return pd_last_byte_reg; } -+ -+#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,65 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp +new file mode 100644 +index 000000000..baadeebb2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp +@@ -0,0 +1,84 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -5331,161 +5166,71 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP + -+#include "utilities/globalDefinitions.hpp" -+#include "utilities/macros.hpp" ++// ArrayCopyStub needs access to bailout ++friend class ArrayCopyStub; + -+// Sets the default values for platform dependent flags used by the client compiler. -+// (see c1_globals.hpp) ++ private: ++ int array_element_size(BasicType type) const; + -+#ifndef COMPILER2 -+define_pd_global(bool, BackgroundCompilation, true ); -+define_pd_global(bool, InlineIntrinsics, true ); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, false); -+define_pd_global(bool, UseOnStackReplacement, true ); -+define_pd_global(bool, TieredCompilation, false); -+define_pd_global(intx, CompileThreshold, 1500 ); ++ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, ++ int dest_index, bool pop_fpu_stack); + -+define_pd_global(intx, OnStackReplacePercentage, 933 ); -+define_pd_global(intx, NewSizeThreadIncrease, 4*K ); -+define_pd_global(intx, InitialCodeCacheSize, 160*K); -+define_pd_global(intx, ReservedCodeCacheSize, 32*M ); -+define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); -+define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(bool, ProfileInterpreter, false); -+define_pd_global(intx, CodeCacheExpansionSize, 32*K ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 1); -+define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); -+define_pd_global(bool, NeverActAsServerClassMachine, true ); -+define_pd_global(uint64_t,MaxRAM, 1ULL*G); -+define_pd_global(bool, CICompileOSR, true ); -+#endif // !COMPILER2 -+define_pd_global(bool, UseTypeProfile, false); ++ // helper functions which checks for overflow and sets bailout if it ++ // occurs. Always returns a valid embeddable pointer but in the ++ // bailout case the pointer won't be to unique storage. ++ address float_constant(float f); ++ address double_constant(double d); + -+define_pd_global(bool, OptimizeSinglePrecision, true ); -+define_pd_global(bool, CSEArrayLength, false); -+define_pd_global(bool, TwoOperandLIRForm, false ); ++ address int_constant(jlong n); + -+#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,33 @@ -+/* -+ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ bool is_literal_address(LIR_Address* addr); + -+#include "precompiled.hpp" -+#include "c1/c1_Instruction.hpp" -+#include "c1/c1_LinearScan.hpp" -+#include "utilities/bitMap.inline.hpp" ++ // Ensure we have a valid Address (base+offset) to a stack-slot. ++ Address stack_slot_address(int index, uint shift, int adjust = 0); + -+void LinearScan::allocate_fpu_stack() { -+ // No FPU stack on LoongArch64 -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,70 @@ -+/* -+ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ // Record the type of the receiver in ReceiverTypeData ++ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, ++ Register recv, Label* update_done); ++ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); + -+#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++ void casw(Register addr, Register newval, Register cmpval, bool sign); ++ void casl(Register addr, Register newval, Register cmpval); + -+inline bool LinearScan::is_processed_reg_num(int reg_num) { -+ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; -+} ++ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); + -+inline int LinearScan::num_physical_regs(BasicType type) { -+ return 1; -+} ++ static const int max_tableswitches = 20; ++ struct tableswitch switches[max_tableswitches]; ++ int tableswitch_count; + -+inline bool LinearScan::requires_adjacent_regs(BasicType type) { -+ return false; -+} ++ void init() { tableswitch_count = 0; } + -+inline bool LinearScan::is_caller_save(int assigned_reg) { -+ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); -+ if (assigned_reg < pd_first_callee_saved_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) -+ return true; -+ return false; -+} ++ void deoptimize_trap(CodeEmitInfo *info); + -+inline void LinearScan::pd_add_temps(LIR_Op* op) {} ++ void emit_cmp_branch(LIR_OpBranch* op); + -+// Implementation of LinearScanWalker -+inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { -+ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { -+ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); -+ _first_reg = pd_first_callee_saved_reg; -+ _last_reg = pd_last_callee_saved_reg; -+ return true; -+ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || -+ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { -+ _first_reg = pd_first_cpu_reg; -+ _last_reg = pd_last_allocatable_cpu_reg; -+ return true; -+ } -+ return false; -+} ++ enum { ++ // call stub: CompiledStaticCall::to_interp_stub_size() + ++ // CompiledStaticCall::to_trampoline_stub_size() ++ _call_stub_size = 13 * NativeInstruction::nop_instruction_size, ++ _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), ++ _deopt_handler_size = 7 * NativeInstruction::nop_instruction_size ++ }; + -+#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp 2023-11-01 10:27:44.273760841 +0800 -@@ -0,0 +1,3382 @@ ++public: ++ void store_parameter(Register r, int offset_from_sp_in_words); ++ void store_parameter(jint c, int offset_from_sp_in_words); ++ void store_parameter(jobject c, int offset_from_sp_in_words); ++ ++#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp +new file mode 100644 +index 000000000..cde86e3b3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp +@@ -0,0 +1,3402 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -6378,14 +6123,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ ld_ptr(dest->as_register(), as_Address(from_addr)); + break; + case T_ADDRESS: -+ // FIXME: OMG this is a horrible kludge. Any offset from an -+ // address that matches klass_offset_in_bytes() will be loaded -+ // as a word, not a long. -+ if (UseCompressedClassPointers && addr->disp() == oopDesc::klass_offset_in_bytes()) { -+ __ ld_wu(dest->as_register(), as_Address(from_addr)); -+ } else { -+ __ ld_ptr(dest->as_register(), as_Address(from_addr)); -+ } ++ __ ld_ptr(dest->as_register(), as_Address(from_addr)); + break; + case T_INT: + __ ld_w(dest->as_register(), as_Address(from_addr)); @@ -6418,10 +6156,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // Load barrier has not yet been applied, so ZGC can't verify the oop here + __ verify_oop(dest->as_register()); + } -+ } else if (type == T_ADDRESS && addr->disp() == oopDesc::klass_offset_in_bytes()) { -+ if (UseCompressedClassPointers) { -+ __ decode_klass_not_null(dest->as_register()); -+ } + } +} + @@ -6455,19 +6189,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#ifdef ASSERT + assert(op->block() == NULL || op->block()->label() == op->label(), "wrong label"); + if (op->block() != NULL) _branch_target_blocks.append(op->block()); -+ assert(op->cond() == lir_cond_always, "must be"); +#endif + -+ if (op->info() != NULL) -+ add_debug_info_for_branch(op->info()); ++ if (op->cond() == lir_cond_always) { ++ if (op->info() != NULL) ++ add_debug_info_for_branch(op->info()); + -+ __ b_far(*(op->label())); ++ __ b_far(*(op->label())); ++ } else { ++ emit_cmp_branch(op); ++ } +} + -+void LIR_Assembler::emit_opCmpBranch(LIR_OpCmpBranch* op) { ++void LIR_Assembler::emit_cmp_branch(LIR_OpBranch* op) { +#ifdef ASSERT -+ assert(op->block() == NULL || op->block()->label() == op->label(), "wrong label"); -+ if (op->block() != NULL) _branch_target_blocks.append(op->block()); + if (op->ublock() != NULL) _branch_target_blocks.append(op->ublock()); +#endif + @@ -6483,7 +6218,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + LIR_Opr opr2 = op->in_opr2(); + assert(op->condition() != lir_cond_always, "must be"); + -+ if (op->code() == lir_cmp_float_branch) { ++ if (op->code() == lir_cond_float_branch) { + bool is_unordered = (op->ublock() == op->block()); + if (opr1->is_single_fpu()) { + FloatRegister reg1 = opr1->as_float_reg(); @@ -7039,12 +6774,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void LIR_Assembler::casw(Register addr, Register newval, Register cmpval, bool sign) { + __ cmpxchg32(Address(addr, 0), cmpval, newval, SCR1, sign, -+ /* retold */ false, /* barrier */ true, /* weak */ false, /* exchage */ false); ++ /* retold */ false, /* acquire */ true, /* weak */ false, /* exchange */ false); ++ // LA SC equals store-conditional dbar, so no need AnyAny after CAS. ++ //__ membar(__ AnyAny); +} + +void LIR_Assembler::casl(Register addr, Register newval, Register cmpval) { + __ cmpxchg(Address(addr, 0), cmpval, newval, SCR1, -+ /* retold */ false, /* barrier */ true, /* weak */ false, /* exchage */ false); ++ /* retold */ false, /* acquire */ true, /* weak */ false, /* exchange */ false); ++ // LA SC equals store-conditional dbar, so no need AnyAny after CAS. ++ //__ membar(__ AnyAny); +} + +void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) { @@ -7081,13 +6820,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } +} + -+void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, -+ LIR_Opr result, BasicType type) { -+ Unimplemented(); -+} -+ -+void LIR_Assembler::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, -+ LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type) { ++void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type, ++ LIR_Opr left, LIR_Opr right) { + assert(result->is_single_cpu() || result->is_double_cpu(), "expect single register for result"); + assert(left->is_single_cpu() || left->is_double_cpu(), "must be"); + Register regd = (result->type() == T_LONG) ? result->as_register_lo() : result->as_register(); @@ -8368,6 +8102,23 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(*op->stub()->continuation()); +} + ++void LIR_Assembler::emit_load_klass(LIR_OpLoadKlass* op) { ++ Register obj = op->obj()->as_pointer_register(); ++ Register result = op->result_opr()->as_pointer_register(); ++ ++ CodeEmitInfo* info = op->info(); ++ if (info != NULL) { ++ add_debug_info_for_null_check_here(info); ++ } ++ ++ if (UseCompressedClassPointers) { ++ __ ld_wu(result, obj, oopDesc::klass_offset_in_bytes()); ++ __ decode_klass_not_null(result); ++ } else { ++ __ ld_ptr(result, obj, oopDesc::klass_offset_in_bytes()); ++ } ++} ++ +void LIR_Assembler::emit_profile_call(LIR_OpProfileCall* op) { + ciMethod* method = op->profiled_method(); + ciMethod* callee = op->profiled_callee(); @@ -8495,7 +8246,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ verify_oop(obj); + + if (tmp != obj) { ++ assert_different_registers(obj, tmp, SCR1, SCR2, mdo_addr.base(), mdo_addr.index()); + __ move(tmp, obj); ++ } else { ++ assert_different_registers(obj, SCR1, SCR2, mdo_addr.base(), mdo_addr.index()); + } + if (do_null) { + __ bnez(tmp, update); @@ -8554,10 +8308,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ beqz(SCR2, none); + __ li(SCR1, (u1)TypeEntries::null_seen); + __ beq(SCR2, SCR1, none); -+ // There is a chance that the checks above (re-reading profiling -+ // data from memory) fail if another thread has just set the ++ // There is a chance that the checks above ++ // fail if another thread has just set the + // profiling to this obj's klass + membar_acquire(); ++ __ XOR(tmp, tmp, SCR2); // get back original value before XOR + __ ld_ptr(SCR2, mdo_addr); + __ XOR(tmp, tmp, SCR2); + assert(TypeEntries::type_klass_mask == -4, "must be"); @@ -8584,6 +8339,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(none); + // first time here. Set profile type. + __ st_ptr(tmp, mdo_addr); ++#ifdef ASSERT ++ assert(TypeEntries::type_mask == -2, "must be"); ++ __ bstrpick_d(tmp, tmp, 63, 1); ++ __ verify_klass_ptr(tmp); ++#endif + } + } else { + // There's a single possible klass at this profile point @@ -8617,6 +8377,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif + // first time here. Set profile type. + __ st_ptr(tmp, mdo_addr); ++#ifdef ASSERT ++ assert(TypeEntries::type_mask == -2, "must be"); ++ __ bstrpick_d(tmp, tmp, 63, 1); ++ __ verify_klass_ptr(tmp); ++#endif + } else { + assert(ciTypeEntries::valid_ciklass(current_klass) != NULL && + ciTypeEntries::valid_ciklass(current_klass) != exact_klass, "inconsistent"); @@ -8868,99 +8633,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#undef __ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp 2023-11-01 10:27:44.273760841 +0800 -@@ -0,0 +1,82 @@ -+/* -+ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+ -+// ArrayCopyStub needs access to bailout -+friend class ArrayCopyStub; -+ -+ private: -+ int array_element_size(BasicType type) const; -+ -+ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, -+ int dest_index, bool pop_fpu_stack); -+ -+ // helper functions which checks for overflow and sets bailout if it -+ // occurs. Always returns a valid embeddable pointer but in the -+ // bailout case the pointer won't be to unique storage. -+ address float_constant(float f); -+ address double_constant(double d); -+ -+ address int_constant(jlong n); -+ -+ bool is_literal_address(LIR_Address* addr); -+ -+ // Ensure we have a valid Address (base+offset) to a stack-slot. -+ Address stack_slot_address(int index, uint shift, int adjust = 0); -+ -+ // Record the type of the receiver in ReceiverTypeData -+ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, -+ Register recv, Label* update_done); -+ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); -+ -+ void casw(Register addr, Register newval, Register cmpval, bool sign); -+ void casl(Register addr, Register newval, Register cmpval); -+ -+ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); -+ -+ static const int max_tableswitches = 20; -+ struct tableswitch switches[max_tableswitches]; -+ int tableswitch_count; -+ -+ void init() { tableswitch_count = 0; } -+ -+ void deoptimize_trap(CodeEmitInfo *info); -+ -+ enum { -+ // call stub: CompiledStaticCall::to_interp_stub_size() + -+ // CompiledStaticCall::to_trampoline_stub_size() -+ _call_stub_size = 13 * NativeInstruction::nop_instruction_size, -+ _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), -+ _deopt_handler_size = 7 * NativeInstruction::nop_instruction_size -+ }; -+ -+public: -+ void store_parameter(Register r, int offset_from_sp_in_words); -+ void store_parameter(jint c, int offset_from_sp_in_words); -+ void store_parameter(jobject c, int offset_from_sp_in_words); -+ -+#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp 2023-11-01 10:27:44.273760841 +0800 -@@ -0,0 +1,1397 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp +new file mode 100644 +index 000000000..28298dcc3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp +@@ -0,0 +1,1386 @@ +/* + * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2021, 2024, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -9117,8 +8798,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (index->is_register()) { + // apply the shift and accumulate the displacement + if (shift > 0) { -+ LIR_Opr tmp = new_pointer_register(); -+ __ shift_left(index, shift, tmp); ++ // Use long register to avoid overflow when shifting large index values left. ++ LIR_Opr tmp = new_register(T_LONG); ++ __ convert(Bytecodes::_i2l, index, tmp); ++ __ shift_left(tmp, shift, tmp); + index = tmp; + } + if (large_disp != 0) { @@ -9220,32 +8903,18 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ store(reg, addr); +} + -+template -+void LIRGenerator::cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, -+ int disp, int c, T tgt, CodeEmitInfo* info) { ++void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { + LIR_Opr reg = new_register(T_INT); + __ load(generate_address(base, disp, T_INT), reg, info); -+ __ cmp_branch(condition, reg, LIR_OprFact::intConst(c), tgt); ++ __ cmp(condition, reg, LIR_OprFact::intConst(c)); +} + -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, CodeStub*, CodeEmitInfo*); -+ -+template -+void LIRGenerator::cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, -+ int disp, BasicType type, T tgt, CodeEmitInfo* info) { ++void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { + LIR_Opr reg1 = new_register(T_INT); + __ load(generate_address(base, disp, type), reg1, info); -+ __ cmp_branch(condition, reg, reg1, tgt); ++ __ cmp(condition, reg, reg1); +} + -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, CodeStub*, CodeEmitInfo*); -+ +bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { + if (is_power_of_2(c - 1)) { + __ shift_left(left, exact_log2(c - 1), tmp); @@ -9401,8 +9070,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + if (need_zero_check) { + CodeEmitInfo* info = state_for(x); -+ CodeStub* stub = new DivByZeroStub(info); -+ __ cmp_branch(lir_cond_equal, right.result(), LIR_OprFact::longConst(0), stub); ++ __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); ++ __ branch(lir_cond_equal, new DivByZeroStub(info)); + } + + rlock_result(x); @@ -9472,8 +9141,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + if (need_zero_check) { + CodeEmitInfo* info = state_for(x); -+ CodeStub* stub = new DivByZeroStub(info); -+ __ cmp_branch(lir_cond_equal, right_arg->result(), LIR_OprFact::longConst(0), stub); ++ __ cmp(lir_cond_equal, right_arg->result(), LIR_OprFact::longConst(0)); ++ __ branch(lir_cond_equal, new DivByZeroStub(info)); + } + + LIR_Opr ill = LIR_OprFact::illegalOpr; @@ -10319,13 +9988,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); + } + ++ __ cmp(lir_cond(cond), left, right); + // Generate branch profiling. Profiling code doesn't kill flags. -+ profile_branch(x, cond, left, right); ++ profile_branch(x, cond); + move_to_phi(x->state()); + if (x->x()->type()->is_float_kind()) { -+ __ cmp_branch(lir_cond(cond), left, right, x->tsux(), x->usux()); ++ __ branch(lir_cond(cond), x->tsux(), x->usux()); + } else { -+ __ cmp_branch(lir_cond(cond), left, right, x->tsux()); ++ __ branch(lir_cond(cond), x->tsux()); + } + assert(x->default_sux() == x->fsux(), "wrong destination above"); + __ jump(x->default_sux()); @@ -10355,10 +10025,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + __ volatile_load_mem_reg(address, result, info); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp 2023-11-01 10:27:44.273760841 +0800 -@@ -0,0 +1,75 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp +new file mode 100644 +index 000000000..01e8c9f27 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp +@@ -0,0 +1,57 @@ +/* + * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -10416,27 +10088,244 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + "wrong type for addresses"); +} +#endif // PRODUCT +diff --git a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp +new file mode 100644 +index 000000000..f15dacafe +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp +@@ -0,0 +1,70 @@ ++/* ++ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ + -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info) { -+ append(new LIR_OpCmpBranch(condition, left, right, tgt, info)); ++#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++ ++inline bool LinearScan::is_processed_reg_num(int reg_num) { ++ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; +} + -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, CodeStub*, CodeEmitInfo*); ++inline int LinearScan::num_physical_regs(BasicType type) { ++ return 1; ++} + -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered) { -+ append(new LIR_OpCmpBranch(condition, left, right, block, unordered)); ++inline bool LinearScan::requires_adjacent_regs(BasicType type) { ++ return false; +} + -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ append(new LIR_Op4(lir_cmp_cmove, condition, left, right, src1, src2, dst, type)); ++inline bool LinearScan::is_caller_save(int assigned_reg) { ++ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); ++ if (assigned_reg < pd_first_callee_saved_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) ++ return true; ++ return false; ++} ++ ++inline void LinearScan::pd_add_temps(LIR_Op* op) {} ++ ++// Implementation of LinearScanWalker ++inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { ++ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { ++ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); ++ _first_reg = pd_first_callee_saved_reg; ++ _last_reg = pd_last_callee_saved_reg; ++ return true; ++ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || ++ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { ++ _first_reg = pd_first_cpu_reg; ++ _last_reg = pd_last_allocatable_cpu_reg; ++ return true; ++ } ++ return false; ++} ++ ++#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp +new file mode 100644 +index 000000000..219b2e367 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp +@@ -0,0 +1,33 @@ ++/* ++ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "c1/c1_Instruction.hpp" ++#include "c1/c1_LinearScan.hpp" ++#include "utilities/bitMap.inline.hpp" ++ ++void LinearScan::allocate_fpu_stack() { ++ // No FPU stack on LoongArch64 +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp 2023-10-26 10:36:20.927752376 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp +new file mode 100644 +index 000000000..38ff4c583 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp +@@ -0,0 +1,112 @@ ++/* ++ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++ ++using MacroAssembler::build_frame; ++using MacroAssembler::null_check; ++ ++// C1_MacroAssembler contains high-level macros for C1 ++ ++ private: ++ int _rsp_offset; // track rsp changes ++ // initialization ++ void pd_init() { _rsp_offset = 0; } ++ ++ public: ++ void try_allocate( ++ Register obj, // result: pointer to object after successful allocation ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ Label& slow_case // continuation point if fast allocation fails ++ ); ++ ++ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); ++ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); ++ ++ // locking ++ // hdr : must be A0, contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must point to the displaced header location, contents preserved ++ // scratch : scratch register, contents destroyed ++ // returns code offset at which to add null check debug information ++ int lock_object (Register swap, Register obj, Register disp_hdr, Register scratch, Label& slow_case); ++ ++ // unlocking ++ // hdr : contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed ++ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); ++ ++ void initialize_object( ++ Register obj, // result: pointer to object after successful allocation ++ Register klass, // object klass ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB ++ ); ++ ++ // allocation of fixed-size objects ++ // (can also be used to allocate fixed-size arrays, by setting ++ // hdr_size correctly and storing the array length afterwards) ++ // obj : will contain pointer to allocated object ++ // t1, t2 : scratch registers - contents destroyed ++ // header_size: size of object header in words ++ // object_size: total size of object in words ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_object(Register obj, Register t1, Register t2, int header_size, ++ int object_size, Register klass, Label& slow_case); ++ ++ enum { ++ max_array_allocation_length = 0x00FFFFFF ++ }; ++ ++ // allocation of arrays ++ // obj : will contain pointer to allocated object ++ // len : array length in number of elements ++ // t : scratch register - contents destroyed ++ // header_size: size of object header in words ++ // f : element scale factor ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, ++ int f, Register klass, Label& slow_case); ++ ++ int rsp_offset() const { return _rsp_offset; } ++ void set_rsp_offset(int n) { _rsp_offset = n; } ++ ++ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, ++ bool inv_a4, bool inv_a5) PRODUCT_RETURN; ++ ++ // This platform only uses signal-based null checks. The Label is not needed. ++ void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); } ++ ++ void load_parameter(int offset_in_words, Register reg); ++ ++#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp +new file mode 100644 +index 000000000..022195134 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp @@ -0,0 +1,365 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -10526,7 +10415,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // displaced header address in the object header - if it is not the same, get the + // object header instead + lea(SCR2, Address(obj, hdr_offset)); -+ cmpxchg(Address(SCR2, 0), hdr, disp_hdr, SCR1, true, false, done); ++ cmpxchg(Address(SCR2, 0), hdr, disp_hdr, SCR1, true, true /* acquire */, done); + // if the object header was the same, we're done + // if the object header was not the same, it is now in the hdr register + // => test if it is a stack pointer into the same stack (recursive locking), i.e.: @@ -10586,9 +10475,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // we do unlocking via runtime call + if (hdr_offset) { + lea(SCR1, Address(obj, hdr_offset)); -+ cmpxchg(Address(SCR1, 0), disp_hdr, hdr, SCR2, false, false, done, &slow_case); ++ cmpxchg(Address(SCR1, 0), disp_hdr, hdr, SCR2, false, true /* acquire */, done, &slow_case); + } else { -+ cmpxchg(Address(obj, 0), disp_hdr, hdr, SCR2, false, false, done, &slow_case); ++ cmpxchg(Address(obj, 0), disp_hdr, hdr, SCR2, false, true /* acquire */, done, &slow_case); + } + // done + bind(done); @@ -10803,125 +10692,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif +} +#endif // ifndef PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,112 @@ -+/* -+ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+ -+using MacroAssembler::build_frame; -+using MacroAssembler::null_check; -+ -+// C1_MacroAssembler contains high-level macros for C1 -+ -+ private: -+ int _rsp_offset; // track rsp changes -+ // initialization -+ void pd_init() { _rsp_offset = 0; } -+ -+ public: -+ void try_allocate( -+ Register obj, // result: pointer to object after successful allocation -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ Label& slow_case // continuation point if fast allocation fails -+ ); -+ -+ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); -+ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); -+ -+ // locking -+ // hdr : must be A0, contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must point to the displaced header location, contents preserved -+ // scratch : scratch register, contents destroyed -+ // returns code offset at which to add null check debug information -+ int lock_object (Register swap, Register obj, Register disp_hdr, Register scratch, Label& slow_case); -+ -+ // unlocking -+ // hdr : contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed -+ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); -+ -+ void initialize_object( -+ Register obj, // result: pointer to object after successful allocation -+ Register klass, // object klass -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB -+ ); -+ -+ // allocation of fixed-size objects -+ // (can also be used to allocate fixed-size arrays, by setting -+ // hdr_size correctly and storing the array length afterwards) -+ // obj : will contain pointer to allocated object -+ // t1, t2 : scratch registers - contents destroyed -+ // header_size: size of object header in words -+ // object_size: total size of object in words -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_object(Register obj, Register t1, Register t2, int header_size, -+ int object_size, Register klass, Label& slow_case); -+ -+ enum { -+ max_array_allocation_length = 0x00FFFFFF -+ }; -+ -+ // allocation of arrays -+ // obj : will contain pointer to allocated object -+ // len : array length in number of elements -+ // t : scratch register - contents destroyed -+ // header_size: size of object header in words -+ // f : element scale factor -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, -+ int f, Register klass, Label& slow_case); -+ -+ int rsp_offset() const { return _rsp_offset; } -+ void set_rsp_offset(int n) { _rsp_offset = n; } -+ -+ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, -+ bool inv_a4, bool inv_a5) PRODUCT_RETURN; -+ -+ // This platform only uses signal-based null checks. The Label is not needed. -+ void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); } -+ -+ void load_parameter(int offset_in_words, Register reg); -+ -+#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp +new file mode 100644 +index 000000000..87da18e29 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp @@ -0,0 +1,1148 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -12071,13 +11846,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Unimplemented(); + return 0; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,90 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp +new file mode 100644 +index 000000000..ce84af28c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp +@@ -0,0 +1,65 @@ +/* -+ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -12100,119 +11877,55 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP -+#define CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP + +#include "utilities/globalDefinitions.hpp" +#include "utilities/macros.hpp" + -+// Sets the default values for platform dependent flags used by the server compiler. -+// (see c2_globals.hpp). Alpha-sorted. -+define_pd_global(bool, BackgroundCompilation, true); -+define_pd_global(bool, UseTLAB, true); -+define_pd_global(bool, ResizeTLAB, true); -+define_pd_global(bool, CICompileOSR, true); -+define_pd_global(bool, InlineIntrinsics, true); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, true); -+define_pd_global(bool, UseOnStackReplacement, true); -+define_pd_global(bool, ProfileInterpreter, true); -+define_pd_global(bool, TieredCompilation, true); -+define_pd_global(intx, CompileThreshold, 10000); -+define_pd_global(intx, BackEdgeThreshold, 100000); -+ -+define_pd_global(intx, OnStackReplacePercentage, 140); -+define_pd_global(intx, ConditionalMoveLimit, 3); -+define_pd_global(intx, FLOATPRESSURE, 31); -+define_pd_global(intx, FreqInlineSize, 325); -+define_pd_global(intx, MinJumpTableSize, 10); -+define_pd_global(intx, INTPRESSURE, 23); -+define_pd_global(intx, InteriorEntryAlignment, 16); -+define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); -+define_pd_global(intx, LoopUnrollLimit, 60); -+define_pd_global(intx, LoopPercentProfileLimit, 10); -+// InitialCodeCacheSize derived from specjbb2000 run. -+define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize -+define_pd_global(intx, CodeCacheExpansionSize, 64*K); -+ -+// Ergonomics related flags -+define_pd_global(uint64_t,MaxRAM, 128ULL*G); -+define_pd_global(intx, RegisterCostAreaRatio, 16000); ++// Sets the default values for platform dependent flags used by the client compiler. ++// (see c1_globals.hpp) + -+// Peephole and CISC spilling both break the graph, and so makes the -+// scheduler sick. -+define_pd_global(bool, OptoPeephole, false); -+define_pd_global(bool, UseCISCSpill, false); -+define_pd_global(bool, OptoScheduling, false); -+define_pd_global(bool, OptoBundling, false); -+define_pd_global(bool, OptoRegScheduling, false); -+define_pd_global(bool, SuperWordLoopUnrollAnalysis, true); -+define_pd_global(bool, IdealizeClearArrayNode, true); ++#ifndef COMPILER2 ++define_pd_global(bool, BackgroundCompilation, true ); ++define_pd_global(bool, InlineIntrinsics, true ); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, false); ++define_pd_global(bool, UseOnStackReplacement, true ); ++define_pd_global(bool, TieredCompilation, false); ++define_pd_global(intx, CompileThreshold, 1500 ); + -+define_pd_global(intx, ReservedCodeCacheSize, 48*M); -+define_pd_global(intx, NonProfiledCodeHeapSize, 21*M); -+define_pd_global(intx, ProfiledCodeHeapSize, 22*M); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 4); ++define_pd_global(intx, OnStackReplacePercentage, 933 ); ++define_pd_global(intx, NewSizeThreadIncrease, 4*K ); ++define_pd_global(intx, InitialCodeCacheSize, 160*K); ++define_pd_global(intx, ReservedCodeCacheSize, 32*M ); ++define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); ++define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(bool, ProfileInterpreter, false); ++define_pd_global(intx, CodeCacheExpansionSize, 32*K ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 1); +define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); ++define_pd_global(bool, NeverActAsServerClassMachine, true ); ++define_pd_global(uint64_t,MaxRAM, 1ULL*G); ++define_pd_global(bool, CICompileOSR, true ); ++#endif // !COMPILER2 ++define_pd_global(bool, UseTypeProfile, false); + -+define_pd_global(bool, TrapBasedRangeChecks, false); -+ -+// Heap related flags -+define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M)); -+ -+// Ergonomics related flags -+define_pd_global(bool, NeverActAsServerClassMachine, false); -+ -+#endif // CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "opto/compile.hpp" -+#include "opto/node.hpp" -+ -+// processor dependent initialization for LoongArch -+ -+extern void reg_mask_init(); ++define_pd_global(bool, OptimizeSinglePrecision, true ); ++define_pd_global(bool, CSEArrayLength, false); ++define_pd_global(bool, TwoOperandLIRForm, false ); + -+void Compile::pd_compiler2_init() { -+ guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); -+ reg_mask_init(); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp 2023-11-01 10:27:44.273760841 +0800 ++#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp +new file mode 100644 +index 000000000..0c91c74d6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp @@ -0,0 +1,1872 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -12407,7 +12120,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + if (PrintBiasedLockingStatistics) { + Label SUCC, FAIL; -+ cmpxchg(Address(objReg, 0), tmpReg, boxReg, scrReg, true, false, SUCC, &FAIL); // Updates tmpReg ++ cmpxchg(Address(objReg, 0), tmpReg, boxReg, scrReg, true, true /* acquire */, SUCC, &FAIL); // Updates tmpReg + bind(SUCC); + atomic_inc32((address)BiasedLocking::fast_path_entry_count_addr(), 1, AT, scrReg); + li(resReg, 1); @@ -12415,7 +12128,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + bind(FAIL); + } else { + // If cmpxchg is succ, then scrReg = 1 -+ cmpxchg(Address(objReg, 0), tmpReg, boxReg, scrReg, true, false, DONE_SET); // Updates tmpReg ++ cmpxchg(Address(objReg, 0), tmpReg, boxReg, scrReg, true, true /* acquire */, DONE_SET); // Updates tmpReg + } + + // Recursive locking @@ -12460,7 +12173,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif + // It's inflated and appears unlocked + addi_d(tmpReg, tmpReg, ObjectMonitor::owner_offset_in_bytes() - 2); -+ cmpxchg(Address(tmpReg, 0), R0, TREG, scrReg, false, false); ++ cmpxchg(Address(tmpReg, 0), R0, TREG, scrReg, false, true /* acquire */); + // Intentional fall-through into DONE ... + + bind(DONE_SET); @@ -12579,14 +12292,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + move(AT, R0); + bnez(scrReg, DONE_SET); + -+ dbar(0); ++ membar(Assembler::Membar_mask_bits(LoadStore|StoreStore)); + st_d(R0, Address(tmpReg, ObjectMonitor::owner_offset_in_bytes() - 2)); + li(resReg, 1); + b(DONE); + + bind(Stacked); + ld_d(tmpReg, Address(boxReg, 0)); -+ cmpxchg(Address(objReg, 0), boxReg, tmpReg, AT, false, false); ++ cmpxchg(Address(objReg, 0), boxReg, tmpReg, AT, false, true /* acquire */); + + bind(DONE_SET); + move(resReg, AT); @@ -14082,9 +13795,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Unimplemented(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp +new file mode 100644 +index 000000000..2babade2e +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. @@ -14230,13 +13945,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void reduce_ins_r(Register reg1, Register reg2, Register reg3, BasicType type, int opcode); + void reduce_ins_f(FloatRegister reg1, FloatRegister reg2, FloatRegister reg3, BasicType type, int opcode); +#endif // CPU_LOONGARCH_C2_MACROASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,50 @@ +diff --git a/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp +new file mode 100644 +index 000000000..0e40e2ca7 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp +@@ -0,0 +1,90 @@ +/* -+ * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14259,76 +13976,219 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "opto/compile.hpp" -+#include "opto/node.hpp" -+#include "opto/output.hpp" -+#include "runtime/sharedRuntime.hpp" ++#ifndef CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP ++#define CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP + -+#define __ masm. -+void C2SafepointPollStubTable::emit_stub_impl(MacroAssembler& masm, C2SafepointPollStub* entry) const { -+ assert(SharedRuntime::polling_page_return_handler_blob() != NULL, -+ "polling page return stub not created yet"); -+ address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point(); ++#include "utilities/globalDefinitions.hpp" ++#include "utilities/macros.hpp" + -+ Register thread = TREG; -+#ifndef OPT_THREAD -+ get_thread(thread); -+#endif ++// Sets the default values for platform dependent flags used by the server compiler. ++// (see c2_globals.hpp). Alpha-sorted. ++define_pd_global(bool, BackgroundCompilation, true); ++define_pd_global(bool, UseTLAB, true); ++define_pd_global(bool, ResizeTLAB, true); ++define_pd_global(bool, CICompileOSR, true); ++define_pd_global(bool, InlineIntrinsics, true); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, true); ++define_pd_global(bool, UseOnStackReplacement, true); ++define_pd_global(bool, ProfileInterpreter, true); ++define_pd_global(bool, TieredCompilation, true); ++define_pd_global(intx, CompileThreshold, 10000); ++define_pd_global(intx, BackEdgeThreshold, 100000); + -+ __ bind(entry->_stub_label); -+ InternalAddress safepoint_pc(masm.pc() - masm.offset() + entry->_safepoint_offset); -+ __ lea(AT, safepoint_pc); -+ __ st_d(AT, Address(thread, JavaThread::saved_exception_pc_offset())); -+ __ jmp(stub, relocInfo::runtime_call_type); -+} -+#undef __ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,35 @@ -+/* -+ * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++define_pd_global(intx, OnStackReplacePercentage, 140); ++define_pd_global(intx, ConditionalMoveLimit, 3); ++define_pd_global(intx, FLOATPRESSURE, 31); ++define_pd_global(intx, FreqInlineSize, 325); ++define_pd_global(intx, MinJumpTableSize, 10); ++define_pd_global(intx, INTPRESSURE, 23); ++define_pd_global(intx, InteriorEntryAlignment, 16); ++define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); ++define_pd_global(intx, LoopUnrollLimit, 60); ++define_pd_global(intx, LoopPercentProfileLimit, 10); ++// InitialCodeCacheSize derived from specjbb2000 run. ++define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize ++define_pd_global(intx, CodeCacheExpansionSize, 64*K); + -+#ifndef CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP -+#define CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP ++// Ergonomics related flags ++define_pd_global(uint64_t,MaxRAM, 128ULL*G); ++define_pd_global(intx, RegisterCostAreaRatio, 16000); + -+private: -+ void pd_initialize() {} ++// Peephole and CISC spilling both break the graph, and so makes the ++// scheduler sick. ++define_pd_global(bool, OptoPeephole, false); ++define_pd_global(bool, UseCISCSpill, false); ++define_pd_global(bool, OptoScheduling, false); ++define_pd_global(bool, OptoBundling, false); ++define_pd_global(bool, OptoRegScheduling, false); ++define_pd_global(bool, SuperWordLoopUnrollAnalysis, true); ++define_pd_global(bool, IdealizeClearArrayNode, true); + -+public: -+ void flush_bundle(bool start_new_bundle) {} ++define_pd_global(intx, ReservedCodeCacheSize, 48*M); ++define_pd_global(intx, NonProfiledCodeHeapSize, 21*M); ++define_pd_global(intx, ProfiledCodeHeapSize, 22*M); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 4); ++define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); + -+#endif // CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp 2023-09-08 09:39:50.361842033 +0800 -@@ -0,0 +1,144 @@ ++define_pd_global(bool, TrapBasedRangeChecks, false); ++ ++// Heap related flags ++define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M)); ++ ++// Ergonomics related flags ++define_pd_global(bool, NeverActAsServerClassMachine, false); ++ ++#endif // CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp +new file mode 100644 +index 000000000..ec78b942d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp +@@ -0,0 +1,37 @@ +/* -+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "opto/compile.hpp" ++#include "opto/node.hpp" ++ ++// processor dependent initialization for LoongArch ++ ++extern void reg_mask_init(); ++ ++void Compile::pd_compiler2_init() { ++ guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); ++ reg_mask_init(); ++} +diff --git a/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp +new file mode 100644 +index 000000000..866858b26 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_safepointPollStubTable_loongarch.cpp +@@ -0,0 +1,50 @@ ++/* ++ * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "opto/compile.hpp" ++#include "opto/node.hpp" ++#include "opto/output.hpp" ++#include "runtime/sharedRuntime.hpp" ++ ++#define __ masm. ++void C2SafepointPollStubTable::emit_stub_impl(MacroAssembler& masm, C2SafepointPollStub* entry) const { ++ assert(SharedRuntime::polling_page_return_handler_blob() != NULL, ++ "polling page return stub not created yet"); ++ address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point(); ++ ++ Register thread = TREG; ++#ifndef OPT_THREAD ++ get_thread(thread); ++#endif ++ ++ __ bind(entry->_stub_label); ++ InternalAddress safepoint_pc(masm.pc() - masm.offset() + entry->_safepoint_offset); ++ __ lea(AT, safepoint_pc); ++ __ st_d(AT, Address(thread, JavaThread::saved_exception_pc_offset())); ++ __ jmp(stub, relocInfo::runtime_call_type); ++} ++#undef __ +diff --git a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp +new file mode 100644 +index 000000000..653d95806 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP ++#define CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP ++ ++private: ++ void pd_initialize() {} ++ ++public: ++ void flush_bundle(bool start_new_bundle) {} ++ ++#endif // CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp +new file mode 100644 +index 000000000..b3f70a166 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp +@@ -0,0 +1,144 @@ ++/* ++ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -14471,9 +14331,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/copy_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/copy_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/copy_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/copy_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/copy_loongarch.hpp b/src/hotspot/cpu/loongarch/copy_loongarch.hpp +new file mode 100644 +index 000000000..54b847a73 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/copy_loongarch.hpp @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -14552,9 +14414,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#endif //CPU_LOONGARCH_COPY_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp +new file mode 100644 +index 000000000..fd176c8f0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp @@ -0,0 +1,57 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -14613,9 +14477,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static void annotate(address pc, outputStream* st) { }; + +#endif // CPU_LOONGARCH_DISASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp b/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp +new file mode 100644 +index 000000000..fb4647c27 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/foreign_globals_loongarch.cpp @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -14659,9 +14525,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ShouldNotCallThis(); + return {}; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp 2023-09-08 09:39:50.361842033 +0800 +diff --git a/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp +new file mode 100644 +index 000000000..680a27363 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/foreign_globals_loongarch.hpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -14694,9 +14562,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +class ABIDescriptor {}; + +#endif // CPU_LOONGARCH_FOREIGN_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/frame_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/frame_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/frame_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/frame_loongarch.cpp 2023-11-01 10:27:44.273760841 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.cpp b/src/hotspot/cpu/loongarch/frame_loongarch.cpp +new file mode 100644 +index 000000000..1aba8e4dd +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.cpp @@ -0,0 +1,668 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -15238,7 +15108,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // first the method + -+ Method* m = *interpreter_frame_method_addr(); ++ Method* m = safe_interpreter_frame_method(); + + // validate the method we'd find in this potential sender + if (!Method::is_valid_method(m)) return false; @@ -15366,9 +15236,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void frame::pd_ps() {} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/frame_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/frame_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/frame_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/frame_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.hpp +new file mode 100644 +index 000000000..738b53063 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.hpp @@ -0,0 +1,162 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -15532,9 +15404,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + frame sender_raw(RegisterMap* map) const; + +#endif // CPU_LOONGARCH_FRAME_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp jdk17u-ls/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp +new file mode 100644 +index 000000000..8b0e05027 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp @@ -0,0 +1,245 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -15781,9 +15655,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +#endif // CPU_LOONGARCH_FRAME_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp 2023-11-01 10:27:44.273760841 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..e12926450 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp @@ -0,0 +1,532 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -16237,10 +16113,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ b(done); + + __ bind(runtime); -+ __ pushad(); ++ __ push_call_clobbered_registers(); + __ load_parameter(0, pre_val); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + __ bind(done); + + __ epilogue(); @@ -16307,9 +16183,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ b(done); + + __ bind(runtime); -+ __ pushad(); ++ __ push_call_clobbered_registers(); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + __ bind(done); + __ epilogue(); +} @@ -16317,9 +16193,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#undef __ + +#endif // COMPILER1 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..745046ac0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -16392,9 +16270,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_G1_G1BARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp +new file mode 100644 +index 000000000..44b7ff148 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. @@ -16426,9 +16306,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +const size_t G1MergeHeapRootsPrefetchCacheSize = 8; + +#endif // CPU_LOONGARCH_GC_G1_G1GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..4706559a8 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp @@ -0,0 +1,320 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -16750,9 +16632,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(method_live); +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..f87c20611 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -16847,9 +16731,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_SHARED_BARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp +new file mode 100644 +index 000000000..65cee60f6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp @@ -0,0 +1,157 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17008,9 +16894,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + NativeNMethodBarrier* barrier = native_nmethod_barrier(nm); + return barrier->get_value() != disarmed_value(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..96dc9562a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17131,9 +17019,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..7d628ca6a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17179,9 +17069,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..71c3cb493 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17236,9 +17128,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..086bdebb5 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17294,9 +17188,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_SHARED_MODREFBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp +new file mode 100644 +index 000000000..f82a2500d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. @@ -17428,9 +17324,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + return result; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp 2023-11-01 10:27:44.273760841 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..e90623fe9 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,784 @@ +/* + * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. @@ -17719,7 +17617,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ beqz(SCR2, not_cset); + } + -+ __ pushad_except_v0(); ++ __ push_call_clobbered_registers_except(RegSet::of(V0)); + if (is_strong) { + if (is_narrow) { + __ li(RA, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow)); @@ -17738,7 +17636,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ li(RA, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)); + } + __ jalr(RA); -+ __ popad_except_v0(); ++ __ pop_call_clobbered_registers_except(RegSet::of(V0)); + + __ bind(not_cset); + @@ -17754,9 +17652,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register dst, Register tmp) { + if (ShenandoahIUBarrier) { -+ __ pushad(); ++ __ push_call_clobbered_registers(); + satb_write_barrier_pre(masm, noreg, dst, TREG, tmp, true, false); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + } +} + @@ -17808,7 +17706,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // 3: apply keep-alive barrier if needed + if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) { + __ enter(); -+ __ pushad(); ++ __ push_call_clobbered_registers(); + satb_write_barrier_pre(masm /* masm */, + noreg /* obj */, + dst /* pre_val */, @@ -17816,7 +17714,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + tmp1 /* tmp */, + true /* tosca_live */, + true /* expand_call */); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + __ leave(); + } +} @@ -17949,9 +17847,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + if (is_narrow) { + __ cmpxchg32(addr, expected, new_val, tmp2, false /* sign */, false /* retold */, -+ acquire /* barrier */, false /* weak */, true /* exchange */); ++ acquire /* acquire */, false /* weak */, true /* exchange */); + } else { -+ __ cmpxchg(addr, expected, new_val, tmp2, false /* retold */, acquire /* barrier */, ++ __ cmpxchg(addr, expected, new_val, tmp2, false /* retold */, acquire /* acquire */, + false /* weak */, true /* exchange */); + } + // tmp2 holds value fetched. @@ -18015,9 +17913,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // compares result with expected. + if (is_narrow) { + __ cmpxchg32(addr, tmp2, new_val, tmp1, false /* sign */, false /* retold */, -+ acquire /* barrier */, false /* weak */, false /* exchange */); ++ acquire /* acquire */, false /* weak */, false /* exchange */); + } else { -+ __ cmpxchg(addr, tmp2, new_val, tmp1, false /* retold */, acquire /* barrier */, ++ __ cmpxchg(addr, tmp2, new_val, tmp1, false /* retold */, acquire /* acquire */, + false /* weak */, false /* exchange */); + } + // tmp1 set iff success, tmp2 holds value fetched. @@ -18163,10 +18061,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ b(done); + + __ bind(runtime); -+ __ pushad(); ++ __ push_call_clobbered_registers(); + __ load_parameter(0, pre_val); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + __ bind(done); + + __ epilogue(); @@ -18177,7 +18075,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bstrins_d(SP, R0, 3, 0); + // arg0 : object to be resolved + -+ __ pushad_except_v0(); ++ __ push_call_clobbered_registers_except(RegSet::of(V0)); + __ load_parameter(0, A0); + __ load_parameter(1, A1); + @@ -18208,7 +18106,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ li(RA, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)); + } + __ jalr(RA); -+ __ popad_except_v0(); ++ __ pop_call_clobbered_registers_except(RegSet::of(V0)); + + __ epilogue(); +} @@ -18216,9 +18114,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#undef __ + +#endif // COMPILER1 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp 2023-10-26 10:36:20.927752376 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..e2c862f6c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. @@ -18305,9 +18205,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad ---- openjdk/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad 2023-10-26 10:36:20.927752376 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad +new file mode 100644 +index 000000000..04f67d231 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad @@ -0,0 +1,222 @@ +// +// Copyright (c) 2018, Red Hat, Inc. All rights reserved. @@ -18531,10 +18433,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + ins_pipe(pipe_slow); +%} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp 2023-11-01 10:27:44.273760841 +0800 -@@ -0,0 +1,466 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 000000000..372d80cf1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp +@@ -0,0 +1,462 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. @@ -18636,7 +18540,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (dst != V0) { + __ push(V0); + } -+ __ pushad_except_v0(); ++ __ push_call_clobbered_registers_except(RegSet::of(V0)); + + if (dst != A0) { + __ move(A0, dst); @@ -18644,7 +18548,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ move(A1, scratch); + __ MacroAssembler::call_VM_leaf_base(ZBarrierSetRuntime::load_barrier_on_oop_field_preloaded_addr(decorators), 2); + -+ __ popad_except_v0(); ++ __ pop_call_clobbered_registers_except(RegSet::of(V0)); + + // Make sure dst has the return value. + if (dst != V0) { @@ -18759,14 +18663,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define __ ce->masm()-> + +void ZBarrierSetAssembler::generate_c1_load_barrier_test(LIR_Assembler* ce, -+ LIR_Opr ref, -+ LIR_Opr res) const { -+ Register rscratch1 = AT; -+ Register rthread = TREG; -+ assert_different_registers(rscratch1, rthread, ref->as_register()); -+ -+ __ ld_d(rscratch1, address_bad_mask_from_thread(rthread)); -+ __ andr(res->as_register(), ref->as_register(), rscratch1); ++ LIR_Opr ref) const { ++ assert_different_registers(SCR1, TREG, ref->as_register()); ++ __ ld_d(SCR1, address_bad_mask_from_thread(TREG)); ++ __ andr(SCR1, SCR1, ref->as_register()); +} + +void ZBarrierSetAssembler::generate_c1_load_barrier_stub(LIR_Assembler* ce, @@ -18831,7 +18731,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + DecoratorSet decorators) const { + __ prologue("zgc_load_barrier stub", false); + -+ __ pushad_except_v0(); ++ __ push_call_clobbered_registers_except(RegSet::of(V0)); + + // Setup arguments + __ load_parameter(0, A0); @@ -18839,7 +18739,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ call_VM_leaf(ZBarrierSetRuntime::load_barrier_on_oop_field_preloaded_addr(decorators), 2); + -+ __ popad_except_v0(); ++ __ pop_call_clobbered_registers_except(RegSet::of(V0)); + + __ epilogue(); +} @@ -19001,10 +18901,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#undef __ + +#endif // COMPILER2 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,102 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 000000000..6a96d6fdd +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp +@@ -0,0 +1,101 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -19087,8 +18989,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#ifdef COMPILER1 + void generate_c1_load_barrier_test(LIR_Assembler* ce, -+ LIR_Opr ref, -+ LIR_Opr res) const; ++ LIR_Opr ref) const; + + void generate_c1_load_barrier_stub(LIR_Assembler* ce, + ZLoadBarrierStubC1* stub) const; @@ -19107,9 +19008,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_GC_Z_ZBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp +new file mode 100644 +index 000000000..85db1cf18 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.cpp @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved. @@ -19322,10 +19225,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +size_t ZPlatformAddressMetadataShift() { + return ZPlatformAddressOffsetBits(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,37 @@ +diff --git a/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp +new file mode 100644 +index 000000000..542fd2674 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp +@@ -0,0 +1,35 @@ +/* + * Copyright (c) 2015, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -19357,15 +19262,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +const size_t ZPlatformHeapViews = 3; +const size_t ZPlatformCacheLineSize = 64; + -+const bool ZPlatformLoadBarrierTestResultInRegister = true; -+ +size_t ZPlatformAddressOffsetBits(); +size_t ZPlatformAddressMetadataShift(); + +#endif // CPU_LOONGARCH_GC_Z_ZGLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad ---- openjdk/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad 2023-10-26 10:36:20.927752376 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad +new file mode 100644 +index 000000000..262cfd50b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad @@ -0,0 +1,273 @@ +// +// Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -19433,12 +19338,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif + Address addr(mem); + if (node->barrier_data() == ZLoadBarrierElided) { -+ __ cmpxchg(addr, oldval, newval, tmp, false /* retold */, acquire /* barrier */, ++ __ cmpxchg(addr, oldval, newval, tmp, false /* retold */, acquire /* acquire */, + weak /* weak */, false /* exchange */); + __ move(res, tmp); + } else { + __ move(tmp, oldval); -+ __ cmpxchg(addr, tmp, newval, AT, true /* retold */, acquire /* barrier */, ++ __ cmpxchg(addr, tmp, newval, AT, true /* retold */, acquire /* acquire */, + false /* weak */, false /* exchange */); + __ move(res, AT); + @@ -19447,7 +19352,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ andr(AT, AT, tmp); + __ beqz(AT, good); + z_load_barrier_slow_path(_masm, node, addr, tmp, res /* used as tmp */); -+ __ cmpxchg(addr, oldval, newval, tmp, false /* retold */, acquire /* barrier */, weak /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, tmp, false /* retold */, acquire /* acquire */, weak /* weak */, false /* exchange */); + __ move(res, tmp); + __ bind(good); + } @@ -19640,9 +19545,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + ins_pipe(pipe_slow); +%} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 +diff --git a/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp +new file mode 100644 +index 000000000..363cd6e20 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp @@ -0,0 +1,55 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -19699,10 +19606,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#define COMPRESSED_CLASS_POINTERS_DEPENDS_ON_COMPRESSED_OOPS false + +#endif // CPU_LOONGARCH_GLOBALDEFINITIONS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/globals_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/globals_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/globals_loongarch.hpp 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,104 @@ +diff --git a/src/hotspot/cpu/loongarch/globals_loongarch.hpp b/src/hotspot/cpu/loongarch/globals_loongarch.hpp +new file mode 100644 +index 000000000..2358ca315 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/globals_loongarch.hpp +@@ -0,0 +1,106 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -19802,17 +19711,21 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + "Use CRC32 instructions for CRC32 computation") \ + \ + product(bool, UseActiveCoresMP, false, \ -+ "Eliminate barriers for single active cpu") ++ "Eliminate barriers for single active cpu") \ ++ \ ++ product(bool, TraceTraps, false, "Trace all traps the signal handler") + +// end of ARCH_FLAGS + +#endif // CPU_LOONGARCH_GLOBALS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/icache_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/icache_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/icache_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/icache_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 -@@ -0,0 +1,42 @@ +diff --git a/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp +new file mode 100644 +index 000000000..a8f08bbf4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp +@@ -0,0 +1,100 @@ +/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -19838,28 +19751,88 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" -+#include "runtime/icache.hpp" ++#include "asm/macroAssembler.inline.hpp" ++#include "code/icBuffer.hpp" ++#include "gc/shared/collectedHeap.inline.hpp" ++#include "interpreter/bytecodes.hpp" ++#include "memory/resourceArea.hpp" ++#include "nativeInst_loongarch.hpp" ++#include "oops/oop.inline.hpp" + -+void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) -+{ -+#define __ _masm-> -+ StubCodeMark mark(this, "ICache", "flush_icache_stub"); -+ address start = __ pc(); ++#define A0 RA0 ++#define A1 RA1 ++#define A2 RA2 ++#define A3 RA3 ++#define A4 RA4 ++#define A5 RA5 ++#define A6 RA6 ++#define A7 RA7 ++#define T0 RT0 ++#define T1 RT1 ++#define T2 RT2 ++#define T3 RT3 ++#define T4 RT4 ++#define T5 RT5 ++#define T6 RT6 ++#define T7 RT7 ++#define T8 RT8 + -+ __ ibar(0); -+ __ ori(V0, RA2, 0); -+ __ jr(RA); ++int InlineCacheBuffer::ic_stub_code_size() { ++ return NativeMovConstReg::instruction_size + ++ NativeGeneralJump::instruction_size + ++ 1; ++ // so that code_end can be set in CodeBuffer ++ // 64bit 15 = 6 + 8 bytes + 1 byte ++ // 32bit 7 = 2 + 4 bytes + 1 byte ++} + -+ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++ ++// we use T1 as cached oop(klass) now. this is the target of virtual call, ++// when reach here, the receiver in T0 ++// refer to shareRuntime_loongarch.cpp,gen_i2c2i_adapters ++void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, ++ address entry_point) { ++ ResourceMark rm; ++ CodeBuffer code(code_begin, ic_stub_code_size()); ++ MacroAssembler* masm = new MacroAssembler(&code); ++ // note: even though the code contains an embedded oop, we do not need reloc info ++ // because ++ // (1) the oop is old (i.e., doesn't matter for scavenges) ++ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear ++ // assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop"); ++#define __ masm-> ++ __ patchable_li52(T1, (long)cached_value); ++ // TODO: confirm reloc ++ __ jmp(entry_point, relocInfo::runtime_call_type); ++ __ flush(); +#undef __ +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/icache_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/icache_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/icache_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/icache_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 -@@ -0,0 +1,41 @@ ++ ++ ++address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ return jump->jump_destination(); ++} ++ ++ ++void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { ++ // creation also verifies the object ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); ++ // Verifies the jump ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ void* o= (void*)move->data(); ++ return o; ++} +diff --git a/src/hotspot/cpu/loongarch/icache_loongarch.cpp b/src/hotspot/cpu/loongarch/icache_loongarch.cpp +new file mode 100644 +index 000000000..d577e41f5 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icache_loongarch.cpp +@@ -0,0 +1,42 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -19882,29 +19855,32 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_ICACHE_LOONGARCH_HPP -+#define CPU_LOONGARCH_ICACHE_LOONGARCH_HPP ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "runtime/icache.hpp" + -+// Interface for updating the instruction cache. Whenever the VM modifies -+// code, part of the processor instruction cache potentially has to be flushed. ++void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) ++{ ++#define __ _masm-> ++ StubCodeMark mark(this, "ICache", "flush_icache_stub"); ++ address start = __ pc(); + -+class ICache : public AbstractICache { -+ public: -+ enum { -+ stub_size = 3 * BytesPerInstWord, // Size of the icache flush stub in bytes -+ line_size = 32, // flush instruction affects a dword -+ log2_line_size = 5 // log2(line_size) -+ }; -+}; ++ __ ibar(0); ++ __ ori(V0, RA2, 0); ++ __ jr(RA); + -+#endif // CPU_LOONGARCH_ICACHE_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp 2023-09-08 09:39:50.365842039 +0800 -@@ -0,0 +1,100 @@ ++ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++#undef __ ++} +diff --git a/src/hotspot/cpu/loongarch/icache_loongarch.hpp b/src/hotspot/cpu/loongarch/icache_loongarch.hpp +new file mode 100644 +index 000000000..3a180549f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icache_loongarch.hpp +@@ -0,0 +1,41 @@ +/* -+ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -19927,85 +19903,304 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#include "precompiled.hpp" ++#ifndef CPU_LOONGARCH_ICACHE_LOONGARCH_HPP ++#define CPU_LOONGARCH_ICACHE_LOONGARCH_HPP ++ ++// Interface for updating the instruction cache. Whenever the VM modifies ++// code, part of the processor instruction cache potentially has to be flushed. ++ ++class ICache : public AbstractICache { ++ public: ++ enum { ++ stub_size = 3 * BytesPerInstWord, // Size of the icache flush stub in bytes ++ line_size = 32, // flush instruction affects a dword ++ log2_line_size = 5 // log2(line_size) ++ }; ++}; ++ ++#endif // CPU_LOONGARCH_ICACHE_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp +new file mode 100644 +index 000000000..7dea5deb1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp +@@ -0,0 +1,270 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP ++ ++#include "asm/assembler.hpp" +#include "asm/macroAssembler.hpp" +#include "asm/macroAssembler.inline.hpp" -+#include "code/icBuffer.hpp" -+#include "gc/shared/collectedHeap.inline.hpp" -+#include "interpreter/bytecodes.hpp" -+#include "memory/resourceArea.hpp" -+#include "nativeInst_loongarch.hpp" -+#include "oops/oop.inline.hpp" ++#include "interpreter/invocationCounter.hpp" ++#include "runtime/frame.hpp" + -+#define A0 RA0 -+#define A1 RA1 -+#define A2 RA2 -+#define A3 RA3 -+#define A4 RA4 -+#define A5 RA5 -+#define A6 RA6 -+#define A7 RA7 -+#define T0 RT0 -+#define T1 RT1 -+#define T2 RT2 -+#define T3 RT3 -+#define T4 RT4 -+#define T5 RT5 -+#define T6 RT6 -+#define T7 RT7 -+#define T8 RT8 ++// This file specializes the assember with interpreter-specific macros + -+int InlineCacheBuffer::ic_stub_code_size() { -+ return NativeMovConstReg::instruction_size + -+ NativeGeneralJump::instruction_size + -+ 1; -+ // so that code_end can be set in CodeBuffer -+ // 64bit 15 = 6 + 8 bytes + 1 byte -+ // 32bit 7 = 2 + 4 bytes + 1 byte -+} ++typedef ByteSize (*OffsetFunction)(uint); + ++class InterpreterMacroAssembler: public MacroAssembler { ++ private: + -+// we use T1 as cached oop(klass) now. this is the target of virtual call, -+// when reach here, the receiver in T0 -+// refer to shareRuntime_loongarch.cpp,gen_i2c2i_adapters -+void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, -+ address entry_point) { -+ ResourceMark rm; -+ CodeBuffer code(code_begin, ic_stub_code_size()); -+ MacroAssembler* masm = new MacroAssembler(&code); -+ // note: even though the code contains an embedded oop, we do not need reloc info -+ // because -+ // (1) the oop is old (i.e., doesn't matter for scavenges) -+ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear -+ // assert(cached_oop == NULL || cached_oop->is_perm(), "must be perm oop"); -+#define __ masm-> -+ __ patchable_li52(T1, (long)cached_value); -+ // TODO: confirm reloc -+ __ jmp(entry_point, relocInfo::runtime_call_type); -+ __ flush(); -+#undef __ -+} ++ Register _locals_register; // register that contains the pointer to the locals ++ Register _bcp_register; // register that contains the bcp + ++ protected: ++ // Interpreter specific version of call_VM_base ++ virtual void call_VM_leaf_base(address entry_point, ++ int number_of_arguments); + -+address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ return jump->jump_destination(); -+} ++ virtual void call_VM_base(Register oop_result, ++ Register java_thread, ++ Register last_java_sp, ++ address entry_point, ++ int number_of_arguments, ++ bool check_exceptions); + ++ // base routine for all dispatches ++ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); + -+void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { -+ // creation also verifies the object -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); -+ // Verifies the jump -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ void* o= (void*)move->data(); -+ return o; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp 2023-10-26 10:36:20.927752376 +0800 -@@ -0,0 +1,2040 @@ ++ public: ++ void jump_to_entry(address entry); ++ // narrow int return value ++ void narrow(Register result); ++ ++ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} ++ ++ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ void get_4_byte_integer_at_bcp(Register reg, int offset); ++ ++ virtual void check_and_handle_popframe(Register java_thread); ++ virtual void check_and_handle_earlyret(Register java_thread); ++ ++ void load_earlyret_value(TosState state); ++ ++ // Interpreter-specific registers ++ void save_bcp() { ++ st_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_bcp() { ++ ld_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_locals() { ++ ld_d(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); ++ } ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg) { ++ ld_d(reg, FP, frame::interpreter_frame_method_offset * wordSize); ++ } ++ ++ void get_const(Register reg){ ++ get_method(reg); ++ ld_d(reg, reg, in_bytes(Method::const_offset())); ++ } ++ ++ void get_constant_pool(Register reg) { ++ get_const(reg); ++ ld_d(reg, reg, in_bytes(ConstMethod::constants_offset())); ++ } ++ ++ void get_constant_pool_cache(Register reg) { ++ get_constant_pool(reg); ++ ld_d(reg, reg, ConstantPool::cache_offset_in_bytes()); ++ } ++ ++ void get_cpool_and_tags(Register cpool, Register tags) { ++ get_constant_pool(cpool); ++ ld_d(tags, cpool, ConstantPool::tags_offset_in_bytes()); ++ } ++ ++ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); ++ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_method_counters(Register method, Register mcs, Label& skip); ++ ++ // load cpool->resolved_references(index); ++ void load_resolved_reference_at_index(Register result, Register index, Register tmp); ++ ++ // load cpool->resolved_klass_at(index) ++ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) ++ Register index, // the constant pool index (corrupted on return) ++ Register klass); // contains the Klass on return ++ ++ void load_resolved_method_at_index(int byte_no, ++ Register method, ++ Register cache, ++ Register index); ++ ++ void pop_ptr( Register r = FSR); ++ void pop_i( Register r = FSR); ++ void pop_l( Register r = FSR); ++ void pop_f(FloatRegister r = FSF); ++ void pop_d(FloatRegister r = FSF); ++ ++ void push_ptr( Register r = FSR); ++ void push_i( Register r = FSR); ++ void push_l( Register r = FSR); ++ void push_f(FloatRegister r = FSF); ++ void push_d(FloatRegister r = FSF); ++ ++ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } ++ ++ void push(Register r ) { ((MacroAssembler*)this)->push(r); } ++ ++ void pop(TosState state); // transition vtos -> state ++ void push(TosState state); // transition state -> vtos ++ ++ void empty_expression_stack() { ++ ld_d(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); ++ // NULL last_sp until next java call ++ st_d(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); ++ } ++ ++ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls ++ void load_ptr(int n, Register val); ++ void store_ptr(int n, Register val); ++ ++ // Generate a subtype check: branch to ok_is_subtype if sub_klass is ++ // a subtype of super_klass. ++ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); ++ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); ++ ++ // Dispatching ++ void dispatch_prolog(TosState state, int step = 0); ++ void dispatch_epilog(TosState state, int step = 0); ++ void dispatch_only(TosState state, bool generate_poll = false); ++ void dispatch_only_normal(TosState state); ++ void dispatch_only_noverify(TosState state); ++ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); ++ void dispatch_via (TosState state, address* table); ++ ++ // jump to an invoked target ++ void prepare_to_jump_from_interpreted(); ++ void jump_from_interpreted(Register method, Register temp); ++ ++ ++ // Returning from interpreted functions ++ // ++ // Removes the current activation (incl. unlocking of monitors) ++ // and sets up the return address. This code is also used for ++ // exception unwindwing. In that case, we do not want to throw ++ // IllegalMonitorStateExceptions, since that might get us into an ++ // infinite rethrow exception loop. ++ // Additionally this code is used for popFrame and earlyReturn. ++ // In popFrame case we want to skip throwing an exception, ++ // installing an exception, and notifying jvmdi. ++ // In earlyReturn case we only want to skip throwing an exception ++ // and installing an exception. ++ void remove_activation(TosState state, Register ret_addr, ++ bool throw_monitor_exception = true, ++ bool install_monitor_exception = true, ++ bool notify_jvmdi = true); ++ ++ // Object locking ++ void lock_object (Register lock_reg); ++ void unlock_object(Register lock_reg); ++ ++ // Interpreter profiling operations ++ void set_method_data_pointer_for_bcp(); ++ void test_method_data_pointer(Register mdp, Label& zero_continue); ++ void verify_method_data_pointer(); ++ ++ void set_mdp_data_at(Register mdp_in, int constant, Register value); ++ void increment_mdp_data_at(Address data, bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, int constant, ++ bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, ++ bool decrement = false); ++ void increment_mask_and_jump(Address counter_addr, ++ int increment, Address mask, ++ Register scratch, bool preloaded, ++ Condition cond, Label* where); ++ void set_mdp_flag_at(Register mdp_in, int flag_constant); ++ void test_mdp_data_at(Register mdp_in, int offset, Register value, ++ Register test_value_out, ++ Label& not_equal_continue); ++ ++ void record_klass_in_profile(Register receiver, Register mdp, ++ Register reg2, bool is_virtual_call); ++ void record_klass_in_profile_helper(Register receiver, Register mdp, ++ Register reg2, int start_row, ++ Label& done, bool is_virtual_call); ++ ++ void record_item_in_profile_helper(Register item, Register mdp, ++ Register reg2, int start_row, Label& done, int total_rows, ++ OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, ++ int non_profiled_offset); ++ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); ++ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); ++ void update_mdp_by_constant(Register mdp_in, int constant); ++ void update_mdp_for_ret(Register return_bci); ++ ++ void profile_taken_branch(Register mdp, Register bumped_count); ++ void profile_not_taken_branch(Register mdp); ++ void profile_call(Register mdp); ++ void profile_final_call(Register mdp); ++ void profile_virtual_call(Register receiver, Register mdp, ++ Register scratch2, ++ bool receiver_can_be_null = false); ++ void profile_ret(Register return_bci, Register mdp); ++ void profile_null_seen(Register mdp); ++ void profile_typecheck(Register mdp, Register klass, Register scratch); ++ void profile_typecheck_failed(Register mdp); ++ void profile_switch_default(Register mdp); ++ void profile_switch_case(Register index_in_scratch, Register mdp, ++ Register scratch2); ++ ++ // Debugging ++ // only if +VerifyOops && state == atos ++ void verify_oop(Register reg, TosState state = atos); ++ // only if +VerifyFPU && (state == ftos || state == dtos) ++ void verify_FPU(int stack_depth, TosState state = ftos); ++ ++ void profile_obj_type(Register obj, const Address& mdo_addr); ++ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); ++ void profile_return_type(Register mdp, Register ret, Register tmp); ++ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++ ++ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ ++ // support for jvmti/dtrace ++ void notify_method_entry(); ++ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++}; ++ ++#endif // CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp +new file mode 100644 +index 000000000..cb8ad8a35 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp +@@ -0,0 +1,2042 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -20887,13 +21082,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + if (PrintBiasedLockingStatistics) { + Label succ, fail; -+ cmpxchg(Address(scr_reg, 0), tmp_reg, lock_reg, AT, true, false, succ, &fail); ++ cmpxchg(Address(scr_reg, 0), tmp_reg, lock_reg, AT, true, true /* acquire */, succ, &fail); + bind(succ); + atomic_inc32((address)BiasedLocking::fast_path_entry_count_addr(), 1, AT, scr_reg); + b(done); + bind(fail); + } else { -+ cmpxchg(Address(scr_reg, 0), tmp_reg, lock_reg, AT, true, false, done); ++ cmpxchg(Address(scr_reg, 0), tmp_reg, lock_reg, AT, true, true /* acquire */, done); + } + + // Test if the oopMark is an obvious stack pointer, i.e., @@ -20967,7 +21162,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + beqz(hdr_reg, done); + + // Atomic swap back the old header -+ cmpxchg(Address(scr_reg, 0), tmp_reg, hdr_reg, AT, false, false, done); ++ cmpxchg(Address(scr_reg, 0), tmp_reg, hdr_reg, AT, false, true /* acquire */, done); + + // Call the runtime routine for slow case. + st_d(scr_reg, lock_reg, BasicObjectLock::obj_offset_in_bytes()); // restore obj @@ -21650,6 +21845,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + +void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& mdo_addr) { ++ assert_different_registers(obj, AT, T5, mdo_addr.base(), mdo_addr.index()); + Label update, next, none; + + verify_oop(obj); @@ -21688,25 +21884,21 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + xorr(obj, obj, AT); + + assert(TypeEntries::type_klass_mask == -4, "must be"); -+ bstrpick_d(AT, obj, 63, 2); -+ beqz(AT, next); ++ bstrpick_d(T5, obj, 63, 2); ++ beqz(T5, next); + -+ andi(AT, obj, TypeEntries::type_unknown); -+ bnez(AT, next); ++ andi(T5, obj, TypeEntries::type_unknown); ++ bnez(T5, next); + -+ if (mdo_addr.index() == noreg) { -+ ld_d(AT, mdo_addr); -+ } else { -+ ld_d(AT, T0, mdo_addr.disp()); -+ } + beqz(AT, none); + -+ addi_d(AT, AT, -(TypeEntries::null_seen)); -+ beqz(AT, none); ++ addi_d(T5, AT, -(TypeEntries::null_seen)); ++ beqz(T5, none); + -+ // There is a chance that the checks above (re-reading profiling -+ // data from memory) fail if another thread has just set the ++ // There is a chance that the checks above ++ // fail if another thread has just set the + // profiling to this obj's klass ++ xorr(obj, obj, AT); // get back original value before XOR + if (mdo_addr.index() == noreg) { + ld_d(AT, mdo_addr); + } else { @@ -21738,6 +21930,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } else { + st_d(obj, T0, mdo_addr.disp()); + } ++#ifdef ASSERT ++ assert(TypeEntries::type_mask == -2, "must be"); ++ bstrpick_d(obj, obj, 63, 1); ++ verify_klass_ptr(obj); ++#endif + + bind(next); + if (mdo_addr.index() != noreg) { @@ -22046,13 +22243,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + unimplemented(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp 2023-09-08 09:39:50.365842039 +0800 -@@ -0,0 +1,270 @@ +diff --git a/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp +new file mode 100644 +index 000000000..d53d951a1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp +@@ -0,0 +1,62 @@ +/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -22075,254 +22274,48 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + * + */ + -+#ifndef CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -+ -+#include "asm/assembler.hpp" -+#include "asm/macroAssembler.hpp" -+#include "asm/macroAssembler.inline.hpp" -+#include "interpreter/invocationCounter.hpp" -+#include "runtime/frame.hpp" ++#ifndef CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP ++#define CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP + -+// This file specializes the assember with interpreter-specific macros ++// This is included in the middle of class Interpreter. ++// Do not include files here. + -+typedef ByteSize (*OffsetFunction)(uint); ++// native method calls + -+class InterpreterMacroAssembler: public MacroAssembler { ++class SignatureHandlerGenerator: public NativeSignatureIterator { + private: ++ MacroAssembler* _masm; ++ unsigned int _num_fp_args; ++ unsigned int _num_int_args; ++ int _stack_offset; + -+ Register _locals_register; // register that contains the pointer to the locals -+ Register _bcp_register; // register that contains the bcp -+ -+ protected: -+ // Interpreter specific version of call_VM_base -+ virtual void call_VM_leaf_base(address entry_point, -+ int number_of_arguments); -+ -+ virtual void call_VM_base(Register oop_result, -+ Register java_thread, -+ Register last_java_sp, -+ address entry_point, -+ int number_of_arguments, -+ bool check_exceptions); -+ -+ // base routine for all dispatches -+ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); ++ void move(int from_offset, int to_offset); ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + + public: -+ void jump_to_entry(address entry); -+ // narrow int return value -+ void narrow(Register result); -+ -+ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} -+ -+ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ void get_4_byte_integer_at_bcp(Register reg, int offset); -+ -+ virtual void check_and_handle_popframe(Register java_thread); -+ virtual void check_and_handle_earlyret(Register java_thread); -+ -+ void load_earlyret_value(TosState state); -+ -+ // Interpreter-specific registers -+ void save_bcp() { -+ st_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_bcp() { -+ ld_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_locals() { -+ ld_d(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); -+ } -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg) { -+ ld_d(reg, FP, frame::interpreter_frame_method_offset * wordSize); -+ } -+ -+ void get_const(Register reg){ -+ get_method(reg); -+ ld_d(reg, reg, in_bytes(Method::const_offset())); -+ } -+ -+ void get_constant_pool(Register reg) { -+ get_const(reg); -+ ld_d(reg, reg, in_bytes(ConstMethod::constants_offset())); -+ } -+ -+ void get_constant_pool_cache(Register reg) { -+ get_constant_pool(reg); -+ ld_d(reg, reg, ConstantPool::cache_offset_in_bytes()); -+ } -+ -+ void get_cpool_and_tags(Register cpool, Register tags) { -+ get_constant_pool(cpool); -+ ld_d(tags, cpool, ConstantPool::tags_offset_in_bytes()); -+ } -+ -+ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); -+ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_method_counters(Register method, Register mcs, Label& skip); -+ -+ // load cpool->resolved_references(index); -+ void load_resolved_reference_at_index(Register result, Register index, Register tmp); -+ -+ // load cpool->resolved_klass_at(index) -+ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) -+ Register index, // the constant pool index (corrupted on return) -+ Register klass); // contains the Klass on return -+ -+ void load_resolved_method_at_index(int byte_no, -+ Register method, -+ Register cache, -+ Register index); -+ -+ void pop_ptr( Register r = FSR); -+ void pop_i( Register r = FSR); -+ void pop_l( Register r = FSR); -+ void pop_f(FloatRegister r = FSF); -+ void pop_d(FloatRegister r = FSF); -+ -+ void push_ptr( Register r = FSR); -+ void push_i( Register r = FSR); -+ void push_l( Register r = FSR); -+ void push_f(FloatRegister r = FSF); -+ void push_d(FloatRegister r = FSF); -+ -+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } -+ -+ void push(Register r ) { ((MacroAssembler*)this)->push(r); } -+ -+ void pop(TosState state); // transition vtos -> state -+ void push(TosState state); // transition state -> vtos -+ -+ void empty_expression_stack() { -+ ld_d(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); -+ // NULL last_sp until next java call -+ st_d(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); -+ } -+ -+ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls -+ void load_ptr(int n, Register val); -+ void store_ptr(int n, Register val); -+ -+ // Generate a subtype check: branch to ok_is_subtype if sub_klass is -+ // a subtype of super_klass. -+ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); -+ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); -+ -+ // Dispatching -+ void dispatch_prolog(TosState state, int step = 0); -+ void dispatch_epilog(TosState state, int step = 0); -+ void dispatch_only(TosState state, bool generate_poll = false); -+ void dispatch_only_normal(TosState state); -+ void dispatch_only_noverify(TosState state); -+ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); -+ void dispatch_via (TosState state, address* table); -+ -+ // jump to an invoked target -+ void prepare_to_jump_from_interpreted(); -+ void jump_from_interpreted(Register method, Register temp); -+ -+ -+ // Returning from interpreted functions -+ // -+ // Removes the current activation (incl. unlocking of monitors) -+ // and sets up the return address. This code is also used for -+ // exception unwindwing. In that case, we do not want to throw -+ // IllegalMonitorStateExceptions, since that might get us into an -+ // infinite rethrow exception loop. -+ // Additionally this code is used for popFrame and earlyReturn. -+ // In popFrame case we want to skip throwing an exception, -+ // installing an exception, and notifying jvmdi. -+ // In earlyReturn case we only want to skip throwing an exception -+ // and installing an exception. -+ void remove_activation(TosState state, Register ret_addr, -+ bool throw_monitor_exception = true, -+ bool install_monitor_exception = true, -+ bool notify_jvmdi = true); -+ -+ // Object locking -+ void lock_object (Register lock_reg); -+ void unlock_object(Register lock_reg); -+ -+ // Interpreter profiling operations -+ void set_method_data_pointer_for_bcp(); -+ void test_method_data_pointer(Register mdp, Label& zero_continue); -+ void verify_method_data_pointer(); -+ -+ void set_mdp_data_at(Register mdp_in, int constant, Register value); -+ void increment_mdp_data_at(Address data, bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, int constant, -+ bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, -+ bool decrement = false); -+ void increment_mask_and_jump(Address counter_addr, -+ int increment, Address mask, -+ Register scratch, bool preloaded, -+ Condition cond, Label* where); -+ void set_mdp_flag_at(Register mdp_in, int flag_constant); -+ void test_mdp_data_at(Register mdp_in, int offset, Register value, -+ Register test_value_out, -+ Label& not_equal_continue); -+ -+ void record_klass_in_profile(Register receiver, Register mdp, -+ Register reg2, bool is_virtual_call); -+ void record_klass_in_profile_helper(Register receiver, Register mdp, -+ Register reg2, int start_row, -+ Label& done, bool is_virtual_call); -+ -+ void record_item_in_profile_helper(Register item, Register mdp, -+ Register reg2, int start_row, Label& done, int total_rows, -+ OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, -+ int non_profiled_offset); -+ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); -+ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); -+ void update_mdp_by_constant(Register mdp_in, int constant); -+ void update_mdp_for_ret(Register return_bci); -+ -+ void profile_taken_branch(Register mdp, Register bumped_count); -+ void profile_not_taken_branch(Register mdp); -+ void profile_call(Register mdp); -+ void profile_final_call(Register mdp); -+ void profile_virtual_call(Register receiver, Register mdp, -+ Register scratch2, -+ bool receiver_can_be_null = false); -+ void profile_ret(Register return_bci, Register mdp); -+ void profile_null_seen(Register mdp); -+ void profile_typecheck(Register mdp, Register klass, Register scratch); -+ void profile_typecheck_failed(Register mdp); -+ void profile_switch_default(Register mdp); -+ void profile_switch_case(Register index_in_scratch, Register mdp, -+ Register scratch2); -+ -+ // Debugging -+ // only if +VerifyOops && state == atos -+ void verify_oop(Register reg, TosState state = atos); -+ // only if +VerifyFPU && (state == ftos || state == dtos) -+ void verify_FPU(int stack_depth, TosState state = ftos); -+ -+ void profile_obj_type(Register obj, const Address& mdo_addr); -+ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); -+ void profile_return_type(Register mdp, Register ret, Register tmp); -+ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++ // Creation ++ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); + -+ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // support for jvmti/dtrace -+ void notify_method_entry(); -+ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); +}; + -+#endif // CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp 2023-09-08 09:39:50.369842044 +0800 ++#endif // CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp +new file mode 100644 +index 000000000..85a199e76 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp @@ -0,0 +1,282 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -22606,75 +22599,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // return result handler + return Interpreter::result_handler(m->result_type()); +JRT_END -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp 2023-09-08 09:39:50.369842044 +0800 -@@ -0,0 +1,62 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -+#define CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -+ -+// This is included in the middle of class Interpreter. -+// Do not include files here. -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ unsigned int _num_fp_args; -+ unsigned int _num_int_args; -+ int _stack_offset; -+ -+ void move(int from_offset, int to_offset); -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); -+ -+ public: -+ // Creation -+ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); -+ -+ // Code generation -+ void generate(uint64_t fingerprint); -+ -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; -+ -+#endif // CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp 2023-09-08 09:39:50.369842044 +0800 +diff --git a/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp +new file mode 100644 +index 000000000..048107c24 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -22763,9 +22692,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_LOONGARCH_JAVAFRAMEANCHOR_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp 2023-09-08 09:39:50.369842044 +0800 +diff --git a/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp +new file mode 100644 +index 000000000..5b0828092 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp @@ -0,0 +1,197 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. @@ -22964,9 +22895,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp 2023-09-08 09:39:50.369842044 +0800 +diff --git a/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp +new file mode 100644 +index 000000000..0ee04e042 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp @@ -0,0 +1,143 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -23111,9 +23044,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_JNITYPES_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp 2023-09-08 09:39:50.369842044 +0800 +diff --git a/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp +new file mode 100644 +index 000000000..eb75830ec +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp @@ -0,0 +1,202 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -23317,10 +23252,43 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +bool CodeInstaller::is_general_purpose_reg(VMReg hotspotRegister) { + return !hotspotRegister->is_FloatRegister(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/loongarch_64.ad jdk17u-ls/src/hotspot/cpu/loongarch/loongarch_64.ad ---- openjdk/src/hotspot/cpu/loongarch/loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/loongarch_64.ad 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,15672 @@ +diff --git a/src/hotspot/cpu/loongarch/loongarch.ad b/src/hotspot/cpu/loongarch/loongarch.ad +new file mode 100644 +index 000000000..80dff0c76 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/loongarch.ad +@@ -0,0 +1,25 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ +diff --git a/src/hotspot/cpu/loongarch/loongarch_64.ad b/src/hotspot/cpu/loongarch/loongarch_64.ad +new file mode 100644 +index 000000000..7e01822e0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/loongarch_64.ad +@@ -0,0 +1,15689 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -25437,7 +25405,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (C->stub_function() == NULL && BarrierSet::barrier_set()->barrier_set_nmethod() != NULL) { + st->print("\n\t"); + st->print("ld_d T1, guard, 0\n\t"); -+ st->print("dbar 0\n\t"); ++ st->print("membar LoadLoad\n\t"); + st->print("ld_d T2, TREG, thread_disarmed_offset\n\t"); + st->print("beq T1, T2, skip\n\t"); + st->print("\n\t"); @@ -29757,6 +29725,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +instruct membar_storestore() %{ + match(MemBarStoreStore); ++ match(StoreStoreFence); + + ins_cost(400); + format %{ "MEMBAR-storestore @ membar_storestore" %} @@ -29766,6 +29735,17 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_pipe(empty); +%} + ++instruct same_addr_load_fence() %{ ++ match(SameAddrLoadFence); ++ ins_cost(400); ++ ++ format %{ "MEMBAR @ same_addr_load_fence" %} ++ ins_encode %{ ++ __ dbar(0x700); ++ %} ++ ins_pipe(pipe_slow); ++%} ++ +//----------Move Instructions-------------------------------------------------- +instruct castX2P(mRegP dst, mRegL src) %{ + match(Set dst (CastX2P src)); @@ -33717,13 +33697,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_cost(300); + + // Use the following format syntax -+ format %{ "ILLTRAP ;#@ShouldNotReachHere" %} ++ format %{ "stop; #@ShouldNotReachHere" %} + ins_encode %{ + if (is_reachable()) { -+ // Here we should emit illtrap! -+ __ stop("ShouldNotReachHere"); ++ __ stop(_halt_reason); + } + %} ++ + ins_pipe( pipe_jump ); +%} + @@ -33907,9 +33887,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Address addr($mem_ptr$$Register, 0); + + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg32(addr, oldval, newval, res, true, false, true); ++ __ cmpxchg32(addr, oldval, newval, res, true, false, true /* acquire */); + } else { -+ __ cmpxchg32(addr, oldval, newval, AT, true, false, true); ++ __ cmpxchg32(addr, oldval, newval, AT, true, false, true /* acquire */); + __ move(res, AT); + } + %} @@ -33928,9 +33908,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Address addr($mem_ptr$$Register, 0); + + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg(addr, oldval, newval, res, false, true); ++ __ cmpxchg(addr, oldval, newval, res, false, true /* acquire */); + } else { -+ __ cmpxchg(addr, oldval, newval, AT, false, true); ++ __ cmpxchg(addr, oldval, newval, AT, false, true /* acquire */); + __ move(res, AT); + } + %} @@ -33949,9 +33929,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Address addr($mem_ptr$$Register, 0); + + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg(addr, oldval, newval, res, false, true); ++ __ cmpxchg(addr, oldval, newval, res, false, true /* acquire */); + } else { -+ __ cmpxchg(addr, oldval, newval, AT, false, true); ++ __ cmpxchg(addr, oldval, newval, AT, false, true /* acquire */); + __ move(res, AT); + } + %} @@ -33969,9 +33949,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Address addr($mem_ptr$$Register, 0); + + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg32(addr, oldval, newval, res, false, false, true); ++ __ cmpxchg32(addr, oldval, newval, res, false, false, true /* acquire */); + } else { -+ __ cmpxchg32(addr, oldval, newval, AT, false, false, true); ++ __ cmpxchg32(addr, oldval, newval, AT, false, false, true /* acquire */); + __ move(res, AT); + } + %} @@ -34110,14 +34090,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_cost(2 * MEMORY_REF_COST); + effect(TEMP_DEF res); + format %{ -+ "cmpxchg32 $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeI" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeI" + %} + ins_encode %{ + Register newval = $newval$$Register; + Register oldval = $oldval$$Register; + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); -+ __ cmpxchg32(addr, oldval, newval, res, true /* sign */, false /* retold */, true /* barrier */, false /* weak */, true /* exchange */); ++ __ cmpxchg32(addr, oldval, newval, res, true /* sign */, false /* retold */, true /* acquire */, false /* weak */, true /* exchange */); + %} + ins_pipe(pipe_slow); +%} @@ -34128,14 +34108,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_cost(2 * MEMORY_REF_COST); + effect(TEMP_DEF res); + format %{ -+ "cmpxchg $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeL" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeL" + %} + ins_encode %{ + Register newval = $newval$$Register; + Register oldval = $oldval$$Register; + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); -+ __ cmpxchg(addr, oldval, newval, res, false /* retold */, true /* barrier */, false /* weak */, true /* exchange */); ++ __ cmpxchg(addr, oldval, newval, res, false /* retold */, true /* acquire */, false /* weak */, true /* exchange */); + %} + ins_pipe(pipe_slow); +%} @@ -34146,7 +34126,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_cost(2 * MEMORY_REF_COST); + effect(TEMP_DEF res); + format %{ -+ "cmpxchg $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeP" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeP" + %} + ins_encode %{ + Register newval = $newval$$Register; @@ -34164,14 +34144,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + ins_cost(2 * MEMORY_REF_COST); + effect(TEMP_DEF res); + format %{ -+ "cmpxchg32 $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeN" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @compareAndExchangeN" + %} + ins_encode %{ + Register newval = $newval$$Register; + Register oldval = $oldval$$Register; + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); -+ __ cmpxchg32(addr, oldval, newval, res, false /* sign */, false /* retold */, true /* barrier */, false /* weak */, true /* exchange */); ++ __ cmpxchg32(addr, oldval, newval, res, false /* sign */, false /* retold */, true /* acquire */, false /* weak */, true /* exchange */); + %} + ins_pipe(pipe_slow); +%} @@ -34189,9 +34169,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg32(addr, oldval, newval, res, true /* sign */, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg32(addr, oldval, newval, res, true /* sign */, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + } else { -+ __ cmpxchg32(addr, oldval, newval, AT, true /* sign */, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg32(addr, oldval, newval, AT, true /* sign */, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + __ move(res, AT); + } + %} @@ -34203,7 +34183,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + match(Set res (WeakCompareAndSwapL mem (Binary oldval newval))); + ins_cost(2 * MEMORY_REF_COST); + format %{ -+ "cmpxchg $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @WeakCompareAndSwapL" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @WeakCompareAndSwapL" + %} + ins_encode %{ + Register newval = $newval$$Register; @@ -34211,9 +34191,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg(addr, oldval, newval, res, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, res, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + } else { -+ __ cmpxchg(addr, oldval, newval, AT, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, AT, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + __ move(res, AT); + } + %} @@ -34225,7 +34205,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + match(Set res (WeakCompareAndSwapP mem (Binary oldval newval))); + ins_cost(MEMORY_REF_COST); + format %{ -+ "cmpxchg $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @weakCompareAndSwapP" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @weakCompareAndSwapP" + %} + ins_encode %{ + Register newval = $newval$$Register; @@ -34233,9 +34213,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg(addr, oldval, newval, res, false /* retold */, false /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, res, false /* retold */, false /* acquire */, true /* weak */, false /* exchange */); + } else { -+ __ cmpxchg(addr, oldval, newval, AT, false /* retold */, false /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, AT, false /* retold */, false /* acquire */, true /* weak */, false /* exchange */); + __ move(res, AT); + } + %} @@ -34247,7 +34227,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + match(Set res (WeakCompareAndSwapP mem (Binary oldval newval))); + ins_cost(2 * MEMORY_REF_COST); + format %{ -+ "cmpxchg $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @weakCompareAndSwapP" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @weakCompareAndSwapP" + %} + ins_encode %{ + Register newval = $newval$$Register; @@ -34255,9 +34235,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg(addr, oldval, newval, res, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, res, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + } else { -+ __ cmpxchg(addr, oldval, newval, AT, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg(addr, oldval, newval, AT, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + __ move(res, AT); + } + %} @@ -34269,7 +34249,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + match(Set res (WeakCompareAndSwapN mem (Binary oldval newval))); + ins_cost(2 * MEMORY_REF_COST); + format %{ -+ "cmpxchg32 $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @weakCompareAndSwapN" ++ "CMPXCHG $res = $mem, $oldval, $newval\t# if $mem == $oldval then $mem <-- $newval @weakCompareAndSwapN" + %} + ins_encode %{ + Register newval = $newval$$Register; @@ -34277,9 +34257,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + Register res = $res$$Register; + Address addr(as_Register($mem$$base)); + if (res != addr.base() && res != oldval && res != newval) { -+ __ cmpxchg32(addr, oldval, newval, res, false /* sign */, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg32(addr, oldval, newval, res, false /* sign */, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + } else { -+ __ cmpxchg32(addr, oldval, newval, AT, false /* sign */, false /* retold */, true /* barrier */, true /* weak */, false /* exchange */); ++ __ cmpxchg32(addr, oldval, newval, AT, false /* sign */, false /* retold */, true /* acquire */, true /* weak */, false /* exchange */); + __ move(res, AT); + } + %} @@ -38518,13 +38498,19 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + match(Set dst (VectorInsert (Binary dst val) idx)); + format %{ "xvinsert $dst, $val, $idx\t# @insert32B" %} + ins_encode %{ -+ if ($idx$$constant < 16) { -+ __ vinsgr2vr_b($dst$$FloatRegister, $val$$Register, $idx$$constant); -+ } else { -+ __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110); -+ __ vinsgr2vr_b($dst$$FloatRegister, $val$$Register, $idx$$constant-16); -+ __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110); ++ int idx = $idx$$constant; ++ int msbw, lsbw; ++ switch (idx % 4) { ++ case 0: msbw = 7, lsbw = 0; break; ++ case 1: msbw = 15, lsbw = 8; break; ++ case 2: msbw = 23, lsbw = 16; break; ++ case 3: msbw = 31, lsbw = 24; break; ++ default: ++ ShouldNotReachHere(); + } ++ __ xvpickve2gr_w(SCR1, $dst$$FloatRegister, idx >> 2); ++ __ bstrins_w(SCR1, $val$$Register, msbw, lsbw); ++ __ xvinsgr2vr_w($dst$$FloatRegister, SCR1, idx >> 2); + %} + ins_pipe( pipe_slow ); +%} @@ -38534,13 +38520,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + match(Set dst (VectorInsert (Binary dst val) idx)); + format %{ "xvinsert $dst, $val, $idx\t# @insert16S" %} + ins_encode %{ -+ if ($idx$$constant < 8) { -+ __ vinsgr2vr_h($dst$$FloatRegister, $val$$Register, $idx$$constant); -+ } else { -+ __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110); -+ __ vinsgr2vr_h($dst$$FloatRegister, $val$$Register, $idx$$constant-8); -+ __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110); -+ } ++ int idx = $idx$$constant; ++ int msbw = (idx % 2) ? 31 : 15; ++ int lsbw = (idx % 2) ? 16 : 0; ++ __ xvpickve2gr_w(SCR1, $dst$$FloatRegister, idx >> 1); ++ __ bstrins_w(SCR1, $val$$Register, msbw, lsbw); ++ __ xvinsgr2vr_w($dst$$FloatRegister, SCR1, idx >> 1); + %} + ins_pipe( pipe_slow ); +%} @@ -38993,39 +38978,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/loongarch.ad jdk17u-ls/src/hotspot/cpu/loongarch/loongarch.ad ---- openjdk/src/hotspot/cpu/loongarch/loongarch.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/loongarch.ad 2023-09-08 09:39:50.369842044 +0800 -@@ -0,0 +1,25 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,3900 @@ +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp +new file mode 100644 +index 000000000..06fbc1815 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp +@@ -0,0 +1,3839 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Loongson Technology. All rights reserved. @@ -39684,7 +39642,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#else + orr(tmp_reg, TREG, swap_reg); +#endif -+ cmpxchg(Address(obj_reg, 0), swap_reg, tmp_reg, AT, false, false); ++ cmpxchg(Address(obj_reg, 0), swap_reg, tmp_reg, AT, false, true /* acquire */); + if (need_tmp_reg) { + pop(tmp_reg); + } @@ -39729,7 +39687,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif + ld_ptr(swap_reg, saved_mark_addr); + -+ cmpxchg(Address(obj_reg, 0), swap_reg, tmp_reg, AT, false, false); ++ cmpxchg(Address(obj_reg, 0), swap_reg, tmp_reg, AT, false, true /* acquire */); + if (need_tmp_reg) { + pop(tmp_reg); + } @@ -39769,7 +39727,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + push(tmp_reg); + } + load_prototype_header(tmp_reg, obj_reg); -+ cmpxchg(Address(obj_reg, 0), swap_reg, tmp_reg, AT, false, false); ++ cmpxchg(Address(obj_reg, 0), swap_reg, tmp_reg, AT, false, true /* acquire */); + if (need_tmp_reg) { + pop(tmp_reg); + } @@ -40006,22 +39964,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + +void MacroAssembler::stop(const char* msg) { -+ li(A0, (long)msg); -+ call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); -+ brk(17); -+} -+ -+void MacroAssembler::warn(const char* msg) { -+ pushad(); -+ li(A0, (long)msg); -+ push(S2); -+ move(S2, SP); // use S2 as a sender SP holder -+ assert(StackAlignmentInBytes == 16, "must be"); -+ bstrins_d(SP, R0, 3, 0); // align stack as required by ABI -+ call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); -+ move(SP, S2); // use S2 as a sender SP holder -+ pop(S2); -+ popad(); ++#ifndef PRODUCT ++ block_comment(msg); ++#endif ++ csrrd(R0, 0); ++ emit_int64((uintptr_t)msg); +} + +void MacroAssembler::increment(Register reg, int imm) { @@ -40365,7 +40312,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + if (thread != V0) { + push(V0); + } -+ pushad_except_v0(); ++ push_call_clobbered_registers_except(RegSet::of(V0)); + + push(S5); + move(S5, SP); @@ -40376,7 +40323,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + move(SP, S5); + pop(S5); + -+ popad_except_v0(); ++ pop_call_clobbered_registers_except(RegSet::of(V0)); + if (thread != V0) { + move(thread, V0); + pop(V0); @@ -40805,9 +40752,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // handle errors + bind(error); -+ pushad(); ++ push_call_clobbered_registers(); + call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); -+ popad(); ++ pop_call_clobbered_registers(); + jr(RA); +} + @@ -40861,7 +40808,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +void MacroAssembler::cmpxchg(Address addr, Register oldval, Register newval, -+ Register resflag, bool retold, bool barrier, ++ Register resflag, bool retold, bool acquire, + bool weak, bool exchange) { + assert(oldval != resflag, "oldval != resflag"); + assert(newval != resflag, "newval != resflag"); @@ -40884,8 +40831,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + b(succ); + + bind(fail); -+ if (barrier) -+ membar(LoadLoad); ++ if (acquire) { ++ membar(Assembler::Membar_mask_bits(LoadLoad|LoadStore)); ++ } else { ++ dbar(0x700); ++ } + if (retold && oldval != R0) + move(oldval, resflag); + if (!exchange) { @@ -40895,7 +40845,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +void MacroAssembler::cmpxchg(Address addr, Register oldval, Register newval, -+ Register tmp, bool retold, bool barrier, Label& succ, Label* fail) { ++ Register tmp, bool retold, bool acquire, Label& succ, Label* fail) { + assert(oldval != tmp, "oldval != tmp"); + assert(newval != tmp, "newval != tmp"); + Label again, neq; @@ -40909,8 +40859,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + b(succ); + + bind(neq); -+ if (barrier) -+ membar(LoadLoad); ++ if (acquire) { ++ membar(Assembler::Membar_mask_bits(LoadLoad|LoadStore)); ++ } else { ++ dbar(0x700); ++ } + if (retold && oldval != R0) + move(oldval, tmp); + if (fail) @@ -40918,7 +40871,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +void MacroAssembler::cmpxchg32(Address addr, Register oldval, Register newval, -+ Register resflag, bool sign, bool retold, bool barrier, ++ Register resflag, bool sign, bool retold, bool acquire, + bool weak, bool exchange) { + assert(oldval != resflag, "oldval != resflag"); + assert(newval != resflag, "newval != resflag"); @@ -40943,8 +40896,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + b(succ); + + bind(fail); -+ if (barrier) -+ membar(LoadLoad); ++ if (acquire) { ++ membar(Assembler::Membar_mask_bits(LoadLoad|LoadStore)); ++ } else { ++ dbar(0x700); ++ } + if (retold && oldval != R0) + move(oldval, resflag); + if (!exchange) { @@ -40954,7 +40910,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +void MacroAssembler::cmpxchg32(Address addr, Register oldval, Register newval, Register tmp, -+ bool sign, bool retold, bool barrier, Label& succ, Label* fail) { ++ bool sign, bool retold, bool acquire, Label& succ, Label* fail) { + assert(oldval != tmp, "oldval != tmp"); + assert(newval != tmp, "newval != tmp"); + Label again, neq; @@ -40970,8 +40926,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + b(succ); + + bind(neq); -+ if (barrier) -+ membar(LoadLoad); ++ if (acquire) { ++ membar(Assembler::Membar_mask_bits(LoadLoad|LoadStore)); ++ } else { ++ dbar(0x700); ++ } + if (retold && oldval != R0) + move(oldval, tmp); + if (fail) @@ -40999,83 +40958,17 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + //Unimplemented(); +} + -+Register caller_saved_registers[] = {T7, T5, T6, A0, A1, A2, A3, A4, A5, A6, A7, T0, T1, T2, T3, T8, T4, S8, RA, FP}; -+Register caller_saved_registers_except_v0[] = {T7, T5, T6, A1, A2, A3, A4, A5, A6, A7, T0, T1, T2, T3, T8, T4, S8, RA, FP}; -+ -+ //TODO: LA -+//In LA, F0~23 are all caller-saved registers -+FloatRegister caller_saved_fpu_registers[] = {F0, F12, F13}; -+ -+// We preserve all caller-saved register -+void MacroAssembler::pushad(){ -+ int i; -+ // Fixed-point registers -+ int len = sizeof(caller_saved_registers) / sizeof(caller_saved_registers[0]); -+ addi_d(SP, SP, -1 * len * wordSize); -+ for (i = 0; i < len; i++) { -+ st_d(caller_saved_registers[i], SP, (len - i - 1) * wordSize); -+ } -+ -+ // Floating-point registers -+ len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); -+ addi_d(SP, SP, -1 * len * wordSize); -+ for (i = 0; i < len; i++) { -+ fst_d(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); -+ } -+}; -+ -+void MacroAssembler::popad(){ -+ int i; -+ // Floating-point registers -+ int len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); -+ for (i = 0; i < len; i++) -+ { -+ fld_d(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); -+ } -+ addi_d(SP, SP, len * wordSize); -+ -+ // Fixed-point registers -+ len = sizeof(caller_saved_registers) / sizeof(caller_saved_registers[0]); -+ for (i = 0; i < len; i++) -+ { -+ ld_d(caller_saved_registers[i], SP, (len - i - 1) * wordSize); -+ } -+ addi_d(SP, SP, len * wordSize); -+}; -+ -+// We preserve all caller-saved register except V0 -+void MacroAssembler::pushad_except_v0() { -+ int i; -+ // Fixed-point registers -+ int len = sizeof(caller_saved_registers_except_v0) / sizeof(caller_saved_registers_except_v0[0]); -+ addi_d(SP, SP, -1 * len * wordSize); -+ for (i = 0; i < len; i++) { -+ st_d(caller_saved_registers_except_v0[i], SP, (len - i - 1) * wordSize); -+ } ++static RegSet caller_saved_regset = RegSet::range(A0, A7) + RegSet::range(T0, T8) + RegSet::of(FP, RA) - RegSet::of(SCR1, SCR2); ++static FloatRegSet caller_saved_fpu_regset = FloatRegSet::range(F0, F23); + -+ // Floating-point registers -+ len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); -+ addi_d(SP, SP, -1 * len * wordSize); -+ for (i = 0; i < len; i++) { -+ fst_d(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); -+ } ++void MacroAssembler::push_call_clobbered_registers_except(RegSet exclude) { ++ push(caller_saved_regset - exclude); ++ push_fpu(caller_saved_fpu_regset); +} + -+void MacroAssembler::popad_except_v0() { -+ int i; -+ // Floating-point registers -+ int len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); -+ for (i = 0; i < len; i++) { -+ fld_d(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); -+ } -+ addi_d(SP, SP, len * wordSize); -+ -+ // Fixed-point registers -+ len = sizeof(caller_saved_registers_except_v0) / sizeof(caller_saved_registers_except_v0[0]); -+ for (i = 0; i < len; i++) { -+ ld_d(caller_saved_registers_except_v0[i], SP, (len - i - 1) * wordSize); -+ } -+ addi_d(SP, SP, len * wordSize); ++void MacroAssembler::pop_call_clobbered_registers_except(RegSet exclude) { ++ pop_fpu(caller_saved_fpu_regset); ++ pop(caller_saved_regset - exclude); +} + +void MacroAssembler::push2(Register reg1, Register reg2) { @@ -42484,10 +42377,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + address last = code()->last_insn(); + if (last != NULL && ((NativeInstruction*)last)->is_sync() && prev == last) { + code()->set_last_insn(NULL); ++ NativeMembar *membar = (NativeMembar*)prev; ++ // merged membar ++ // e.g. LoadLoad and LoadLoad|LoadStore to LoadLoad|LoadStore ++ membar->set_hint(membar->get_hint() & (~hint & 0xF)); + block_comment("merged membar"); + } else { + code()->set_last_insn(pc()); -+ dbar(hint); ++ Assembler::membar(hint); + } +} + @@ -42926,10 +42823,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } +} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,748 @@ +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp +new file mode 100644 +index 000000000..204ca1a1a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp +@@ -0,0 +1,754 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -43319,9 +43218,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // prints msg, dumps registers and stops execution + void stop(const char* msg); + -+ // prints msg and continues -+ void warn(const char* msg); -+ + static void debug(char* msg/*, RegistersForDebugging* regs*/); + static void debug64(char* msg, int64_t pc, int64_t regs[]); + @@ -43485,13 +43381,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void bswap_w(Register dst, Register src); + + void cmpxchg(Address addr, Register oldval, Register newval, Register resflag, -+ bool retold, bool barrier, bool weak = false, bool exchange = false); ++ bool retold, bool acquire, bool weak = false, bool exchange = false); + void cmpxchg(Address addr, Register oldval, Register newval, Register tmp, -+ bool retold, bool barrier, Label& succ, Label* fail = nullptr); ++ bool retold, bool acquire, Label& succ, Label* fail = nullptr); + void cmpxchg32(Address addr, Register oldval, Register newval, Register resflag, -+ bool sign, bool retold, bool barrier, bool weak = false, bool exchange = false); ++ bool sign, bool retold, bool acquire, bool weak = false, bool exchange = false); + void cmpxchg32(Address addr, Register oldval, Register newval, Register tmp, -+ bool sign, bool retold, bool barrier, Label& succ, Label* fail = nullptr); ++ bool sign, bool retold, bool acquire, Label& succ, Label* fail = nullptr); + + void extend_sign(Register rh, Register rl) { /*stop("extend_sign");*/ guarantee(0, "LA not implemented yet");} + void neg(Register reg) { /*dsubu(reg, R0, reg);*/ guarantee(0, "LA not implemented yet");} @@ -43503,11 +43399,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + void pop2 () { addi_d(SP, SP, 16); } + void push2(Register reg1, Register reg2); + void pop2 (Register reg1, Register reg2); -+ //we need 2 fun to save and resotre general register -+ void pushad(); -+ void popad(); -+ void pushad_except_v0(); -+ void popad_except_v0(); ++ // Push and pop everything that might be clobbered by a native ++ // runtime call except SCR1 and SCR2. (They are always scratch, ++ // so we don't have to protect them.) Only save the lower 64 bits ++ // of each vector register. Additional registers can be excluded ++ // in a passed RegSet. ++ void push_call_clobbered_registers_except(RegSet exclude); ++ void pop_call_clobbered_registers_except(RegSet exclude); ++ ++ void push_call_clobbered_registers() { ++ push_call_clobbered_registers_except(RegSet()); ++ } ++ void pop_call_clobbered_registers() { ++ pop_call_clobbered_registers_except(RegSet()); ++ } + void push(RegSet regs) { if (regs.bits()) push(regs.bits()); } + void pop(RegSet regs) { if (regs.bits()) pop(regs.bits()); } + void push_fpu(FloatRegSet regs) { if (regs.bits()) push_fpu(regs.bits()); } @@ -43678,9 +43583,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_MACROASSEMBLER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp 2023-09-08 09:39:50.369842044 +0800 +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp +new file mode 100644 +index 000000000..49302590c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -43716,13 +43623,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "code/codeCache.hpp" + +#endif // CPU_LOONGARCH_MACROASSEMBLER_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp ---- openjdk/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp 2023-09-08 09:39:50.369842044 +0800 -@@ -0,0 +1,1633 @@ +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp +new file mode 100644 +index 000000000..9c74be2db +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp +@@ -0,0 +1,1634 @@ +/* Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, Cavium. All rights reserved. (By BELLSOFT) -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2024, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -44629,7 +44538,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + b(Q_DONE); + bind(JX_IS_0); + if (UseLASX) { -+ xvfmul_d(v28, v18, v6); // f[0,1] * x[0] ++ xvfmul_d(v28, v18, v6); // f[0,3] * x[0] + fmul_d(v30, v19, v6); // f[4] * x[0] + } else { + vfmul_d(v28, v18, v6); // f[0,1] * x[0] @@ -44858,6 +44767,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + st_w(tmp2, SCR2, 0); + addi_w(SCR1, SCR1, 24); + addi_w(jz, jz, 1); ++ alsl_d(SCR2, jz, iqBase, 2 - 1); + st_w(tmp3, SCR2, 0); // iq[jz] = (int) fw + b(Z_ZERO_CHECK_DONE); + bind(Z_IS_LESS_THAN_TWO24B); @@ -45353,9 +45263,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + bind(DONE); + jr(RA); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/matcher_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/matcher_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/matcher_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/matcher_loongarch.hpp 2023-09-08 09:39:50.369842044 +0800 +diff --git a/src/hotspot/cpu/loongarch/matcher_loongarch.hpp b/src/hotspot/cpu/loongarch/matcher_loongarch.hpp +new file mode 100644 +index 000000000..21a691b1f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/matcher_loongarch.hpp @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. @@ -45502,9 +45414,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static const bool supports_encode_ascii_array = true; + +#endif // CPU_LOONGARCH_MATCHER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp +new file mode 100644 +index 000000000..31b3040c3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp @@ -0,0 +1,585 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -46091,9 +46005,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp +new file mode 100644 +index 000000000..a97520ea7 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -46157,10 +46073,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // Should be in sharedRuntime, not here. + return R3; + } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp 2023-11-01 10:27:44.277760845 +0800 -@@ -0,0 +1,524 @@ +diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp +new file mode 100644 +index 000000000..25ef0ecd2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp +@@ -0,0 +1,529 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -46194,6 +46112,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#include "nativeInst_loongarch.hpp" +#include "oops/oop.inline.hpp" +#include "runtime/handles.hpp" ++#include "runtime/safepoint.hpp" +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" +#include "utilities/ostream.hpp" @@ -46584,6 +46503,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return uint_at(0) == NativeIllegalInstruction::instruction_code; +} + ++bool NativeInstruction::is_stop() { ++ return uint_at(0) == 0x04000000; // csrrd R0 0 ++} ++ +void NativeIllegalInstruction::insert(address code_pos) { + *(juint*)code_pos = instruction_code; + ICache::invalidate_range(code_pos, instruction_size); @@ -46685,10 +46608,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return Assembler::high(insn_word(), 10) == Assembler::ld_w_op && + Assembler::low(insn_word(), 5) == AT->encoding(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,523 @@ +diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp +new file mode 100644 +index 000000000..0ec8ebddf +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp +@@ -0,0 +1,531 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -46771,6 +46696,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + inline bool is_NativeCallTrampolineStub_at(); + //We use an illegal instruction for marking a method as not_entrant or zombie. + bool is_sigill_zombie_not_entrant(); ++ bool is_stop(); + + protected: + address addr_at(int offset) const { return address(this) + offset; } @@ -47211,10 +47137,86 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + assert(ni->is_NativeCallTrampolineStub_at(), "no call trampoline found"); + return (NativeCallTrampolineStub*)addr; +} ++ ++class NativeMembar : public NativeInstruction { ++public: ++ unsigned int get_hint() { return Assembler::low(insn_word(), 4); } ++ void set_hint(int hint) { Assembler::patch(addr_at(0), 4, hint); } ++}; ++ +#endif // CPU_LOONGARCH_NATIVEINST_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp +new file mode 100644 +index 000000000..07aa5b228 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp +@@ -0,0 +1,61 @@ ++/* ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++ ++// machine-dependent implemention for register maps ++ friend class frame; ++ ++ private: ++#ifndef CORE ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return NULL. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return NULL;} ++ address pd_location(VMReg base_reg, int slot_idx) const { ++ if (base_reg->is_FloatRegister()) { ++ assert(base_reg->is_concrete(), "must pass base reg"); ++ intptr_t offset_in_bytes = slot_idx * VMRegImpl::stack_slot_size; ++ address base_location = location(base_reg); ++ if (base_location != NULL) { ++ return base_location + offset_in_bytes; ++ } else { ++ return NULL; ++ } ++ } else { ++ return location(base_reg->next(slot_idx)); ++ } ++ } ++#endif ++ ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} ++ ++#endif // CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp b/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp +new file mode 100644 +index 000000000..58f40b747 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_definitions_loongarch.cpp @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. @@ -47319,9 +47321,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +REGISTER_DEFINITION(FloatRegister, f29); +REGISTER_DEFINITION(FloatRegister, f30); +REGISTER_DEFINITION(FloatRegister, f31); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/register_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/register_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/register_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/register_loongarch.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/register_loongarch.cpp b/src/hotspot/cpu/loongarch/register_loongarch.cpp +new file mode 100644 +index 000000000..54d90167a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_loongarch.cpp @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -47382,9 +47386,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + }; + return is_valid() ? names[encoding()] : "fccnoreg"; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/register_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/register_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/register_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/register_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/register_loongarch.hpp b/src/hotspot/cpu/loongarch/register_loongarch.hpp +new file mode 100644 +index 000000000..85669f435 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_loongarch.hpp @@ -0,0 +1,499 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -47885,74 +47891,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +typedef AbstractRegSet FloatRegSet; + +#endif //CPU_LOONGARCH_REGISTER_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 -@@ -0,0 +1,61 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -+ -+// machine-dependent implemention for register maps -+ friend class frame; -+ -+ private: -+#ifndef CORE -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return NULL. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return NULL;} -+ address pd_location(VMReg base_reg, int slot_idx) const { -+ if (base_reg->is_FloatRegister()) { -+ assert(base_reg->is_concrete(), "must pass base reg"); -+ intptr_t offset_in_bytes = slot_idx * VMRegImpl::stack_slot_size; -+ address base_location = location(base_reg); -+ if (base_location != NULL) { -+ return base_location + offset_in_bytes; -+ } else { -+ return NULL; -+ } -+ } else { -+ return location(base_reg->next(slot_idx)); -+ } -+ } -+#endif -+ -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} -+ -+#endif // CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp +new file mode 100644 +index 000000000..079d581c9 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp @@ -0,0 +1,132 @@ +/* + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. @@ -48086,9 +48029,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +void metadata_Relocation::pd_fix_value(address x) { +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp +new file mode 100644 +index 000000000..c85ca4963 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -48134,9 +48079,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static bool mustIterateImmediateOopsInCode() { return false; } + +#endif // CPU_LOONGARCH_RELOCINFO_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp b/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp +new file mode 100644 +index 000000000..fae11f47e +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/runtime_loongarch_64.cpp @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -48337,13 +48284,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + masm->flush(); + _exception_blob = ExceptionBlob::create(&buffer, oop_maps, framesize); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,3114 @@ +diff --git a/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp +new file mode 100644 +index 000000000..30c06f404 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp +@@ -0,0 +1,3113 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -48670,9 +48619,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +} + +// Is vector's size (in bytes) bigger than a size saved by default? -+// 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. ++// 8 bytes registers are saved by default using fld/fst instructions. +bool SharedRuntime::is_wide_vector(int size) { -+ return size > 16; ++ return size > 8; +} + +// The java_calling_convention describes stack locations as ideal slots on @@ -48802,7 +48751,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // T5 isn't live so capture return address while we easily can + __ move(T5, RA); + -+ __ pushad(); ++ __ push_call_clobbered_registers(); + + // VM needs caller's callsite + // VM needs target method @@ -48817,7 +48766,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + relocInfo::runtime_call_type); + + __ move(SP, TSR); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + __ bind(L); +} + @@ -49236,7 +49185,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); + -+ __ flush(); + return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry); +} + @@ -50272,7 +50220,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ orr(swap_reg, swap_reg, AT); + + __ st_d(swap_reg, lock_reg, mark_word_offset); -+ __ cmpxchg(Address(obj_reg, 0), swap_reg, lock_reg, AT, true, false, lock_done); ++ __ cmpxchg(Address(obj_reg, 0), swap_reg, lock_reg, AT, true, true /* acquire */, lock_done); + // Test if the oopMark is an obvious stack pointer, i.e., + // 1) (mark & 3) == 0, and + // 2) sp <= mark < mark + os::pagesize() @@ -50307,8 +50255,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Now set thread in native + __ addi_d(AT, R0, _thread_in_native); -+ if(os::is_MP()) { -+ __ dbar(0); // store release ++ if (os::is_MP()) { ++ __ membar(Assembler::Membar_mask_bits(__ LoadStore|__ StoreStore)); + } + __ st_w(AT, thread, in_bytes(JavaThread::thread_state_offset())); + } @@ -50363,8 +50311,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // Thread A is resumed to finish this native method, but doesn't block here since it + // didn't see any synchronization is progress, and escapes. + __ addi_d(AT, R0, _thread_in_native_trans); -+ if(os::is_MP()) { -+ __ dbar(0); // store release ++ if (os::is_MP()) { ++ __ membar(Assembler::Membar_mask_bits(__ LoadStore|__ StoreStore)); + } + __ st_w(AT, thread, in_bytes(JavaThread::thread_state_offset())); + @@ -50411,8 +50359,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // change thread state + __ addi_d(AT, R0, _thread_in_Java); -+ if(os::is_MP()) { -+ __ dbar(0); // store release ++ if (os::is_MP()) { ++ __ membar(Assembler::Membar_mask_bits(__ LoadStore|__ StoreStore)); + } + __ st_w(AT, thread, in_bytes(JavaThread::thread_state_offset())); + __ bind(after_transition); @@ -50456,7 +50404,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // get address of the stack lock + __ addi_d (c_rarg0, FP, lock_slot_fp_offset); + // Atomic swap old header if oop still contains the stack lock -+ __ cmpxchg(Address(obj_reg, 0), c_rarg0, T8, AT, false, false, unlock_done, &slow_path_unlock); ++ __ cmpxchg(Address(obj_reg, 0), c_rarg0, T8, AT, false, true /* acquire */, unlock_done, &slow_path_unlock); + + // slow path re-enters here + __ bind(unlock_done); @@ -51455,10 +51403,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return nullptr; +} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,5296 @@ +diff --git a/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp +new file mode 100644 +index 000000000..21bfc7d78 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp +@@ -0,0 +1,5176 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -52189,8 +52139,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // disjoint large copy + void generate_disjoint_large_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + { + UnsafeCopyMemoryMark ucmm(this, true, true); @@ -52202,7 +52152,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ ld_d(A6, A0, 0); + __ ld_d(A7, A2, -8); + -+ __ andi(T1, A0, 7); ++ __ andi(T1, A1, 7); + __ sub_d(T0, R0, T1); + __ addi_d(T0, T0, 8); + @@ -52274,8 +52224,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // disjoint large copy lsx + void generate_disjoint_large_copy_lsx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + { + UnsafeCopyMemoryMark ucmm(this, true, true); @@ -52287,7 +52237,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ vld(F0, A0, 0); + __ vld(F1, A2, -16); + -+ __ andi(T1, A0, 15); ++ __ andi(T1, A1, 15); + __ sub_d(T0, R0, T1); + __ addi_d(T0, T0, 16); + @@ -52359,8 +52309,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // disjoint large copy lasx + void generate_disjoint_large_copy_lasx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + { + UnsafeCopyMemoryMark ucmm(this, true, true); @@ -52372,7 +52322,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ xvld(F0, A0, 0); + __ xvld(F1, A2, -32); + -+ __ andi(T1, A0, 31); ++ __ andi(T1, A1, 31); + __ sub_d(T0, R0, T1); + __ addi_d(T0, T0, 32); + @@ -52444,8 +52394,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // conjoint large copy + void generate_conjoint_large_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + { + UnsafeCopyMemoryMark ucmm(this, true, true); @@ -52457,7 +52407,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ ld_d(A6, A0, 0); + __ ld_d(A7, A2, -8); + -+ __ andi(T1, A2, 7); ++ __ andi(T1, A3, 7); + __ sub_d(A2, A2, T1); + __ sub_d(A5, A3, T1); + @@ -52526,8 +52476,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // conjoint large copy lsx + void generate_conjoint_large_copy_lsx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + { + UnsafeCopyMemoryMark ucmm(this, true, true); @@ -52539,7 +52489,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ vld(F0, A0, 0); + __ vld(F1, A2, -16); + -+ __ andi(T1, A2, 15); ++ __ andi(T1, A3, 15); + __ sub_d(A2, A2, T1); + __ sub_d(A5, A3, T1); + @@ -52608,8 +52558,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // conjoint large copy lasx + void generate_conjoint_large_copy_lasx(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + { + UnsafeCopyMemoryMark ucmm(this, true, true); @@ -52621,7 +52571,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ xvld(F0, A0, 0); + __ xvld(F1, A2, -32); + -+ __ andi(T1, A2, 31); ++ __ andi(T1, A3, 31); + __ sub_d(A2, A2, T1); + __ sub_d(A5, A3, T1); + @@ -52690,8 +52640,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Byte small copy: less than { int:9, lsx:17, lasx:33 } elements. + void generate_byte_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -53055,9 +53005,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // used by generate_conjoint_byte_copy(). + // + address generate_disjoint_byte_copy(bool aligned, Label &small, Label &large, -+ Label &large_aligned, const char * name) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ const char * name) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (UseLASX) @@ -53068,12 +53018,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ sltui(T0, A2, 9); + __ bnez(T0, small); + -+ if (large_aligned.is_bound()) { -+ __ orr(T0, A0, A1); -+ __ andi(T0, T0, 7); -+ __ beqz(T0, large_aligned); -+ } -+ + __ b(large); + + return start; @@ -53095,9 +53039,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // and stored atomically. + // + address generate_conjoint_byte_copy(bool aligned, Label &small, Label &large, -+ Label &large_aligned, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ const char *name) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + array_overlap_test(StubRoutines::jbyte_disjoint_arraycopy(), 0); @@ -53110,12 +53054,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ sltui(T0, A2, 9); + __ bnez(T0, small); + -+ if (large_aligned.is_bound()) { -+ __ orr(T0, A0, A1); -+ __ andi(T0, T0, 7); -+ __ beqz(T0, large_aligned); -+ } -+ + __ b(large); + + return start; @@ -53123,8 +53061,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Short small copy: less than { int:9, lsx:9, lasx:17 } elements. + void generate_short_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -53334,9 +53272,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // used by generate_conjoint_short_copy(). + // + address generate_disjoint_short_copy(bool aligned, Label &small, Label &large, -+ Label &large_aligned, const char * name) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ const char * name) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (UseLASX) @@ -53347,12 +53285,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ slli_d(A2, A2, 1); + -+ if (large_aligned.is_bound()) { -+ __ orr(T0, A0, A1); -+ __ andi(T0, T0, 7); -+ __ beqz(T0, large_aligned); -+ } -+ + __ b(large); + + return start; @@ -53374,9 +53306,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // and stored atomically. + // + address generate_conjoint_short_copy(bool aligned, Label &small, Label &large, -+ Label &large_aligned, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ const char *name) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + array_overlap_test(StubRoutines::jshort_disjoint_arraycopy(), 1); @@ -53389,12 +53321,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ slli_d(A2, A2, 1); + -+ if (large_aligned.is_bound()) { -+ __ orr(T0, A0, A1); -+ __ andi(T0, T0, 7); -+ __ beqz(T0, large_aligned); -+ } -+ + __ b(large); + + return start; @@ -53402,8 +53328,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Int small copy: less than { int:7, lsx:7, lasx:9 } elements. + void generate_int_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -53536,8 +53462,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // Generate maybe oop copy + void gen_maybe_oop_copy(bool is_oop, bool disjoint, bool aligned, Label &small, -+ Label &large, Label &large_aligned, const char *name, -+ int small_limit, int log2_elem_size, bool dest_uninitialized = false) { ++ Label &large, const char *name, int small_limit, ++ int log2_elem_size, bool dest_uninitialized = false) { + Label post, _large; + DecoratorSet decorators = DECORATORS_NONE; + BarrierSetAssembler *bs = nullptr; @@ -53583,20 +53509,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(_large); + __ slli_d(A2, A2, log2_elem_size); + -+ if (large_aligned.is_bound()) { -+ __ orr(T0, A0, A1); -+ __ andi(T0, T0, (1 << (log2_elem_size + 1)) - 1); -+ if (is_oop) { -+ Label skip; -+ __ bnez(T0, skip); -+ __ bl(large_aligned); -+ __ b(post); -+ __ bind(skip); -+ } else { -+ __ beqz(T0, large_aligned); -+ } -+ } -+ + if (is_oop) { + __ bl(large); + } else { @@ -53637,14 +53549,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // used by generate_conjoint_int_oop_copy(). + // + address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, Label &small, -+ Label &large, Label &large_aligned, const char *name, -+ int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ Label &large, const char *name, int small_limit, ++ bool dest_uninitialized = false) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + -+ gen_maybe_oop_copy(is_oop, true, aligned, small, large, large_aligned, -+ name, small_limit, 2, dest_uninitialized); ++ gen_maybe_oop_copy(is_oop, true, aligned, small, large, name, ++ small_limit, 2, dest_uninitialized); + + return start; + } @@ -53665,10 +53577,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // cache line boundaries will still be loaded and stored atomicly. + // + address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, Label &small, -+ Label &large, Label &large_aligned, const char *name, -+ int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ Label &large, const char *name, int small_limit, ++ bool dest_uninitialized = false) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (is_oop) { @@ -53677,16 +53589,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + array_overlap_test(StubRoutines::jint_disjoint_arraycopy(), 2); + } + -+ gen_maybe_oop_copy(is_oop, false, aligned, small, large, large_aligned, -+ name, small_limit, 2, dest_uninitialized); ++ gen_maybe_oop_copy(is_oop, false, aligned, small, large, name, ++ small_limit, 2, dest_uninitialized); + + return start; + } + + // Long small copy: less than { int:4, lsx:4, lasx:5 } elements. + void generate_long_small_copy(Label &entry, const char *name) { -+ StubCodeMark mark(this, "StubRoutines", name); + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + + Label L; + __ bind(entry); @@ -53789,14 +53701,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // used by generate_conjoint_int_oop_copy(). + // + address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, Label &small, -+ Label &large, Label &large_aligned, const char *name, -+ int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ Label &large, const char *name, int small_limit, ++ bool dest_uninitialized = false) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + -+ gen_maybe_oop_copy(is_oop, true, aligned, small, large, large_aligned, -+ name, small_limit, 3, dest_uninitialized); ++ gen_maybe_oop_copy(is_oop, true, aligned, small, large, name, ++ small_limit, 3, dest_uninitialized); + + return start; + } @@ -53817,10 +53729,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + // cache line boundaries will still be loaded and stored atomicly. + // + address generate_conjoint_long_oop_copy(bool aligned, bool is_oop, Label &small, -+ Label &large, Label &large_aligned, const char *name, -+ int small_limit, bool dest_uninitialized = false) { -+ StubCodeMark mark(this, "StubRoutines", name); ++ Label &large, const char *name, int small_limit, ++ bool dest_uninitialized = false) { + __ align(CodeEntryAlignment); ++ StubCodeMark mark(this, "StubRoutines", name); + address start = __ pc(); + + if (is_oop) { @@ -53829,8 +53741,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + array_overlap_test(StubRoutines::jlong_disjoint_arraycopy(), 3); + } + -+ gen_maybe_oop_copy(is_oop, false, aligned, small, large, large_aligned, -+ name, small_limit, 3, dest_uninitialized); ++ gen_maybe_oop_copy(is_oop, false, aligned, small, large, name, ++ small_limit, 3, dest_uninitialized); + + return start; + } @@ -54350,20 +54262,24 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + void generate_arraycopy_stubs() { + Label disjoint_large_copy, conjoint_large_copy; -+ Label disjoint_large_copy_lsx, conjoint_large_copy_lsx; -+ Label disjoint_large_copy_lasx, conjoint_large_copy_lasx; + Label byte_small_copy, short_small_copy, int_small_copy, long_small_copy; -+ Label none; ++ int int_oop_small_limit, long_oop_small_limit; + -+ generate_disjoint_large_copy(disjoint_large_copy, "disjoint_large_copy"); -+ generate_conjoint_large_copy(conjoint_large_copy, "conjoint_large_copy"); -+ if (UseLSX) { -+ generate_disjoint_large_copy_lsx(disjoint_large_copy_lsx, "disjoint_large_copy_lsx"); -+ generate_conjoint_large_copy_lsx(conjoint_large_copy_lsx, "conjoint_large_copy_lsx"); -+ } + if (UseLASX) { -+ generate_disjoint_large_copy_lasx(disjoint_large_copy_lasx, "disjoint_large_copy_lasx"); -+ generate_conjoint_large_copy_lasx(conjoint_large_copy_lasx, "conjoint_large_copy_lasx"); ++ int_oop_small_limit = 9; ++ long_oop_small_limit = 5; ++ generate_disjoint_large_copy_lasx(disjoint_large_copy, "disjoint_large_copy_lasx"); ++ generate_conjoint_large_copy_lasx(conjoint_large_copy, "conjoint_large_copy_lasx"); ++ } else if (UseLSX) { ++ int_oop_small_limit = 7; ++ long_oop_small_limit = 4; ++ generate_disjoint_large_copy_lsx(disjoint_large_copy, "disjoint_large_copy_lsx"); ++ generate_conjoint_large_copy_lsx(conjoint_large_copy, "conjoint_large_copy_lsx"); ++ } else { ++ int_oop_small_limit = 7; ++ long_oop_small_limit = 4; ++ generate_disjoint_large_copy(disjoint_large_copy, "disjoint_large_copy_int"); ++ generate_conjoint_large_copy(conjoint_large_copy, "conjoint_large_copy_int"); + } + generate_byte_small_copy(byte_small_copy, "jbyte_small_copy"); + generate_short_small_copy(short_small_copy, "jshort_small_copy"); @@ -54371,78 +54287,39 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + generate_long_small_copy(long_small_copy, "jlong_small_copy"); + + if (UseCompressedOops) { -+ if (UseLSX) { -+ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, int_small_copy, disjoint_large_copy_lsx, disjoint_large_copy, "oop_disjoint_arraycopy", 7); -+ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, int_small_copy, disjoint_large_copy_lsx, disjoint_large_copy, "oop_disjoint_arraycopy_uninit", 7, true); -+ } else { -+ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, int_small_copy, disjoint_large_copy, none, "oop_disjoint_arraycopy", 7); -+ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, int_small_copy, disjoint_large_copy, none, "oop_disjoint_arraycopy_uninit", 7, true); -+ } -+ if (UseLASX) { -+ StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy_lasx, conjoint_large_copy, "oop_arraycopy", 9); -+ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy_lasx, conjoint_large_copy, "oop_arraycopy_uninit", 9, true); -+ } else if (UseLSX) { -+ StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy_lsx, conjoint_large_copy, "oop_arraycopy", 7); -+ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy_lsx, conjoint_large_copy, "oop_arraycopy_uninit", 7, true); -+ } else { -+ StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy, none, "oop_arraycopy", 7); -+ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy, none, "oop_arraycopy_uninit", 7, true); -+ } -+ } else { -+ if (UseLASX) { -+ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, disjoint_large_copy_lasx, "oop_disjoint_arraycopy", 5); -+ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, disjoint_large_copy_lasx, "oop_disjoint_arraycopy_uninit", 5, true); -+ StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, conjoint_large_copy_lasx, "oop_arraycopy", 5); -+ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, conjoint_large_copy_lasx, "oop_arraycopy_uninit", 5, true); -+ } else if (UseLSX) { -+ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, disjoint_large_copy_lsx, "oop_disjoint_arraycopy", 4); -+ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, disjoint_large_copy_lsx, "oop_disjoint_arraycopy_uninit", 4, true); -+ StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, conjoint_large_copy_lsx, "oop_arraycopy", 4); -+ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, conjoint_large_copy_lsx, "oop_arraycopy_uninit", 4, true); -+ } else { -+ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, none, "oop_disjoint_arraycopy", 4); -+ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, none, "oop_disjoint_arraycopy_uninit", 4, true); -+ StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, none, "oop_arraycopy", 4); -+ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, conjoint_large_copy_lsx, "oop_arraycopy_uninit", 4, true); -+ } -+ } -+ -+ if (UseLASX) { -+ StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, byte_small_copy, disjoint_large_copy_lasx, disjoint_large_copy_lsx, "jbyte_disjoint_arraycopy"); -+ StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, short_small_copy, disjoint_large_copy_lasx, disjoint_large_copy, "jshort_disjoint_arraycopy"); -+ StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, int_small_copy, disjoint_large_copy_lasx, disjoint_large_copy, "jint_disjoint_arraycopy", 9); -+ -+ StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, byte_small_copy, conjoint_large_copy_lasx, conjoint_large_copy_lsx, "jbyte_arraycopy"); -+ StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, short_small_copy, conjoint_large_copy_lasx, conjoint_large_copy, "jshort_arraycopy"); -+ StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, int_small_copy, conjoint_large_copy_lasx, conjoint_large_copy, "jint_arraycopy", 9); -+ } else if (UseLSX) { -+ StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, byte_small_copy, disjoint_large_copy_lsx, none, "jbyte_disjoint_arraycopy"); -+ StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, short_small_copy, disjoint_large_copy_lsx, disjoint_large_copy, "jshort_disjoint_arraycopy"); -+ StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, int_small_copy, disjoint_large_copy_lsx, disjoint_large_copy, "jint_disjoint_arraycopy", 7); -+ -+ StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, byte_small_copy, conjoint_large_copy_lsx, none, "jbyte_arraycopy"); -+ StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, short_small_copy, conjoint_large_copy_lsx, conjoint_large_copy, "jshort_arraycopy"); -+ StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, int_small_copy, conjoint_large_copy_lsx, conjoint_large_copy, "jint_arraycopy", 7); ++ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, int_small_copy, disjoint_large_copy, ++ "oop_disjoint_arraycopy", int_oop_small_limit); ++ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, int_small_copy, disjoint_large_copy, ++ "oop_disjoint_arraycopy_uninit", int_oop_small_limit, true); ++ StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy, ++ "oop_arraycopy", int_oop_small_limit); ++ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, int_small_copy, conjoint_large_copy, ++ "oop_arraycopy_uninit", int_oop_small_limit, true); + } else { -+ StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, byte_small_copy, disjoint_large_copy, none, "jbyte_disjoint_arraycopy"); -+ StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, short_small_copy, disjoint_large_copy, none, "jshort_disjoint_arraycopy"); -+ StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, int_small_copy, disjoint_large_copy, none, "jint_disjoint_arraycopy", 7); -+ -+ StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, byte_small_copy, conjoint_large_copy, none, "jbyte_arraycopy"); -+ StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, short_small_copy, conjoint_large_copy, none, "jshort_arraycopy"); -+ StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, int_small_copy, conjoint_large_copy, none, "jint_arraycopy", 7); -+ } -+ -+ if (UseLASX) { -+ StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, long_small_copy, disjoint_large_copy, disjoint_large_copy_lasx, "jlong_disjoint_arraycopy", 5); -+ StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, long_small_copy, conjoint_large_copy, conjoint_large_copy_lasx, "jlong_arraycopy", 5); -+ } else if (UseLSX) { -+ StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, long_small_copy, disjoint_large_copy, disjoint_large_copy_lsx, "jlong_disjoint_arraycopy", 4); -+ StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, long_small_copy, conjoint_large_copy, conjoint_large_copy_lsx, "jlong_arraycopy", 4); -+ } else { -+ StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, long_small_copy, disjoint_large_copy, none, "jlong_disjoint_arraycopy", 4); -+ StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, long_small_copy, conjoint_large_copy, none, "jlong_arraycopy", 4); -+ } ++ StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, ++ "oop_disjoint_arraycopy", long_oop_small_limit); ++ StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, long_small_copy, disjoint_large_copy, ++ "oop_disjoint_arraycopy_uninit", long_oop_small_limit, true); ++ StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, ++ "oop_arraycopy", long_oop_small_limit); ++ StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, long_small_copy, conjoint_large_copy, ++ "oop_arraycopy_uninit", long_oop_small_limit, true); ++ } ++ ++ StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, byte_small_copy, disjoint_large_copy, "jbyte_disjoint_arraycopy"); ++ StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, short_small_copy, disjoint_large_copy, "jshort_disjoint_arraycopy"); ++ StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, int_small_copy, disjoint_large_copy, ++ "jint_disjoint_arraycopy", int_oop_small_limit); ++ ++ StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, byte_small_copy, conjoint_large_copy, "jbyte_arraycopy"); ++ StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, short_small_copy, conjoint_large_copy, "jshort_arraycopy"); ++ StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, int_small_copy, conjoint_large_copy, ++ "jint_arraycopy", int_oop_small_limit); ++ ++ StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, long_small_copy, disjoint_large_copy, ++ "jlong_disjoint_arraycopy", long_oop_small_limit); ++ StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, long_small_copy, conjoint_large_copy, ++ "jlong_arraycopy", long_oop_small_limit); + + // We don't generate specialized code for HeapWord-aligned source + // arrays, so just use the code we've already generated @@ -54496,7 +54373,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ addi_d(SP, SP, -4 * wordSize); // four words for the returned {SP, FP, RA, PC} + + __ push(V0); -+ __ pushad_except_v0(); ++ __ push_call_clobbered_registers_except(RegSet::of(V0)); + + __ move(A0, T4); + __ call_VM_leaf @@ -54505,7 +54382,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ reset_last_Java_frame(true); + -+ __ popad_except_v0(); ++ __ pop_call_clobbered_registers_except(RegSet::of(V0)); + + __ bnez(V0, deoptimize_label); + @@ -55891,45 +55768,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + return start; + } + -+ // add a function to implement SafeFetch32 and SafeFetchN -+ void generate_safefetch(const char* name, int size, address* entry, -+ address* fault_pc, address* continuation_pc) { -+ // safefetch signatures: -+ // int SafeFetch32(int* adr, int errValue); -+ // intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue); -+ // -+ // arguments: -+ // A0 = adr -+ // A1 = errValue -+ // -+ // result: -+ // PPC_RET = *adr or errValue -+ StubCodeMark mark(this, "StubRoutines", name); -+ -+ // Entry point, pc or function descriptor. -+ *entry = __ pc(); -+ -+ // Load *adr into A1, may fault. -+ *fault_pc = __ pc(); -+ switch (size) { -+ case 4: -+ // int32_t -+ __ ld_w(A1, A0, 0); -+ break; -+ case 8: -+ // int64_t -+ __ ld_d(A1, A0, 0); -+ break; -+ default: -+ ShouldNotReachHere(); -+ } -+ -+ // return errValue or *adr -+ *continuation_pc = __ pc(); -+ __ add_d(V0, A1, R0); -+ __ jr(RA); -+ } -+ + +#undef __ +#define __ masm-> @@ -56683,14 +56521,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + StubRoutines::_dcos = generate_dsin_dcos(/* isCos = */ true); + } + -+ // Safefetch stubs. -+ generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry, -+ &StubRoutines::_safefetch32_fault_pc, -+ &StubRoutines::_safefetch32_continuation_pc); -+ generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry, -+ &StubRoutines::_safefetchN_fault_pc, -+ &StubRoutines::_safefetchN_continuation_pc); -+ +#ifdef COMPILER2 + if (UseMulAddIntrinsic) { + StubRoutines::_mulAdd = generate_mulAdd(); @@ -56755,9 +56585,106 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } + StubGenerator g(code, all); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp +new file mode 100644 +index 000000000..20f2a14af +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp +@@ -0,0 +1,89 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP ++ ++// This file holds the platform specific parts of the StubRoutines ++// definition. See stubRoutines.hpp for a description on how to ++// extend it. ++ ++static bool returns_to_call_stub(address return_pc){ ++ return return_pc == _call_stub_return_address||return_pc == la::get_call_stub_compiled_return(); ++} ++ ++enum platform_dependent_constants { ++ code_size1 = 20000, // simply increase if too small (assembler will crash if too small) ++ code_size2 = 60000 // simply increase if too small (assembler will crash if too small) ++}; ++ ++class la { ++ friend class StubGenerator; ++ friend class VMStructs; ++ private: ++ // If we call compiled code directly from the call stub we will ++ // need to adjust the return back to the call stub to a specialized ++ // piece of code that can handle compiled results and cleaning the fpu ++ // stack. The variable holds that location. ++ static address _call_stub_compiled_return; ++ static address _vector_iota_indices; ++ static juint _crc_table[]; ++ static address _method_entry_barrier; ++ // begin trigonometric tables block. See comments in .cpp file ++ static juint _npio2_hw[]; ++ static jdouble _two_over_pi[]; ++ static jdouble _pio2[]; ++ static jdouble _dsin_coef[]; ++ static jdouble _dcos_coef[]; ++ // end trigonometric tables block ++ ++ static address _string_indexof_linear_ll; ++ static address _string_indexof_linear_uu; ++ static address _string_indexof_linear_ul; ++ ++public: ++ // Call back points for traps in compiled code ++ static address get_call_stub_compiled_return() { return _call_stub_compiled_return; } ++ static void set_call_stub_compiled_return(address ret){ _call_stub_compiled_return = ret; } ++ static address vector_iota_indices() { return _vector_iota_indices; } ++ ++ static address method_entry_barrier() { ++ return _method_entry_barrier; ++ } ++ ++ static address string_indexof_linear_ul() { ++ return _string_indexof_linear_ul; ++ } ++ ++ static address string_indexof_linear_ll() { ++ return _string_indexof_linear_ll; ++ } ++ ++ static address string_indexof_linear_uu() { ++ return _string_indexof_linear_uu; ++ } ++}; ++ ++#endif // CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp +new file mode 100644 +index 000000000..53ded54ae +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -56942,106 +56869,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + 2.73370053816464559624e-44, // 0x36E3822280000000 + 2.16741683877804819444e-51, // 0x3569F31D00000000 +}; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 -@@ -0,0 +1,89 @@ +diff --git a/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp +new file mode 100644 +index 000000000..02af7c8ff +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp +@@ -0,0 +1,2197 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -+ -+// This file holds the platform specific parts of the StubRoutines -+// definition. See stubRoutines.hpp for a description on how to -+// extend it. -+ -+static bool returns_to_call_stub(address return_pc){ -+ return return_pc == _call_stub_return_address||return_pc == la::get_call_stub_compiled_return(); -+} -+ -+enum platform_dependent_constants { -+ code_size1 = 20000, // simply increase if too small (assembler will crash if too small) -+ code_size2 = 60000 // simply increase if too small (assembler will crash if too small) -+}; -+ -+class la { -+ friend class StubGenerator; -+ friend class VMStructs; -+ private: -+ // If we call compiled code directly from the call stub we will -+ // need to adjust the return back to the call stub to a specialized -+ // piece of code that can handle compiled results and cleaning the fpu -+ // stack. The variable holds that location. -+ static address _call_stub_compiled_return; -+ static address _vector_iota_indices; -+ static juint _crc_table[]; -+ static address _method_entry_barrier; -+ // begin trigonometric tables block. See comments in .cpp file -+ static juint _npio2_hw[]; -+ static jdouble _two_over_pi[]; -+ static jdouble _pio2[]; -+ static jdouble _dsin_coef[]; -+ static jdouble _dcos_coef[]; -+ // end trigonometric tables block -+ -+ static address _string_indexof_linear_ll; -+ static address _string_indexof_linear_uu; -+ static address _string_indexof_linear_ul; -+ -+public: -+ // Call back points for traps in compiled code -+ static address get_call_stub_compiled_return() { return _call_stub_compiled_return; } -+ static void set_call_stub_compiled_return(address ret){ _call_stub_compiled_return = ret; } -+ static address vector_iota_indices() { return _vector_iota_indices; } -+ -+ static address method_entry_barrier() { -+ return _method_entry_barrier; -+ } -+ -+ static address string_indexof_linear_ul() { -+ return _string_indexof_linear_ul; -+ } -+ -+ static address string_indexof_linear_ll() { -+ return _string_indexof_linear_ll; -+ } -+ -+ static address string_indexof_linear_uu() { -+ return _string_indexof_linear_uu; -+ } -+}; -+ -+#endif // CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,2196 @@ -+/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -57066,6 +56902,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + +#include "precompiled.hpp" +#include "asm/macroAssembler.hpp" ++#include "classfile/javaClasses.hpp" +#include "gc/shared/barrierSetAssembler.hpp" +#include "interpreter/bytecodeHistogram.hpp" +#include "interpreter/interp_masm.hpp" @@ -58418,8 +58255,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +#endif + + __ li(t, _thread_in_native); -+ if(os::is_MP()) { -+ __ dbar(0); // store release ++ if (os::is_MP()) { ++ __ membar(Assembler::Membar_mask_bits(__ LoadStore|__ StoreStore)); + } + __ st_w(t, thread, in_bytes(JavaThread::thread_state_offset())); + @@ -58443,8 +58280,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ get_thread(thread); +#endif + __ li(t, _thread_in_native_trans); -+ if(os::is_MP()) { -+ __ dbar(0); // store release ++ if (os::is_MP()) { ++ __ membar(Assembler::Membar_mask_bits(__ LoadStore|__ StoreStore)); + } + __ st_w(t, thread, in_bytes(JavaThread::thread_state_offset())); + @@ -58487,8 +58324,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + // change thread state + __ li(t, _thread_in_Java); -+ if(os::is_MP()) { -+ __ dbar(0); // store release ++ if (os::is_MP()) { ++ __ membar(Assembler::Membar_mask_bits(__ LoadStore|__ StoreStore)); + } + __ st_w(t, thread, in_bytes(JavaThread::thread_state_offset())); + __ reset_last_Java_frame(thread, true); @@ -58521,13 +58358,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ ld_w(t, thread, in_bytes(JavaThread::stack_guard_state_offset())); + __ li(AT, (u1)StackOverflow::stack_guard_yellow_reserved_disabled); + __ bne(t, AT, no_reguard); -+ __ pushad(); ++ __ push_call_clobbered_registers(); + __ move(S5_heapbase, SP); + assert(StackAlignmentInBytes == 16, "must be"); + __ bstrins_d(SP, R0, 3, 0); + __ call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages), relocInfo::runtime_call_type); + __ move(SP, S5_heapbase); -+ __ popad(); ++ __ pop_call_clobbered_registers(); + //add for compressedoops + __ reinit_heapbase(); + __ bind(no_reguard); @@ -59235,10 +59072,61 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ bind(L); +} +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,4077 @@ +diff --git a/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp +new file mode 100644 +index 000000000..ddb38faf4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp +@@ -0,0 +1,43 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++ ++ static void prepare_invoke(int byte_no, ++ Register method, // linked method (or i-klass) ++ Register index = noreg, // itable index, MethodType, etc. ++ Register recv = noreg, // if caller wants to see it ++ Register flags = noreg // if caller wants to test it ++ ); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); ++ ++#endif // CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp +new file mode 100644 +index 000000000..2474f90c2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp +@@ -0,0 +1,4043 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -61417,38 +61305,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ jr(T4); +} + -+// ---------------------------------------------------------------------------- -+// Volatile variables demand their effects be made known to all CPU's -+// in order. Store buffers on most chips allow reads & writes to -+// reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode -+// without some kind of memory barrier (i.e., it's not sufficient that -+// the interpreter does not reorder volatile references, the hardware -+// also must not reorder them). -+// -+// According to the new Java Memory Model (JMM): -+// (1) All volatiles are serialized wrt to each other. ALSO reads & -+// writes act as aquire & release, so: -+// (2) A read cannot let unrelated NON-volatile memory refs that -+// happen after the read float up to before the read. It's OK for -+// non-volatile memory refs that happen before the volatile read to -+// float down below it. -+// (3) Similar a volatile write cannot let unrelated NON-volatile -+// memory refs that happen BEFORE the write float down to after the -+// write. It's OK for non-volatile memory refs that happen after the -+// volatile write to float up before it. -+// -+// We only put in barriers around volatile refs (they are expensive), -+// not _between_ memory refs (that would require us to track the -+// flavor of the previous memory refs). Requirements (2) and (3) -+// require some barriers before volatile stores and after volatile -+// loads. These nearly cover requirement (1) but miss the -+// volatile-store-volatile-load case. This final case is placed after -+// volatile-stores although it could just as well go before -+// volatile-loads. -+void TemplateTable::volatile_barrier() { -+ if(os::is_MP()) __ membar(__ StoreLoad); -+} -+ +// we dont shift left 2 bits in get_cache_and_index_at_bcp +// for we always need shift the index we use it. the ConstantPoolCacheEntry +// is 16-byte long, index is the index in @@ -61653,7 +61509,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -61799,7 +61655,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -61915,7 +61771,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreStore | __ LoadStore)); + __ bind(notVolatile); + } + @@ -62087,7 +61943,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreLoad | __ StoreStore)); + __ bind(notVolatile); + } +} @@ -62197,7 +62053,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreStore | __ LoadStore)); + __ bind(notVolatile); + } + @@ -62246,7 +62102,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ StoreLoad | __ StoreStore)); + __ bind(notVolatile); + } +} @@ -62297,7 +62153,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -62341,7 +62197,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -62371,7 +62227,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(MacroAssembler::AnyAny); + __ bind(notVolatile); + } + @@ -62396,7 +62252,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + { + Label notVolatile; + __ beq(scratch, R0, notVolatile); -+ volatile_barrier(); ++ __ membar(Assembler::Membar_mask_bits(__ LoadLoad | __ LoadStore)); + __ bind(notVolatile); + } +} @@ -62719,7 +62575,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ bind(no_such_method); + // throw exception -+ __ pop(Rmethod); // pop return address (pushed by prepare_invoke) + __ restore_bcp(); + __ restore_locals(); + // Pass arguments for generating a verbose error message. @@ -62733,7 +62588,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + __ bind(no_such_interface); + // throw exception -+ __ pop(Rmethod); // pop return address (pushed by prepare_invoke) + __ restore_bcp(); + __ restore_locals(); + // Pass arguments for generating a verbose error message. @@ -63316,307 +63170,99 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + __ alsl_d(SP, AT, SP, Address::times_8 - 1); + __ membar(__ AnyAny);//no membar here for aarch64 +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 -@@ -0,0 +1,43 @@ +diff --git a/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp b/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp +new file mode 100644 +index 000000000..87f6a1132 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp +@@ -0,0 +1,32 @@ +/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -+ -+ static void prepare_invoke(int byte_no, -+ Register method, // linked method (or i-klass) -+ Register index = noreg, // itable index, MethodType, etc. -+ Register recv = noreg, // if caller wants to see it -+ Register flags = noreg // if caller wants to test it -+ ); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ static void volatile_barrier(); -+ -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); -+ -+#endif // CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/universalNativeInvoker_loongarch_64.cpp 2023-09-08 09:39:50.373842049 +0800 -@@ -0,0 +1,32 @@ -+/* -+ * Copyright (c) 2020, Red Hat, Inc. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+#include "precompiled.hpp" -+#include "prims/universalNativeInvoker.hpp" -+#include "utilities/debug.hpp" -+ -+address ProgrammableInvoker::generate_adapter(jobject jabi, jobject jlayout) { -+ Unimplemented(); -+ return nullptr; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp 2023-09-08 09:39:50.373842049 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2020, Red Hat, Inc. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+#include "precompiled.hpp" -+#include "prims/universalUpcallHandler.hpp" -+#include "utilities/debug.hpp" -+ -+address ProgrammableUpcallHandler::generate_upcall_stub(jobject rec, jobject jabi, jobject jlayout) { -+ Unimplemented(); -+ return nullptr; -+} -+ -+address ProgrammableUpcallHandler::generate_optimized_upcall_stub(jobject mh, Method* entry, jobject jabi, jobject jconv) { -+ ShouldNotCallThis(); -+ return nullptr; -+} -+ -+bool ProgrammableUpcallHandler::supports_optimized_upcalls() { -+ return false; -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" -+ -+ -+ -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ for (int j = 0 ; j < RegisterImpl::max_slots_per_register ; j++) { -+ regName[i++] = reg->name(); -+ } -+ reg = reg->successor(); -+ } -+ -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ for (int j = 0 ; j < FloatRegisterImpl::max_slots_per_register ; j++) { -+ regName[i++] = freg->name(); -+ } -+ freg = freg->successor(); -+ } -+ -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -+ -+VMReg VMRegImpl::vmStorageToVMReg(int type, int index) { -+ Unimplemented(); -+ return VMRegImpl::Bad(); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_HPP -+#define CPU_LOONGARCH_VMREG_LOONGARCH_HPP -+ -+inline bool is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; -+} -+ -+inline Register as_Register() { -+ assert( is_Register(), "must be"); -+ return ::as_Register(value() / RegisterImpl::max_slots_per_register); -+} -+ -+inline bool is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; -+} -+ -+inline FloatRegister as_FloatRegister() { -+ assert( is_FloatRegister() && is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) / -+ FloatRegisterImpl::max_slots_per_register); -+} -+ -+inline bool is_concrete() { -+ assert(is_reg(), "must be"); -+ if (is_FloatRegister()) { -+ int base = value() - ConcreteRegisterImpl::max_gpr; -+ return base % FloatRegisterImpl::max_slots_per_register == 0; -+ } else { -+ return is_even(value()); -+ } -+} -+ -+#endif // CPU_LOONGARCH_VMREG_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp jdk17u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp ---- openjdk/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,39 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -+#define CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -+ -+inline VMReg RegisterImpl::as_VMReg() { -+ if( this==noreg ) return VMRegImpl::Bad(); -+ return VMRegImpl::as_VMReg(encoding() * RegisterImpl::max_slots_per_register); -+} -+ -+inline VMReg FloatRegisterImpl::as_VMReg() { -+ return VMRegImpl::as_VMReg((encoding() * FloatRegisterImpl::max_slots_per_register) + -+ ConcreteRegisterImpl::max_gpr); -+} -+ -+#endif // CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 -@@ -0,0 +1,61 @@ -+/* -+ * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2020, Red Hat, Inc. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ */ ++ ++#include "precompiled.hpp" ++#include "prims/universalNativeInvoker.hpp" ++#include "utilities/debug.hpp" ++ ++address ProgrammableInvoker::generate_adapter(jobject jabi, jobject jlayout) { ++ Unimplemented(); ++ return nullptr; ++} +diff --git a/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp +new file mode 100644 +index 000000000..7586b0848 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/universalUpcallHandler_loongarch_64.cpp +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2020, Red Hat, Inc. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ */ ++ ++#include "precompiled.hpp" ++#include "prims/universalUpcallHandler.hpp" ++#include "utilities/debug.hpp" ++ ++address ProgrammableUpcallHandler::generate_upcall_stub(jobject rec, jobject jabi, jobject jlayout) { ++ Unimplemented(); ++ return nullptr; ++} ++ ++address ProgrammableUpcallHandler::generate_optimized_upcall_stub(jobject mh, Method* entry, jobject jabi, jobject jconv) { ++ ShouldNotCallThis(); ++ return nullptr; ++} ++ ++bool ProgrammableUpcallHandler::supports_optimized_upcalls() { ++ return false; ++} +diff --git a/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp +new file mode 100644 +index 000000000..5b9f7b789 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp +@@ -0,0 +1,61 @@ ++/* ++ * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -63676,9 +63322,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + /* be present there) */ + +#endif // CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp +new file mode 100644 +index 000000000..31da20e6f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.cpp @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. @@ -63765,9 +63413,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); + return tmp; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp 2023-09-08 09:39:50.373842049 +0800 +diff --git a/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp +new file mode 100644 +index 000000000..1a9312313 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_ext_loongarch.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. @@ -63823,10 +63473,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_VM_VERSION_EXT_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,448 @@ +diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp +new file mode 100644 +index 000000000..1a1ac9231 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp +@@ -0,0 +1,432 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -63974,27 +63626,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + } else if (_cpuid_info.cpucfg_info_id1.bits.ARCH == 0b10 ) { + result |= CPU_LA64; + } -+ if (_cpuid_info.cpucfg_info_id1.bits.UAL != 0) -+ result |= CPU_UAL; + + if (_cpuid_info.cpucfg_info_id2.bits.FP_CFG != 0) + result |= CPU_FP; -+ if (_cpuid_info.cpucfg_info_id2.bits.LSX != 0) -+ result |= CPU_LSX; -+ if (_cpuid_info.cpucfg_info_id2.bits.LASX != 0) -+ result |= CPU_LASX; -+ if (_cpuid_info.cpucfg_info_id2.bits.COMPLEX != 0) -+ result |= CPU_COMPLEX; -+ if (_cpuid_info.cpucfg_info_id2.bits.CRYPTO != 0) -+ result |= CPU_CRYPTO; -+ if (_cpuid_info.cpucfg_info_id2.bits.LBT_X86 != 0) -+ result |= CPU_LBT_X86; -+ if (_cpuid_info.cpucfg_info_id2.bits.LBT_ARM != 0) -+ result |= CPU_LBT_ARM; -+ if (_cpuid_info.cpucfg_info_id2.bits.LBT_MIPS != 0) -+ result |= CPU_LBT_MIPS; -+ if (_cpuid_info.cpucfg_info_id2.bits.LAM != 0) -+ result |= CPU_LAM; + + if (_cpuid_info.cpucfg_info_id3.bits.CCDMA != 0) + result |= CPU_CCDMA; @@ -64014,18 +63648,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + clean_cpuFeatures(); + ++ get_os_cpu_info(); ++ + get_cpu_info_stub(&_cpuid_info); -+ _features = get_feature_flags_by_cpucfg(); ++ _features |= get_feature_flags_by_cpucfg(); + + _supports_cx8 = true; + + if (UseG1GC && FLAG_IS_DEFAULT(MaxGCPauseMillis)) { -+ FLAG_SET_CMDLINE(MaxGCPauseMillis, 650); ++ FLAG_SET_DEFAULT(MaxGCPauseMillis, 150); + } + + if (supports_lsx()) { + if (FLAG_IS_DEFAULT(UseLSX)) { -+ //FLAG_SET_DEFAULT(UseLSX, true); ++ FLAG_SET_DEFAULT(UseLSX, true); + } + } else if (UseLSX) { + warning("LSX instructions are not available on this CPU"); @@ -64034,7 +63670,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + if (supports_lasx()) { + if (FLAG_IS_DEFAULT(UseLASX)) { -+ //FLAG_SET_DEFAULT(UseLASX, true); ++ FLAG_SET_DEFAULT(UseLASX, true); + } + } else if (UseLASX) { + warning("LASX instructions are not available on this CPU"); @@ -64275,13 +63911,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + + get_processor_features(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp ---- openjdk/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,294 @@ +diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp +new file mode 100644 +index 000000000..cae9f863c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp +@@ -0,0 +1,295 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -64477,25 +64115,26 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + }; + +#define CPU_FEATURE_FLAGS(decl) \ -+ decl(LA32, la32, 1) \ -+ decl(LA64, la64, 2) \ -+ decl(LLEXC, llexc, 3) \ -+ decl(SCDLY, scdly, 4) \ -+ decl(LLDBAR, lldbar, 5) \ -+ decl(LBT_X86, lbt_x86, 6) \ -+ decl(LBT_ARM, lbt_arm, 7) \ -+ decl(LBT_MIPS, lbt_mips, 8) \ -+ decl(CCDMA, ccdma, 9) \ -+ decl(COMPLEX, complex, 10) \ -+ decl(FP, fp, 11) \ -+ decl(CRYPTO, crypto, 14) \ -+ decl(LSX, lsx, 15) \ -+ decl(LASX, lasx, 17) \ -+ decl(LAM, lam, 21) \ -+ decl(LLSYNC, llsync, 23) \ -+ decl(TGTSYNC, tgtsync, 24) \ -+ decl(ULSYNC, ulsync, 25) \ -+ decl(UAL, ual, 26) ++ decl(LAM, lam, 1) \ ++ decl(UAL, ual, 2) \ ++ decl(LSX, lsx, 4) \ ++ decl(LASX, lasx, 5) \ ++ decl(COMPLEX, complex, 7) \ ++ decl(CRYPTO, crypto, 8) \ ++ decl(LBT_X86, lbt_x86, 10) \ ++ decl(LBT_ARM, lbt_arm, 11) \ ++ decl(LBT_MIPS, lbt_mips, 12) \ ++ /* flags above must follow Linux HWCAP */ \ ++ decl(LA32, la32, 13) \ ++ decl(LA64, la64, 14) \ ++ decl(FP, fp, 15) \ ++ decl(LLEXC, llexc, 16) \ ++ decl(SCDLY, scdly, 17) \ ++ decl(LLDBAR, lldbar, 18) \ ++ decl(CCDMA, ccdma, 19) \ ++ decl(LLSYNC, llsync, 20) \ ++ decl(TGTSYNC, tgtsync, 21) \ ++ decl(ULSYNC, ulsync, 22) \ + + enum Feature_Flag { +#define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (1 << bit), @@ -64526,8 +64165,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + static CpuidInfo _cpuid_info; + + static uint32_t get_feature_flags_by_cpucfg(); -+ static int get_feature_flags_by_cpuinfo(int features); + static void get_processor_features(); ++ static void get_os_cpu_info(); + +public: + // Offsets for cpuid asm stub @@ -64573,9 +64212,184 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ +}; + +#endif // CPU_LOONGARCH_VM_VERSION_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp jdk17u-ls/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp ---- openjdk/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp +new file mode 100644 +index 000000000..79d2560f4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ for (int j = 0 ; j < RegisterImpl::max_slots_per_register ; j++) { ++ regName[i++] = reg->name(); ++ } ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ for (int j = 0 ; j < FloatRegisterImpl::max_slots_per_register ; j++) { ++ regName[i++] = freg->name(); ++ } ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} ++ ++VMReg VMRegImpl::vmStorageToVMReg(int type, int index) { ++ Unimplemented(); ++ return VMRegImpl::Bad(); ++} +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp +new file mode 100644 +index 000000000..819eaff0b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++#define CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++ ++inline bool is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline Register as_Register() { ++ assert( is_Register(), "must be"); ++ return ::as_Register(value() / RegisterImpl::max_slots_per_register); ++} ++ ++inline bool is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline FloatRegister as_FloatRegister() { ++ assert( is_FloatRegister() && is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) / ++ FloatRegisterImpl::max_slots_per_register); ++} ++ ++inline bool is_concrete() { ++ assert(is_reg(), "must be"); ++ if (is_FloatRegister()) { ++ int base = value() - ConcreteRegisterImpl::max_gpr; ++ return base % FloatRegisterImpl::max_slots_per_register == 0; ++ } else { ++ return is_even(value()); ++ } ++} ++ ++#endif // CPU_LOONGARCH_VMREG_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp +new file mode 100644 +index 000000000..edb78e36d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp +@@ -0,0 +1,39 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP ++#define CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP ++ ++inline VMReg RegisterImpl::as_VMReg() { ++ if( this==noreg ) return VMRegImpl::Bad(); ++ return VMRegImpl::as_VMReg(encoding() * RegisterImpl::max_slots_per_register); ++} ++ ++inline VMReg FloatRegisterImpl::as_VMReg() { ++ return VMRegImpl::as_VMReg((encoding() * FloatRegisterImpl::max_slots_per_register) + ++ ConcreteRegisterImpl::max_gpr); ++} ++ ++#endif // CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP +diff --git a/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp +new file mode 100644 +index 000000000..6a190529b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp @@ -0,0 +1,331 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. @@ -64908,9 +64722,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/loongarch/ + const unsigned int icache_line_size = wordSize; + return icache_line_size; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp ---- openjdk/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp b/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp +new file mode 100644 +index 000000000..c34334ec4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/abstractInterpreter_mips.cpp @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -65045,10 +64861,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/abstr + *interpreter_frame->interpreter_frame_mirror_addr() = method->method_holder()->java_mirror(); +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/assembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/assembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/assembler_mips.cpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,934 @@ +diff --git a/src/hotspot/cpu/mips/assembler_mips.cpp b/src/hotspot/cpu/mips/assembler_mips.cpp +new file mode 100644 +index 000000000..2205ef1a4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/assembler_mips.cpp +@@ -0,0 +1,764 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -65088,9 +64906,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +#include "runtime/sharedRuntime.hpp" +#include "runtime/stubRoutines.hpp" +#include "utilities/macros.hpp" -+#ifndef PRODUCT -+#include "compiler/disassembler.hpp" -+#endif + +#ifdef PRODUCT +#define BLOCK_COMMENT(str) /* nothing */ @@ -65797,8 +65612,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +void Assembler::emit_long(int x) { // shadows AbstractAssembler::emit_long + check_delay(); + AbstractAssembler::emit_int32(x); -+ if (PatchContinuousLoad) -+ check_load_and_patch(x); +} + +inline void Assembler::emit_data(int x) { emit_long(x); } @@ -65818,175 +65631,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + delay_state = no_delay; +#endif +} -+ -+// Check If an Instruction Is a Load Instruction -+ -+// All load instructions includes: -+// 1. FIRST OPS -+// LDL, LDR, LB, LH, LWL, LW, LBU, LHU, LWR, LWU, LD, LWC1, PREF, LDC1 -+// 2. SPECIAL OPS -+// MOVF, MOVT -+// 3. COP0 OPS -+// MFC0, DMFC0, MFGC0, DMFGC0 -+// 4. COP1 OPS -+// MFC1, DMFC1, CFC1, MFHC1, MTC1, DMTC1, CTC1, MTHC1, MOVZ.FMT, MOVN.FMT -+// 5. COP1X OPS -+// LWXC1, LDXC1, LUXC1, PREFX -+// 6. SPECIAL2 OPs -+// CAMPV, CAMPI, RAMRI -+// 7. SPECIAL3 OPS -+// LWX, LHX, LBUX, LDX, RDHWR -+// 8. LWC2 OPS -+// GSLWLC1, GSLWRC1, GSLDLC1, GSLDRC1, GSLBLE, GSLBGT, -+// GSLHLE, GSLHGT, GSLWLE, GSLWGT, GSLDLE, GSLDGT, -+// LWDIR, LWPTE, LDDIR, LDPTE -+// GSLWLEC1, GSLWGTC1, GSLDLEC1, GSLDGTC1 -+// 9. LDC2 OPS -+// ALL LDC2 OPS(GSLBX, GSLHX, GSLWX, GSLDX, GSLWXC1, GSLDXC1) -+ -+#define SPECIAL_MOVCI_OP_MASK 0b1111110000000100000011111111111 -+bool Assembler::is_load_op(int x) { -+ assert(PatchContinuousLoad, "just checking"); -+ int ins = x; -+ int op = (ins >> 26) & 0x3f; -+ switch (op) { -+ //first_ops: ldl, ldr, lb, lh, lwl, lw, lbu, lhu, lwr, lwu, ld, lwc1, pref, ldc1, ldc2_ops -+ case ldl_op: -+ case ldr_op: -+ case lb_op: -+ case lh_op: -+ case lwl_op: -+ case lw_op: -+ case lbu_op: -+ case lhu_op: -+ case lwr_op: -+ case lwu_op: -+ case ld_op: -+ case lwc1_op: -+ case pref_op: -+ case ldc1_op: -+ //ldc2_ops: gslbx, gslhx, gslwx, gsldx, gslwxc1, gsldxc1 -+ case gs_ldc2_op: -+ return true; -+ //special_ops: movf, movt -+ case special_op: -+ if ((ins & SPECIAL_MOVCI_OP_MASK) == movci_op) -+ return true; -+ else -+ return false; -+ //cop0_ops: mfc0, dmfc0, mfgc0, dmfgc0 -+ case cop0_op: -+ switch ((ins >> 21) & 0x1f) { -+ case mfc0_op: -+ case dmfc0_op: -+ return true; -+ case mxgc0_op: -+ if ((ins >> 9 & 1) == 0) -+ return true; -+ default: -+ return false; -+ } -+ //cop1_ops: mfc1, dmfc1, cfc1, mfhc1, mtc1, dmtc1, ctc1, mthc1, movz.fmt, movn.fmt -+ case cop1_op: -+ switch ((ins >> 21) & 0x1f) { -+ case cfc1_op: -+ case mfhc1_op: -+ case mtc1_op: -+ case dmtc1_op: -+ case ctc1_op: -+ case mthc1_op: -+ return true; -+ case single_fmt: -+ case double_fmt: -+ case ps_fmt: -+ if ((ins & 0x3f == movz_f_op) || (ins & 0x3f == movn_f_op)) -+ return true; -+ default: -+ return false; -+ } -+ //cop1x_ops: lwxc1, ldxc1, luxc1, prefx -+ case cop1x_op: -+ switch (ins & 0x3f) { -+ case lwxc1_op: -+ case ldxc1_op: -+ case luxc1_op: -+ case prefx_op: -+ return true; -+ default: -+ return false; -+ } -+ //special2_ops: campv, campi, ramri -+ case special2_op: -+ switch (ins & 0xff) { -+ case campv_op << 6 | gscam_op: -+ case campi_op << 6 | gscam_op: -+ case ramri_op << 6 | gscam_op: -+ return true; -+ default: -+ return false; -+ } -+ //special3_ops: lwx, lhx, lbux, ldx, rdhwr -+ case special3_op: -+ switch (ins & 0x3f) { -+ case lxx_op: -+ case rdhwr_op: -+ return true; -+ default: -+ return false; -+ } -+ //lwc2_ops: gslwlc1, gslwrc1, gsldlc1, gsldrc1, gslble, gslbgt, gslhle, gslhgt, gslwle, gslwgt, -+ // gsldle, gsldgt, gslwlec1, gslwgtc1, gsldlec1, gsldgtc1 -+ case gs_lwc2_op: -+ if ((ins >> 5 & 1) == 0) //gslq, gslqc1 are excluded. -+ return true; -+ else -+ return false; -+ default: -+ return false; -+ } -+ return false; -+} -+ -+#define MAX_LOADS_INSTRUCTION_SEQUENCE_LEN 3 -+void Assembler::check_load_and_patch(int x) { -+ ResourceMark rm; -+ int load_count = 0; -+ assert(PatchContinuousLoad, "just checking"); -+ if (is_load_op(x)) { -+ load_count = code()->get_continuous_load_instuctions_count(); -+ code()->set_continuous_load_instuctions_count(++load_count); -+ if (load_count >= MAX_LOADS_INSTRUCTION_SEQUENCE_LEN) { -+ assert(load_count == MAX_LOADS_INSTRUCTION_SEQUENCE_LEN, "load_count should not be greater than MAX_LOADS_INSTRUCTION_SEQUENCE_LEN"); -+#ifndef PRODUCT -+ if (code()->get_continuous_load_instuctions_count() != MAX_LOADS_INSTRUCTION_SEQUENCE_LEN) -+ tty->print_cr("get_continuous_load_instuctions_count() returns %d, which should be %d", code()->get_continuous_load_instuctions_count(), MAX_LOADS_INSTRUCTION_SEQUENCE_LEN); -+ if (TracePatchContinuousLoad && PatchContinuousLoad) { -+ tty->print_cr("found %d consecutive loads, separated by a nop, pc: %p", load_count, pc()); -+ int i; -+ for (i = -MAX_LOADS_INSTRUCTION_SEQUENCE_LEN; i <= 0; i++) -+ tty->print_cr("loads %d(" INTPTR_FORMAT "-" INTPTR_FORMAT "): ", i, p2i(pc()+(i*4)), p2i(pc()+(i*4)+4)); -+ Disassembler::decode(pc()+(i*4), pc()+(i*4)+4, tty); -+ tty->print_cr(" -> nop"); -+ Disassembler::decode((address)&x, (address)&x+4, tty); -+ } -+#endif -+ nop(); /*do a patch here, consecutive loads separated by a nop*/ -+ code()->set_continuous_load_instuctions_count(0); -+ } -+ } else { -+ code()->set_continuous_load_instuctions_count(0); -+ } -+#ifndef PRODUCT -+ load_count = code()->get_continuous_load_instuctions_count(); -+ if (load_count >= MAX_LOADS_INSTRUCTION_SEQUENCE_LEN) -+ tty->print_cr("wrong load_count: %d", load_count); -+ assert(load_count < MAX_LOADS_INSTRUCTION_SEQUENCE_LEN, "just checking"); -+#endif -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/assembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/assembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/assembler_mips.hpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,1787 @@ +diff --git a/src/hotspot/cpu/mips/assembler_mips.hpp b/src/hotspot/cpu/mips/assembler_mips.hpp +new file mode 100644 +index 000000000..8d0d9e0eb +--- /dev/null ++++ b/src/hotspot/cpu/mips/assembler_mips.hpp +@@ -0,0 +1,1777 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -66635,13 +66285,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + gssdbbp_op = 0x38 + }; + -+ enum gscam_ops { -+ campv_op = 0x0, -+ campi_op = 0x1, -+ camwi_op = 0x2, -+ ramri_op = 0x3 -+ }; -+ + static const char* special2_name[]; + + // special3 family, the opcode is in low 6 bits. @@ -66666,8 +66309,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem + re2_op = 0x16, //MIPS DSP, re2_ops + sh2_op = 0x17, //MIPS DSP + ar3_op = 0x18, //MIPS DSP -+ bshfl_op = 0x20, //seb, seh -+ rdhwr_op = 0x3b ++ bshfl_op = 0x20 //seb, seh + }; + + // re1_ops @@ -66914,8 +66556,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +#endif + } + -+ bool is_load_op(int); -+ void check_load_and_patch(int); +protected: + // Delay slot helpers + // cti is called when emitting control-transfer instruction, @@ -67774,9 +67414,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +}; + +#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assembler_mips.inline.hpp jdk17u-ls/src/hotspot/cpu/mips/assembler_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/assembler_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/assembler_mips.inline.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/assembler_mips.inline.hpp b/src/hotspot/cpu/mips/assembler_mips.inline.hpp +new file mode 100644 +index 000000000..39aeb5509 +--- /dev/null ++++ b/src/hotspot/cpu/mips/assembler_mips.inline.hpp @@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -67811,9 +67453,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/assem +#include "code/codeCache.hpp" + +#endif // CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/bytes_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/bytes_mips.hpp ---- openjdk/src/hotspot/cpu/mips/bytes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/bytes_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/bytes_mips.hpp b/src/hotspot/cpu/mips/bytes_mips.hpp +new file mode 100644 +index 000000000..4172db219 +--- /dev/null ++++ b/src/hotspot/cpu/mips/bytes_mips.hpp @@ -0,0 +1,181 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -67996,142 +67640,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/bytes +#include OS_CPU_HEADER_INLINE(bytes) + +#endif // CPU_MIPS_VM_BYTES_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_globals_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/c2_globals_mips.hpp ---- openjdk/src/hotspot/cpu/mips/c2_globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/c2_globals_mips.hpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,91 @@ -+/* -+ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP -+#define CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP -+ -+#include "utilities/globalDefinitions.hpp" -+#include "utilities/macros.hpp" -+ -+// Sets the default values for platform dependent flags used by the server compiler. -+// (see c2_globals.hpp). Alpha-sorted. -+define_pd_global(bool, BackgroundCompilation, true); -+define_pd_global(bool, UseTLAB, true); -+define_pd_global(bool, ResizeTLAB, true); -+define_pd_global(bool, CICompileOSR, true); -+define_pd_global(bool, InlineIntrinsics, true); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, true); -+define_pd_global(bool, UseOnStackReplacement, true); -+define_pd_global(bool, ProfileInterpreter, true); -+// Disable C1 in server JIT -+define_pd_global(bool, TieredCompilation, false); -+define_pd_global(intx, CompileThreshold, 10000); -+define_pd_global(intx, BackEdgeThreshold, 100000); -+ -+define_pd_global(intx, OnStackReplacePercentage, 140); -+define_pd_global(intx, ConditionalMoveLimit, 3); -+define_pd_global(intx, FLOATPRESSURE, 31); -+define_pd_global(intx, FreqInlineSize, 325); -+define_pd_global(intx, MinJumpTableSize, 10); -+define_pd_global(intx, INTPRESSURE, 21); -+define_pd_global(intx, InteriorEntryAlignment, 16); -+define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); -+define_pd_global(intx, LoopUnrollLimit, 60); -+define_pd_global(intx, LoopPercentProfileLimit, 10); -+// InitialCodeCacheSize derived from specjbb2000 run. -+define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize -+define_pd_global(intx, CodeCacheExpansionSize, 64*K); -+ -+// Ergonomics related flags -+define_pd_global(uint64_t,MaxRAM, 128ULL*G); -+define_pd_global(intx, RegisterCostAreaRatio, 16000); -+ -+// Peephole and CISC spilling both break the graph, and so makes the -+// scheduler sick. -+define_pd_global(bool, OptoPeephole, false); -+define_pd_global(bool, UseCISCSpill, false); -+define_pd_global(bool, OptoScheduling, false); -+define_pd_global(bool, OptoBundling, false); -+define_pd_global(bool, OptoRegScheduling, false); -+define_pd_global(bool, SuperWordLoopUnrollAnalysis, true); -+define_pd_global(bool, IdealizeClearArrayNode, true); -+ -+define_pd_global(intx, ReservedCodeCacheSize, 120*M); -+define_pd_global(intx, NonProfiledCodeHeapSize, 57*M); -+define_pd_global(intx, ProfiledCodeHeapSize, 58*M); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 4); -+define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); -+ -+define_pd_global(bool, TrapBasedRangeChecks, false); -+ -+// Heap related flags -+define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M)); -+ -+// Ergonomics related flags -+define_pd_global(bool, NeverActAsServerClassMachine, false); -+ -+#endif // CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_init_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/c2_init_mips.cpp ---- openjdk/src/hotspot/cpu/mips/c2_init_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/c2_init_mips.cpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,34 @@ -+/* -+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "opto/compile.hpp" -+#include "opto/node.hpp" -+ -+// processor dependent initialization for mips -+ -+void Compile::pd_compiler2_init() { -+ guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp b/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp +new file mode 100644 +index 000000000..3d98ec11f +--- /dev/null ++++ b/src/hotspot/cpu/mips/c2_MacroAssembler_mips.cpp @@ -0,0 +1,614 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. @@ -68747,9 +68260,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_Ma + ShouldNotReachHere(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp b/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp +new file mode 100644 +index 000000000..7bdf6e521 +--- /dev/null ++++ b/src/hotspot/cpu/mips/c2_MacroAssembler_mips.hpp @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. @@ -68913,10 +68428,149 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/c2_Ma + void gs_loadstore(FloatRegister reg, Register base, Register index, int disp, int type); + +#endif // CPU_MIPS_VM_C2_MACROASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/codeBuffer_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/codeBuffer_mips.hpp ---- openjdk/src/hotspot/cpu/mips/codeBuffer_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/codeBuffer_mips.hpp 2023-09-08 09:39:50.377842054 +0800 -@@ -0,0 +1,38 @@ +diff --git a/src/hotspot/cpu/mips/c2_globals_mips.hpp b/src/hotspot/cpu/mips/c2_globals_mips.hpp +new file mode 100644 +index 000000000..f452cebf5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/c2_globals_mips.hpp +@@ -0,0 +1,91 @@ ++/* ++ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP ++#define CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP ++ ++#include "utilities/globalDefinitions.hpp" ++#include "utilities/macros.hpp" ++ ++// Sets the default values for platform dependent flags used by the server compiler. ++// (see c2_globals.hpp). Alpha-sorted. ++define_pd_global(bool, BackgroundCompilation, true); ++define_pd_global(bool, UseTLAB, true); ++define_pd_global(bool, ResizeTLAB, true); ++define_pd_global(bool, CICompileOSR, true); ++define_pd_global(bool, InlineIntrinsics, true); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, true); ++define_pd_global(bool, UseOnStackReplacement, true); ++define_pd_global(bool, ProfileInterpreter, true); ++// Disable C1 in server JIT ++define_pd_global(bool, TieredCompilation, false); ++define_pd_global(intx, CompileThreshold, 10000); ++define_pd_global(intx, BackEdgeThreshold, 100000); ++ ++define_pd_global(intx, OnStackReplacePercentage, 140); ++define_pd_global(intx, ConditionalMoveLimit, 3); ++define_pd_global(intx, FLOATPRESSURE, 31); ++define_pd_global(intx, FreqInlineSize, 325); ++define_pd_global(intx, MinJumpTableSize, 10); ++define_pd_global(intx, INTPRESSURE, 21); ++define_pd_global(intx, InteriorEntryAlignment, 16); ++define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); ++define_pd_global(intx, LoopUnrollLimit, 60); ++define_pd_global(intx, LoopPercentProfileLimit, 10); ++// InitialCodeCacheSize derived from specjbb2000 run. ++define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize ++define_pd_global(intx, CodeCacheExpansionSize, 64*K); ++ ++// Ergonomics related flags ++define_pd_global(uint64_t,MaxRAM, 128ULL*G); ++define_pd_global(intx, RegisterCostAreaRatio, 16000); ++ ++// Peephole and CISC spilling both break the graph, and so makes the ++// scheduler sick. ++define_pd_global(bool, OptoPeephole, false); ++define_pd_global(bool, UseCISCSpill, false); ++define_pd_global(bool, OptoScheduling, false); ++define_pd_global(bool, OptoBundling, false); ++define_pd_global(bool, OptoRegScheduling, false); ++define_pd_global(bool, SuperWordLoopUnrollAnalysis, true); ++define_pd_global(bool, IdealizeClearArrayNode, true); ++ ++define_pd_global(intx, ReservedCodeCacheSize, 120*M); ++define_pd_global(intx, NonProfiledCodeHeapSize, 57*M); ++define_pd_global(intx, ProfiledCodeHeapSize, 58*M); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 4); ++define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); ++ ++define_pd_global(bool, TrapBasedRangeChecks, false); ++ ++// Heap related flags ++define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M)); ++ ++// Ergonomics related flags ++define_pd_global(bool, NeverActAsServerClassMachine, false); ++ ++#endif // CPU_MIPS_VM_C2_GLOBALS_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/c2_init_mips.cpp b/src/hotspot/cpu/mips/c2_init_mips.cpp +new file mode 100644 +index 000000000..e6d5815f4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/c2_init_mips.cpp +@@ -0,0 +1,34 @@ ++/* ++ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "opto/compile.hpp" ++#include "opto/node.hpp" ++ ++// processor dependent initialization for mips ++ ++void Compile::pd_compiler2_init() { ++ guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); ++} +diff --git a/src/hotspot/cpu/mips/codeBuffer_mips.hpp b/src/hotspot/cpu/mips/codeBuffer_mips.hpp +new file mode 100644 +index 000000000..3cc191006 +--- /dev/null ++++ b/src/hotspot/cpu/mips/codeBuffer_mips.hpp +@@ -0,0 +1,35 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. @@ -68947,21 +68601,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/codeB + +private: + void pd_initialize() {} -+ int _continuous_load_instuctions_count; + +public: + void flush_bundle(bool start_new_bundle) {} -+ int get_continuous_load_instuctions_count() const { return _continuous_load_instuctions_count; } -+ int set_continuous_load_instuctions_count(int x) { return _continuous_load_instuctions_count = x; } + +#endif // CPU_MIPS_VM_CODEBUFFER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/compiledIC_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/compiledIC_mips.cpp ---- openjdk/src/hotspot/cpu/mips/compiledIC_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/compiledIC_mips.cpp 2023-11-01 10:27:44.281760850 +0800 -@@ -0,0 +1,148 @@ +diff --git a/src/hotspot/cpu/mips/compiledIC_mips.cpp b/src/hotspot/cpu/mips/compiledIC_mips.cpp +new file mode 100644 +index 000000000..81f67a92a +--- /dev/null ++++ b/src/hotspot/cpu/mips/compiledIC_mips.cpp +@@ -0,0 +1,147 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -68992,7 +68645,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/compi +#include "memory/resourceArea.hpp" +#include "runtime/mutexLocker.hpp" +#include "runtime/safepoint.hpp" -+#include "opto/matcher.hpp" + +// ---------------------------------------------------------------------------- + @@ -69107,9 +68759,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/compi +} + +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/copy_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/copy_mips.hpp ---- openjdk/src/hotspot/cpu/mips/copy_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/copy_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/copy_mips.hpp b/src/hotspot/cpu/mips/copy_mips.hpp +new file mode 100644 +index 000000000..dcc77adfe +--- /dev/null ++++ b/src/hotspot/cpu/mips/copy_mips.hpp @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -69188,9 +68842,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/copy_ +} + +#endif //CPU_MIPS_VM_COPY_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depChecker_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/depChecker_mips.cpp ---- openjdk/src/hotspot/cpu/mips/depChecker_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/depChecker_mips.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/depChecker_mips.cpp b/src/hotspot/cpu/mips/depChecker_mips.cpp +new file mode 100644 +index 000000000..756ccb68f +--- /dev/null ++++ b/src/hotspot/cpu/mips/depChecker_mips.cpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -69222,9 +68878,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depCh +#include "depChecker_mips.hpp" + +// Nothing to do on mips -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depChecker_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/depChecker_mips.hpp ---- openjdk/src/hotspot/cpu/mips/depChecker_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/depChecker_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/depChecker_mips.hpp b/src/hotspot/cpu/mips/depChecker_mips.hpp +new file mode 100644 +index 000000000..11e52b4e8 +--- /dev/null ++++ b/src/hotspot/cpu/mips/depChecker_mips.hpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -69257,9 +68915,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/depCh +// Nothing to do on MIPS + +#endif // CPU_MIPS_VM_DEPCHECKER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/disassembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/disassembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/disassembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/disassembler_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/disassembler_mips.hpp b/src/hotspot/cpu/mips/disassembler_mips.hpp +new file mode 100644 +index 000000000..1ca0053b9 +--- /dev/null ++++ b/src/hotspot/cpu/mips/disassembler_mips.hpp @@ -0,0 +1,57 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -69318,9 +68978,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/disas + static void annotate(address pc, outputStream* st) { }; + +#endif // CPU_MIPS_VM_DISASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/foreign_globals_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/foreign_globals_mips.cpp ---- openjdk/src/hotspot/cpu/mips/foreign_globals_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/foreign_globals_mips.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/foreign_globals_mips.cpp b/src/hotspot/cpu/mips/foreign_globals_mips.cpp +new file mode 100644 +index 000000000..fb4647c27 +--- /dev/null ++++ b/src/hotspot/cpu/mips/foreign_globals_mips.cpp @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -69364,9 +69026,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/forei + ShouldNotCallThis(); + return {}; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/foreign_globals_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/foreign_globals_mips.hpp ---- openjdk/src/hotspot/cpu/mips/foreign_globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/foreign_globals_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/foreign_globals_mips.hpp b/src/hotspot/cpu/mips/foreign_globals_mips.hpp +new file mode 100644 +index 000000000..3c0068816 +--- /dev/null ++++ b/src/hotspot/cpu/mips/foreign_globals_mips.hpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -69399,9 +69063,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/forei +class ABIDescriptor {}; + +#endif // CPU_MIPS_VM_FOREIGN_GLOBALS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/frame_mips.cpp ---- openjdk/src/hotspot/cpu/mips/frame_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/frame_mips.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/frame_mips.cpp b/src/hotspot/cpu/mips/frame_mips.cpp +new file mode 100644 +index 000000000..bf2b87b24 +--- /dev/null ++++ b/src/hotspot/cpu/mips/frame_mips.cpp @@ -0,0 +1,665 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -70068,9 +69734,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame + +void frame::pd_ps() {} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/frame_mips.hpp ---- openjdk/src/hotspot/cpu/mips/frame_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/frame_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/frame_mips.hpp b/src/hotspot/cpu/mips/frame_mips.hpp +new file mode 100644 +index 000000000..ac706e71f +--- /dev/null ++++ b/src/hotspot/cpu/mips/frame_mips.hpp @@ -0,0 +1,215 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -70287,9 +69955,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame + static jint interpreter_frame_expression_stack_direction() { return -1; } + +#endif // CPU_MIPS_VM_FRAME_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame_mips.inline.hpp jdk17u-ls/src/hotspot/cpu/mips/frame_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/frame_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/frame_mips.inline.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/frame_mips.inline.hpp b/src/hotspot/cpu/mips/frame_mips.inline.hpp +new file mode 100644 +index 000000000..c408f01d6 +--- /dev/null ++++ b/src/hotspot/cpu/mips/frame_mips.inline.hpp @@ -0,0 +1,238 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -70529,9 +70199,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/frame +} + +#endif // CPU_MIPS_VM_FRAME_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..196ff1582 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.cpp @@ -0,0 +1,373 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -70906,9 +70578,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1 + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..ec5c243c3 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/g1/g1BarrierSetAssembler_mips.hpp @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -70981,9 +70655,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1 +}; + +#endif // CPU_MIPS_GC_G1_G1BARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp 2023-09-08 09:39:50.377842054 +0800 +diff --git a/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp b/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp +new file mode 100644 +index 000000000..f0c7badaa +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/g1/g1Globals_mips.hpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. @@ -71015,9 +70691,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/g1 +const size_t G1MergeHeapRootsPrefetchCacheSize = 8; + +#endif // CPU_MIPS_GC_G1_G1GLOBALS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..071debdc3 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.cpp @@ -0,0 +1,194 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71213,9 +70891,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + Register t1) { + Unimplemented(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..bc68de604 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/barrierSetAssembler_mips.hpp @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71301,9 +70981,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh +}; + +#endif // CPU_MIPS_GC_SHARED_BARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp b/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp +new file mode 100644 +index 000000000..3d4e69333 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/barrierSetNMethod_mips.cpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71346,9 +71028,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + ShouldNotReachHere(); + return false; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..1b2002fd0 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.cpp @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71494,9 +71178,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..49c2a0ea8 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/cardTableBarrierSetAssembler_mips.hpp @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71540,9 +71226,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh +}; + +#endif // CPU_MIPS_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp +new file mode 100644 +index 000000000..765259e62 +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.cpp @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71597,9 +71285,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh + BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp +new file mode 100644 +index 000000000..5320a4c0a +--- /dev/null ++++ b/src/hotspot/cpu/mips/gc/shared/modRefBarrierSetAssembler_mips.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -71655,9 +71345,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/gc/sh +}; + +#endif // CPU_MIPS_GC_SHARED_MODREFBARRIERSETASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globalDefinitions_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/globalDefinitions_mips.hpp ---- openjdk/src/hotspot/cpu/mips/globalDefinitions_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/globalDefinitions_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/globalDefinitions_mips.hpp b/src/hotspot/cpu/mips/globalDefinitions_mips.hpp +new file mode 100644 +index 000000000..2b50d15ff +--- /dev/null ++++ b/src/hotspot/cpu/mips/globalDefinitions_mips.hpp @@ -0,0 +1,47 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71706,10 +71398,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globa +#define COMPRESSED_CLASS_POINTERS_DEPENDS_ON_COMPRESSED_OOPS false + +#endif // CPU_MIPS_VM_GLOBALDEFINITIONS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globals_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/globals_mips.hpp ---- openjdk/src/hotspot/cpu/mips/globals_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/globals_mips.hpp 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,138 @@ +diff --git a/src/hotspot/cpu/mips/globals_mips.hpp b/src/hotspot/cpu/mips/globals_mips.hpp +new file mode 100644 +index 000000000..2d88d370c +--- /dev/null ++++ b/src/hotspot/cpu/mips/globals_mips.hpp +@@ -0,0 +1,132 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -71810,12 +71504,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globa + product(bool, UseLEXT3, false, \ + "Use LoongISA general EXTensions 3") \ + \ -+ product(bool, PatchContinuousLoad, true, \ -+ "Patch continuous loads with nop") \ -+ \ -+ notproduct(bool, TracePatchContinuousLoad, false, \ -+ "Trace patch of continuous loads") \ -+ \ + product(bool, UseCodeCacheAllocOpt, true, \ + "Allocate code cache within 32-bit memory address space") \ + \ @@ -71848,99 +71536,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/globa +// end of ARCH_FLAGS + +#endif // CPU_MIPS_VM_GLOBALS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icache_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/icache_mips.cpp ---- openjdk/src/hotspot/cpu/mips/icache_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/icache_mips.cpp 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "runtime/icache.hpp" -+ -+void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) -+{ -+#define __ _masm-> -+ StubCodeMark mark(this, "ICache", "flush_icache_stub"); -+ address start = __ pc(); -+ -+ __ jr_hb(RA); -+ __ delayed()->ori(V0, RA2, 0); -+ -+ *flush_icache_stub = (ICache::flush_icache_stub_t)start; -+#undef __ -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icache_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/icache_mips.hpp ---- openjdk/src/hotspot/cpu/mips/icache_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/icache_mips.hpp 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_ICACHE_MIPS_HPP -+#define CPU_MIPS_VM_ICACHE_MIPS_HPP -+ -+// Interface for updating the instruction cache. Whenever the VM modifies -+// code, part of the processor instruction cache potentially has to be flushed. -+ -+class ICache : public AbstractICache { -+ public: -+ enum { -+ stub_size = 2 * BytesPerInstWord, // Size of the icache flush stub in bytes -+ line_size = 32, // flush instruction affects a dword -+ log2_line_size = 5 // log2(line_size) -+ }; -+}; -+ -+#endif // CPU_MIPS_VM_ICACHE_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icBuffer_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/icBuffer_mips.cpp ---- openjdk/src/hotspot/cpu/mips/icBuffer_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/icBuffer_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/icBuffer_mips.cpp b/src/hotspot/cpu/mips/icBuffer_mips.cpp +new file mode 100644 +index 000000000..604e951a9 +--- /dev/null ++++ b/src/hotspot/cpu/mips/icBuffer_mips.cpp @@ -0,0 +1,96 @@ +/* + * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. @@ -72038,13 +71638,381 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/icBuf + void* o= (void*)move->data(); + return o; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interp_masm_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/interp_masm_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/interp_masm_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/interp_masm_mips_64.cpp 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,2140 @@ +diff --git a/src/hotspot/cpu/mips/icache_mips.cpp b/src/hotspot/cpu/mips/icache_mips.cpp +new file mode 100644 +index 000000000..848964b63 +--- /dev/null ++++ b/src/hotspot/cpu/mips/icache_mips.cpp +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "runtime/icache.hpp" ++ ++void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) ++{ ++#define __ _masm-> ++ StubCodeMark mark(this, "ICache", "flush_icache_stub"); ++ address start = __ pc(); ++ ++ __ jr_hb(RA); ++ __ delayed()->ori(V0, RA2, 0); ++ ++ *flush_icache_stub = (ICache::flush_icache_stub_t)start; ++#undef __ ++} +diff --git a/src/hotspot/cpu/mips/icache_mips.hpp b/src/hotspot/cpu/mips/icache_mips.hpp +new file mode 100644 +index 000000000..f90dee6ee +--- /dev/null ++++ b/src/hotspot/cpu/mips/icache_mips.hpp +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_ICACHE_MIPS_HPP ++#define CPU_MIPS_VM_ICACHE_MIPS_HPP ++ ++// Interface for updating the instruction cache. Whenever the VM modifies ++// code, part of the processor instruction cache potentially has to be flushed. ++ ++class ICache : public AbstractICache { ++ public: ++ enum { ++ stub_size = 2 * BytesPerInstWord, // Size of the icache flush stub in bytes ++ line_size = 32, // flush instruction affects a dword ++ log2_line_size = 5 // log2(line_size) ++ }; ++}; ++ ++#endif // CPU_MIPS_VM_ICACHE_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/interp_masm_mips.hpp b/src/hotspot/cpu/mips/interp_masm_mips.hpp +new file mode 100644 +index 000000000..1b9aa653f +--- /dev/null ++++ b/src/hotspot/cpu/mips/interp_masm_mips.hpp +@@ -0,0 +1,266 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP ++#define CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP ++ ++#include "asm/assembler.hpp" ++#include "asm/macroAssembler.hpp" ++#include "asm/macroAssembler.inline.hpp" ++#include "interpreter/invocationCounter.hpp" ++#include "runtime/frame.hpp" ++ ++// This file specializes the assember with interpreter-specific macros ++ ++ ++class InterpreterMacroAssembler: public MacroAssembler { ++ private: ++ ++ Register _locals_register; // register that contains the pointer to the locals ++ Register _bcp_register; // register that contains the bcp ++ ++ protected: ++ // Interpreter specific version of call_VM_base ++ virtual void call_VM_leaf_base(address entry_point, ++ int number_of_arguments); ++ ++ virtual void call_VM_base(Register oop_result, ++ Register java_thread, ++ Register last_java_sp, ++ address entry_point, ++ int number_of_arguments, ++ bool check_exceptions); ++ ++ // base routine for all dispatches ++ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); ++ ++ public: ++ void jump_to_entry(address entry); ++ // narrow int return value ++ void narrow(Register result); ++ ++ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} ++ ++ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ void get_4_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ ++ virtual void check_and_handle_popframe(Register java_thread); ++ virtual void check_and_handle_earlyret(Register java_thread); ++ ++ void load_earlyret_value(TosState state); ++ ++ // Interpreter-specific registers ++ void save_bcp() { ++ sd(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_bcp() { ++ ld(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_locals() { ++ ld(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); ++ } ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg) { ++ ld(reg, FP, frame::interpreter_frame_method_offset * wordSize); ++ } ++ ++ void get_const(Register reg){ ++ get_method(reg); ++ ld(reg, reg, in_bytes(Method::const_offset())); ++ } ++ ++ void get_constant_pool(Register reg) { ++ get_const(reg); ++ ld(reg, reg, in_bytes(ConstMethod::constants_offset())); ++ } ++ ++ void get_constant_pool_cache(Register reg) { ++ get_constant_pool(reg); ++ ld(reg, reg, ConstantPool::cache_offset_in_bytes()); ++ } ++ ++ void get_cpool_and_tags(Register cpool, Register tags) { ++ get_constant_pool(cpool); ++ ld(tags, cpool, ConstantPool::tags_offset_in_bytes()); ++ } ++ ++ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); ++ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_method_counters(Register method, Register mcs, Label& skip); ++ ++ // load cpool->resolved_references(index); ++ void load_resolved_reference_at_index(Register result, Register index, Register tmp); ++ ++ // load cpool->resolved_klass_at(index) ++ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) ++ Register index, // the constant pool index (corrupted on return) ++ Register klass); // contains the Klass on return ++ ++ void load_resolved_method_at_index(int byte_no, ++ Register method, ++ Register cache, ++ Register index); ++ ++ void pop_ptr( Register r = FSR); ++ void pop_i( Register r = FSR); ++ void pop_l( Register r = FSR); ++ void pop_f(FloatRegister r = FSF); ++ void pop_d(FloatRegister r = FSF); ++ ++ void push_ptr( Register r = FSR); ++ void push_i( Register r = FSR); ++ void push_l( Register r = FSR); ++ void push_f(FloatRegister r = FSF); ++ void push_d(FloatRegister r = FSF); ++ ++ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } ++ ++ void push(Register r ) { ((MacroAssembler*)this)->push(r); } ++ ++ void pop(TosState state); // transition vtos -> state ++ void push(TosState state); // transition state -> vtos ++ ++ void empty_expression_stack() { ++ ld(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); ++ // NULL last_sp until next java call ++ sd(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); ++ } ++ ++ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls ++ void load_ptr(int n, Register val); ++ void store_ptr(int n, Register val); ++ ++ // Generate a subtype check: branch to ok_is_subtype if sub_klass is ++ // a subtype of super_klass. ++ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); ++ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); ++ ++ // Dispatching ++ void dispatch_prolog(TosState state, int step = 0); ++ void dispatch_epilog(TosState state, int step = 0); ++ void dispatch_only(TosState state, bool generate_poll = false); ++ void dispatch_only_normal(TosState state); ++ void dispatch_only_noverify(TosState state); ++ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); ++ void dispatch_via (TosState state, address* table); ++ ++ // jump to an invoked target ++ void prepare_to_jump_from_interpreted(); ++ void jump_from_interpreted(Register method, Register temp); ++ ++ ++ // Returning from interpreted functions ++ // ++ // Removes the current activation (incl. unlocking of monitors) ++ // and sets up the return address. This code is also used for ++ // exception unwindwing. In that case, we do not want to throw ++ // IllegalMonitorStateExceptions, since that might get us into an ++ // infinite rethrow exception loop. ++ // Additionally this code is used for popFrame and earlyReturn. ++ // In popFrame case we want to skip throwing an exception, ++ // installing an exception, and notifying jvmdi. ++ // In earlyReturn case we only want to skip throwing an exception ++ // and installing an exception. ++ void remove_activation(TosState state, Register ret_addr, ++ bool throw_monitor_exception = true, ++ bool install_monitor_exception = true, ++ bool notify_jvmdi = true); ++ ++ // Object locking ++ void lock_object (Register lock_reg); ++ void unlock_object(Register lock_reg); ++ ++ // Interpreter profiling operations ++ void set_method_data_pointer_for_bcp(); ++ void test_method_data_pointer(Register mdp, Label& zero_continue); ++ void verify_method_data_pointer(); ++ ++ void set_mdp_data_at(Register mdp_in, int constant, Register value); ++ void increment_mdp_data_at(Address data, bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, int constant, ++ bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, ++ bool decrement = false); ++ void increment_mask_and_jump(Address counter_addr, ++ int increment, Address mask, ++ Register scratch, bool preloaded, ++ Condition cond, Label* where); ++ void set_mdp_flag_at(Register mdp_in, int flag_constant); ++ void test_mdp_data_at(Register mdp_in, int offset, Register value, ++ Register test_value_out, ++ Label& not_equal_continue); ++ ++ void record_klass_in_profile(Register receiver, Register mdp, ++ Register reg2, bool is_virtual_call); ++ void record_klass_in_profile_helper(Register receiver, Register mdp, ++ Register reg2, int start_row, ++ Label& done, bool is_virtual_call); ++ ++ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); ++ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); ++ void update_mdp_by_constant(Register mdp_in, int constant); ++ void update_mdp_for_ret(Register return_bci); ++ ++ void profile_taken_branch(Register mdp, Register bumped_count); ++ void profile_not_taken_branch(Register mdp); ++ void profile_call(Register mdp); ++ void profile_final_call(Register mdp); ++ void profile_virtual_call(Register receiver, Register mdp, ++ Register scratch2, ++ bool receiver_can_be_null = false); ++ void profile_called_method(Register method, Register mdp, Register reg2) NOT_JVMCI_RETURN; ++ void profile_ret(Register return_bci, Register mdp); ++ void profile_null_seen(Register mdp); ++ void profile_typecheck(Register mdp, Register klass, Register scratch); ++ void profile_typecheck_failed(Register mdp); ++ void profile_switch_default(Register mdp); ++ void profile_switch_case(Register index_in_scratch, Register mdp, ++ Register scratch2); ++ ++ // Debugging ++ // only if +VerifyOops && state == atos ++ void verify_oop(Register reg, TosState state = atos); ++ // only if +VerifyFPU && (state == ftos || state == dtos) ++ void verify_FPU(int stack_depth, TosState state = ftos); ++ ++ void profile_obj_type(Register obj, const Address& mdo_addr); ++ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); ++ void profile_return_type(Register mdp, Register ret, Register tmp); ++ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++ ++ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ ++ // support for jvmti/dtrace ++ void notify_method_entry(); ++ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++}; ++ ++#endif // CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP +diff --git a/src/hotspot/cpu/mips/interp_masm_mips_64.cpp b/src/hotspot/cpu/mips/interp_masm_mips_64.cpp +new file mode 100644 +index 000000000..732325fdb +--- /dev/null ++++ b/src/hotspot/cpu/mips/interp_masm_mips_64.cpp +@@ -0,0 +1,2140 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -74182,13 +74150,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + unimplemented(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interp_masm_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/interp_masm_mips.hpp ---- openjdk/src/hotspot/cpu/mips/interp_masm_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/interp_masm_mips.hpp 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,266 @@ +diff --git a/src/hotspot/cpu/mips/interpreterRT_mips.hpp b/src/hotspot/cpu/mips/interpreterRT_mips.hpp +new file mode 100644 +index 000000000..054138ea4 +--- /dev/null ++++ b/src/hotspot/cpu/mips/interpreterRT_mips.hpp +@@ -0,0 +1,60 @@ +/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -74211,250 +74181,46 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + * + */ + -+#ifndef CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -+#define CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -+ -+#include "asm/assembler.hpp" -+#include "asm/macroAssembler.hpp" -+#include "asm/macroAssembler.inline.hpp" -+#include "interpreter/invocationCounter.hpp" -+#include "runtime/frame.hpp" ++#ifndef CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP ++#define CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP + -+// This file specializes the assember with interpreter-specific macros ++// This is included in the middle of class Interpreter. ++// Do not include files here. + ++// native method calls + -+class InterpreterMacroAssembler: public MacroAssembler { ++class SignatureHandlerGenerator: public NativeSignatureIterator { + private: ++ MacroAssembler* _masm; + -+ Register _locals_register; // register that contains the pointer to the locals -+ Register _bcp_register; // register that contains the bcp -+ -+ protected: -+ // Interpreter specific version of call_VM_base -+ virtual void call_VM_leaf_base(address entry_point, -+ int number_of_arguments); -+ -+ virtual void call_VM_base(Register oop_result, -+ Register java_thread, -+ Register last_java_sp, -+ address entry_point, -+ int number_of_arguments, -+ bool check_exceptions); ++ void move(int from_offset, int to_offset); + -+ // base routine for all dispatches -+ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + + public: -+ void jump_to_entry(address entry); -+ // narrow int return value -+ void narrow(Register result); -+ -+ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} -+ -+ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ void get_4_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ -+ virtual void check_and_handle_popframe(Register java_thread); -+ virtual void check_and_handle_earlyret(Register java_thread); -+ -+ void load_earlyret_value(TosState state); -+ -+ // Interpreter-specific registers -+ void save_bcp() { -+ sd(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_bcp() { -+ ld(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_locals() { -+ ld(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); -+ } -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg) { -+ ld(reg, FP, frame::interpreter_frame_method_offset * wordSize); -+ } -+ -+ void get_const(Register reg){ -+ get_method(reg); -+ ld(reg, reg, in_bytes(Method::const_offset())); -+ } -+ -+ void get_constant_pool(Register reg) { -+ get_const(reg); -+ ld(reg, reg, in_bytes(ConstMethod::constants_offset())); -+ } -+ -+ void get_constant_pool_cache(Register reg) { -+ get_constant_pool(reg); -+ ld(reg, reg, ConstantPool::cache_offset_in_bytes()); -+ } -+ -+ void get_cpool_and_tags(Register cpool, Register tags) { -+ get_constant_pool(cpool); -+ ld(tags, cpool, ConstantPool::tags_offset_in_bytes()); -+ } -+ -+ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); -+ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_method_counters(Register method, Register mcs, Label& skip); -+ -+ // load cpool->resolved_references(index); -+ void load_resolved_reference_at_index(Register result, Register index, Register tmp); -+ -+ // load cpool->resolved_klass_at(index) -+ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) -+ Register index, // the constant pool index (corrupted on return) -+ Register klass); // contains the Klass on return -+ -+ void load_resolved_method_at_index(int byte_no, -+ Register method, -+ Register cache, -+ Register index); -+ -+ void pop_ptr( Register r = FSR); -+ void pop_i( Register r = FSR); -+ void pop_l( Register r = FSR); -+ void pop_f(FloatRegister r = FSF); -+ void pop_d(FloatRegister r = FSF); -+ -+ void push_ptr( Register r = FSR); -+ void push_i( Register r = FSR); -+ void push_l( Register r = FSR); -+ void push_f(FloatRegister r = FSF); -+ void push_d(FloatRegister r = FSF); -+ -+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } -+ -+ void push(Register r ) { ((MacroAssembler*)this)->push(r); } -+ -+ void pop(TosState state); // transition vtos -> state -+ void push(TosState state); // transition state -> vtos -+ -+ void empty_expression_stack() { -+ ld(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); -+ // NULL last_sp until next java call -+ sd(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); -+ } -+ -+ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls -+ void load_ptr(int n, Register val); -+ void store_ptr(int n, Register val); -+ -+ // Generate a subtype check: branch to ok_is_subtype if sub_klass is -+ // a subtype of super_klass. -+ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); -+ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); -+ -+ // Dispatching -+ void dispatch_prolog(TosState state, int step = 0); -+ void dispatch_epilog(TosState state, int step = 0); -+ void dispatch_only(TosState state, bool generate_poll = false); -+ void dispatch_only_normal(TosState state); -+ void dispatch_only_noverify(TosState state); -+ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); -+ void dispatch_via (TosState state, address* table); -+ -+ // jump to an invoked target -+ void prepare_to_jump_from_interpreted(); -+ void jump_from_interpreted(Register method, Register temp); -+ -+ -+ // Returning from interpreted functions -+ // -+ // Removes the current activation (incl. unlocking of monitors) -+ // and sets up the return address. This code is also used for -+ // exception unwindwing. In that case, we do not want to throw -+ // IllegalMonitorStateExceptions, since that might get us into an -+ // infinite rethrow exception loop. -+ // Additionally this code is used for popFrame and earlyReturn. -+ // In popFrame case we want to skip throwing an exception, -+ // installing an exception, and notifying jvmdi. -+ // In earlyReturn case we only want to skip throwing an exception -+ // and installing an exception. -+ void remove_activation(TosState state, Register ret_addr, -+ bool throw_monitor_exception = true, -+ bool install_monitor_exception = true, -+ bool notify_jvmdi = true); -+ -+ // Object locking -+ void lock_object (Register lock_reg); -+ void unlock_object(Register lock_reg); -+ -+ // Interpreter profiling operations -+ void set_method_data_pointer_for_bcp(); -+ void test_method_data_pointer(Register mdp, Label& zero_continue); -+ void verify_method_data_pointer(); -+ -+ void set_mdp_data_at(Register mdp_in, int constant, Register value); -+ void increment_mdp_data_at(Address data, bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, int constant, -+ bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, -+ bool decrement = false); -+ void increment_mask_and_jump(Address counter_addr, -+ int increment, Address mask, -+ Register scratch, bool preloaded, -+ Condition cond, Label* where); -+ void set_mdp_flag_at(Register mdp_in, int flag_constant); -+ void test_mdp_data_at(Register mdp_in, int offset, Register value, -+ Register test_value_out, -+ Label& not_equal_continue); -+ -+ void record_klass_in_profile(Register receiver, Register mdp, -+ Register reg2, bool is_virtual_call); -+ void record_klass_in_profile_helper(Register receiver, Register mdp, -+ Register reg2, int start_row, -+ Label& done, bool is_virtual_call); -+ -+ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); -+ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); -+ void update_mdp_by_constant(Register mdp_in, int constant); -+ void update_mdp_for_ret(Register return_bci); -+ -+ void profile_taken_branch(Register mdp, Register bumped_count); -+ void profile_not_taken_branch(Register mdp); -+ void profile_call(Register mdp); -+ void profile_final_call(Register mdp); -+ void profile_virtual_call(Register receiver, Register mdp, -+ Register scratch2, -+ bool receiver_can_be_null = false); -+ void profile_called_method(Register method, Register mdp, Register reg2) NOT_JVMCI_RETURN; -+ void profile_ret(Register return_bci, Register mdp); -+ void profile_null_seen(Register mdp); -+ void profile_typecheck(Register mdp, Register klass, Register scratch); -+ void profile_typecheck_failed(Register mdp); -+ void profile_switch_default(Register mdp); -+ void profile_switch_case(Register index_in_scratch, Register mdp, -+ Register scratch2); -+ -+ // Debugging -+ // only if +VerifyOops && state == atos -+ void verify_oop(Register reg, TosState state = atos); -+ // only if +VerifyFPU && (state == ftos || state == dtos) -+ void verify_FPU(int stack_depth, TosState state = ftos); -+ -+ void profile_obj_type(Register obj, const Address& mdo_addr); -+ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); -+ void profile_return_type(Register mdp, Register ret, Register tmp); -+ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++ // Creation ++ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); + -+ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // support for jvmti/dtrace -+ void notify_method_entry(); -+ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); +}; + -+#endif // CPU_MIPS_VM_INTERP_MASM_MIPS_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp 2023-09-08 09:39:50.381842060 +0800 ++#endif // CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp b/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp +new file mode 100644 +index 000000000..3e8ae9fb5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/interpreterRT_mips_64.cpp @@ -0,0 +1,260 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -74716,73 +74482,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/inter + // return result handler + return Interpreter::result_handler(m->result_type()); +JRT_END -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/interpreterRT_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/interpreterRT_mips.hpp ---- openjdk/src/hotspot/cpu/mips/interpreterRT_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/interpreterRT_mips.hpp 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,60 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -+#define CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -+ -+// This is included in the middle of class Interpreter. -+// Do not include files here. -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ -+ void move(int from_offset, int to_offset); -+ -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); -+ -+ public: -+ // Creation -+ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); -+ -+ // Code generation -+ void generate(uint64_t fingerprint); -+ -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; -+ -+#endif // CPU_MIPS_VM_INTERPRETERRT_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp ---- openjdk/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp b/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp +new file mode 100644 +index 000000000..f5f3735e7 +--- /dev/null ++++ b/src/hotspot/cpu/mips/javaFrameAnchor_mips.hpp @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -74871,9 +74575,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/javaF + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_MIPS_VM_JAVAFRAMEANCHOR_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp b/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp +new file mode 100644 +index 000000000..547414f7e +--- /dev/null ++++ b/src/hotspot/cpu/mips/jniFastGetField_mips_64.cpp @@ -0,0 +1,203 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. @@ -75078,9 +74784,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniFa +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniTypes_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/jniTypes_mips.hpp ---- openjdk/src/hotspot/cpu/mips/jniTypes_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/jniTypes_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/jniTypes_mips.hpp b/src/hotspot/cpu/mips/jniTypes_mips.hpp +new file mode 100644 +index 000000000..08ac565aa +--- /dev/null ++++ b/src/hotspot/cpu/mips/jniTypes_mips.hpp @@ -0,0 +1,143 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -75225,9 +74933,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/jniTy +}; + +#endif // CPU_MIPS_VM_JNITYPES_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macroAssembler_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/macroAssembler_mips.cpp ---- openjdk/src/hotspot/cpu/mips/macroAssembler_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/macroAssembler_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/macroAssembler_mips.cpp b/src/hotspot/cpu/mips/macroAssembler_mips.cpp +new file mode 100644 +index 000000000..1256e9579 +--- /dev/null ++++ b/src/hotspot/cpu/mips/macroAssembler_mips.cpp @@ -0,0 +1,3686 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -78915,9 +78625,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + Unimplemented(); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macroAssembler_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/macroAssembler_mips.hpp ---- openjdk/src/hotspot/cpu/mips/macroAssembler_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/macroAssembler_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/macroAssembler_mips.hpp b/src/hotspot/cpu/mips/macroAssembler_mips.hpp +new file mode 100644 +index 000000000..daec23fcf +--- /dev/null ++++ b/src/hotspot/cpu/mips/macroAssembler_mips.hpp @@ -0,0 +1,704 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -79623,9 +79335,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro + + +#endif // CPU_MIPS_VM_MACROASSEMBLER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp jdk17u-ls/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp b/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp +new file mode 100644 +index 000000000..92c05fb72 +--- /dev/null ++++ b/src/hotspot/cpu/mips/macroAssembler_mips.inline.hpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -79661,9 +79375,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/macro +#include "code/codeCache.hpp" + +#endif // CPU_MIPS_VM_MACROASSEMBLER_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/matcher_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/matcher_mips.hpp ---- openjdk/src/hotspot/cpu/mips/matcher_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/matcher_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/matcher_mips.hpp b/src/hotspot/cpu/mips/matcher_mips.hpp +new file mode 100644 +index 000000000..94f58720f +--- /dev/null ++++ b/src/hotspot/cpu/mips/matcher_mips.hpp @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. @@ -79810,9 +79526,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/match + static const bool supports_encode_ascii_array = false; + +#endif // CPU_MIPS_MATCHER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/methodHandles_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/methodHandles_mips.cpp ---- openjdk/src/hotspot/cpu/mips/methodHandles_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/methodHandles_mips.cpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/methodHandles_mips.cpp b/src/hotspot/cpu/mips/methodHandles_mips.cpp +new file mode 100644 +index 000000000..c42797050 +--- /dev/null ++++ b/src/hotspot/cpu/mips/methodHandles_mips.cpp @@ -0,0 +1,597 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -80411,9 +80129,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/metho +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/methodHandles_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/methodHandles_mips.hpp ---- openjdk/src/hotspot/cpu/mips/methodHandles_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/methodHandles_mips.hpp 2023-09-08 09:39:50.381842060 +0800 +diff --git a/src/hotspot/cpu/mips/methodHandles_mips.hpp b/src/hotspot/cpu/mips/methodHandles_mips.hpp +new file mode 100644 +index 000000000..a95f8e405 +--- /dev/null ++++ b/src/hotspot/cpu/mips/methodHandles_mips.hpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -80477,10 +80197,43 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/metho + // Should be in sharedRuntime, not here. + return I29; + } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips_64.ad jdk17u-ls/src/hotspot/cpu/mips/mips_64.ad ---- openjdk/src/hotspot/cpu/mips/mips_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/mips_64.ad 2023-11-01 10:27:44.285760855 +0800 -@@ -0,0 +1,12316 @@ +diff --git a/src/hotspot/cpu/mips/mips.ad b/src/hotspot/cpu/mips/mips.ad +new file mode 100644 +index 000000000..3563bbe0e +--- /dev/null ++++ b/src/hotspot/cpu/mips/mips.ad +@@ -0,0 +1,25 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ +diff --git a/src/hotspot/cpu/mips/mips_64.ad b/src/hotspot/cpu/mips/mips_64.ad +new file mode 100644 +index 000000000..882878f73 +--- /dev/null ++++ b/src/hotspot/cpu/mips/mips_64.ad +@@ -0,0 +1,12317 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -87610,6 +87363,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips_ + +instruct membar_storestore() %{ + match(MemBarStoreStore); ++ match(StoreStoreFence); + + ins_cost(400); + format %{ "MEMBAR-storestore @ membar_storestore" %} @@ -92797,38 +92551,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips_ +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/mips.ad jdk17u-ls/src/hotspot/cpu/mips/mips.ad ---- openjdk/src/hotspot/cpu/mips/mips.ad 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/mips.ad 2023-09-08 09:39:50.381842060 +0800 -@@ -0,0 +1,25 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativeInst_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/nativeInst_mips.cpp ---- openjdk/src/hotspot/cpu/mips/nativeInst_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/nativeInst_mips.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/nativeInst_mips.cpp b/src/hotspot/cpu/mips/nativeInst_mips.cpp +new file mode 100644 +index 000000000..05c525f35 +--- /dev/null ++++ b/src/hotspot/cpu/mips/nativeInst_mips.cpp @@ -0,0 +1,1825 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -94655,9 +94382,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativ + // we check the safepoint instruction like the this. + return is_op(Assembler::lw_op) && is_rt(AT); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativeInst_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/nativeInst_mips.hpp ---- openjdk/src/hotspot/cpu/mips/nativeInst_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/nativeInst_mips.hpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/nativeInst_mips.hpp b/src/hotspot/cpu/mips/nativeInst_mips.hpp +new file mode 100644 +index 000000000..9f0f24cc3 +--- /dev/null ++++ b/src/hotspot/cpu/mips/nativeInst_mips.hpp @@ -0,0 +1,734 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. @@ -95393,9 +95122,67 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/nativ + return (NativeCallTrampolineStub*)addr; +} +#endif // CPU_MIPS_VM_NATIVEINST_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/register_definitions_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/register_definitions_mips.cpp ---- openjdk/src/hotspot/cpu/mips/register_definitions_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/register_definitions_mips.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/registerMap_mips.hpp b/src/hotspot/cpu/mips/registerMap_mips.hpp +new file mode 100644 +index 000000000..3f3558f79 +--- /dev/null ++++ b/src/hotspot/cpu/mips/registerMap_mips.hpp +@@ -0,0 +1,50 @@ ++/* ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_REGISTERMAP_MIPS_HPP ++#define CPU_MIPS_VM_REGISTERMAP_MIPS_HPP ++ ++// machine-dependent implemention for register maps ++ friend class frame; ++ ++ private: ++#ifndef CORE ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return NULL. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return NULL;} ++ address pd_location(VMReg base_reg, int slot_idx) const { ++ return location(base_reg->next(slot_idx)); ++ } ++#endif ++ ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} ++ ++#endif // CPU_MIPS_VM_REGISTERMAP_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/register_definitions_mips.cpp b/src/hotspot/cpu/mips/register_definitions_mips.cpp +new file mode 100644 +index 000000000..4af253183 +--- /dev/null ++++ b/src/hotspot/cpu/mips/register_definitions_mips.cpp @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. @@ -95500,63 +95287,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis +REGISTER_DEFINITION(FloatRegister, f29); +REGISTER_DEFINITION(FloatRegister, f30); +REGISTER_DEFINITION(FloatRegister, f31); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/registerMap_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/registerMap_mips.hpp ---- openjdk/src/hotspot/cpu/mips/registerMap_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/registerMap_mips.hpp 2023-09-08 09:39:50.385842065 +0800 -@@ -0,0 +1,50 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -+#define CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -+ -+// machine-dependent implemention for register maps -+ friend class frame; -+ -+ private: -+#ifndef CORE -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return NULL. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return NULL;} -+ address pd_location(VMReg base_reg, int slot_idx) const { -+ return location(base_reg->next(slot_idx)); -+ } -+#endif -+ -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} -+ -+#endif // CPU_MIPS_VM_REGISTERMAP_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/register_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/register_mips.cpp ---- openjdk/src/hotspot/cpu/mips/register_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/register_mips.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/register_mips.cpp b/src/hotspot/cpu/mips/register_mips.cpp +new file mode 100644 +index 000000000..4a9b22bfe +--- /dev/null ++++ b/src/hotspot/cpu/mips/register_mips.cpp @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -95610,13 +95345,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis + return is_valid() ? names[encoding()] : "fnoreg"; +} + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/register_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/register_mips.hpp ---- openjdk/src/hotspot/cpu/mips/register_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/register_mips.hpp 2023-09-08 09:39:50.385842065 +0800 -@@ -0,0 +1,344 @@ +diff --git a/src/hotspot/cpu/mips/register_mips.hpp b/src/hotspot/cpu/mips/register_mips.hpp +new file mode 100644 +index 000000000..c2124538a +--- /dev/null ++++ b/src/hotspot/cpu/mips/register_mips.hpp +@@ -0,0 +1,345 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2024, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -95721,8 +95458,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis +#define NOREG ((Register)(noreg_RegisterEnumValue)) + +#define I0 ((Register)(i0_RegisterEnumValue)) -+#define I1 ((Register)(i1_RegisterEnumValue)) -+#define I2 ((Register)(i2_RegisterEnumValue)) ++// Conflict with I1 and I2 in googlemock/include/gmock/gmock-actions.h ++//#define I1 ((Register)(i1_RegisterEnumValue)) ++//#define I2 ((Register)(i2_RegisterEnumValue)) +#define I3 ((Register)(i3_RegisterEnumValue)) +#define I4 ((Register)(i4_RegisterEnumValue)) +#define I5 ((Register)(i5_RegisterEnumValue)) @@ -95958,9 +95696,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/regis +}; + +#endif //CPU_MIPS_VM_REGISTER_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/relocInfo_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/relocInfo_mips.cpp ---- openjdk/src/hotspot/cpu/mips/relocInfo_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/relocInfo_mips.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/relocInfo_mips.cpp b/src/hotspot/cpu/mips/relocInfo_mips.cpp +new file mode 100644 +index 000000000..7d8d072b5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/relocInfo_mips.cpp @@ -0,0 +1,160 @@ +/* + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. @@ -96122,9 +95862,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/reloc + +void metadata_Relocation::pd_fix_value(address x) { +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/relocInfo_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/relocInfo_mips.hpp ---- openjdk/src/hotspot/cpu/mips/relocInfo_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/relocInfo_mips.hpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/relocInfo_mips.hpp b/src/hotspot/cpu/mips/relocInfo_mips.hpp +new file mode 100644 +index 000000000..1e1e170fd +--- /dev/null ++++ b/src/hotspot/cpu/mips/relocInfo_mips.hpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -96170,9 +95912,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/reloc + static bool mustIterateImmediateOopsInCode() { return false; } + +#endif // CPU_MIPS_VM_RELOCINFO_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/runtime_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/runtime_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/runtime_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/runtime_mips_64.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/runtime_mips_64.cpp b/src/hotspot/cpu/mips/runtime_mips_64.cpp +new file mode 100644 +index 000000000..36ab413f0 +--- /dev/null ++++ b/src/hotspot/cpu/mips/runtime_mips_64.cpp @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -96380,9 +96124,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/runti + + _exception_blob = ExceptionBlob::create(&buffer, oop_maps, framesize); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp b/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp +new file mode 100644 +index 000000000..48cc424a5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/sharedRuntime_mips_64.cpp @@ -0,0 +1,3384 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -99768,13 +99514,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/share + return nullptr; +} +#endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp 2023-11-01 10:27:44.285760855 +0800 -@@ -0,0 +1,2772 @@ +diff --git a/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp b/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp +new file mode 100644 +index 000000000..e894a302b +--- /dev/null ++++ b/src/hotspot/cpu/mips/stubGenerator_mips_64.cpp +@@ -0,0 +1,2725 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -101679,47 +101427,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG + StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill"); + } + -+ // add a function to implement SafeFetch32 and SafeFetchN -+ void generate_safefetch(const char* name, int size, address* entry, -+ address* fault_pc, address* continuation_pc) { -+ // safefetch signatures: -+ // int SafeFetch32(int* adr, int errValue); -+ // intptr_t SafeFetchN (intptr_t* adr, intptr_t errValue); -+ // -+ // arguments: -+ // A0 = adr -+ // A1 = errValue -+ // -+ // result: -+ // PPC_RET = *adr or errValue -+ -+ StubCodeMark mark(this, "StubRoutines", name); -+ -+ // Entry point, pc or function descriptor. -+ *entry = __ pc(); -+ -+ // Load *adr into A1, may fault. -+ *fault_pc = __ pc(); -+ switch (size) { -+ case 4: -+ // int32_t -+ __ lw(A1, A0, 0); -+ break; -+ case 8: -+ // int64_t -+ __ ld(A1, A0, 0); -+ break; -+ default: -+ ShouldNotReachHere(); -+ } -+ -+ // return errValue or *adr -+ *continuation_pc = __ pc(); -+ __ addu(V0,A1,R0); -+ __ jr(RA); -+ __ delayed()->nop(); -+ } -+ + +#undef __ +#define __ masm-> @@ -102495,14 +102202,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG + generate_arraycopy_stubs(); +#endif + -+ // Safefetch stubs. -+ generate_safefetch("SafeFetch32", sizeof(int), &StubRoutines::_safefetch32_entry, -+ &StubRoutines::_safefetch32_fault_pc, -+ &StubRoutines::_safefetch32_continuation_pc); -+ generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry, -+ &StubRoutines::_safefetchN_fault_pc, -+ &StubRoutines::_safefetchN_continuation_pc); -+ ++#ifdef COMPILER2 + if (UseMontgomeryMultiplyIntrinsic) { + if (UseLEXT1) { + StubCodeMark mark(this, "StubRoutines", "montgomeryMultiply"); @@ -102525,6 +102225,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG + = CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_square); + } + } ++#endif + } + + public: @@ -102544,48 +102245,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubG + } + StubGenerator g(code, all); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp 2023-09-08 09:39:50.385842065 +0800 -@@ -0,0 +1,35 @@ -+/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "runtime/deoptimization.hpp" -+#include "runtime/frame.inline.hpp" -+#include "runtime/stubRoutines.hpp" -+#include "runtime/thread.inline.hpp" -+ -+// a description of how to extend it, see the stubRoutines.hpp file. -+ -+//find the last fp value -+address StubRoutines::gs2::_call_stub_compiled_return = NULL; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubRoutines_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/stubRoutines_mips.hpp ---- openjdk/src/hotspot/cpu/mips/stubRoutines_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/stubRoutines_mips.hpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/stubRoutines_mips.hpp b/src/hotspot/cpu/mips/stubRoutines_mips.hpp +new file mode 100644 +index 000000000..920c08844 +--- /dev/null ++++ b/src/hotspot/cpu/mips/stubRoutines_mips.hpp @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -102646,9 +102310,52 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/stubR +}; + +#endif // CPU_MIPS_VM_STUBROUTINES_MIPS_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp ---- openjdk/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp b/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp +new file mode 100644 +index 000000000..358d580d5 +--- /dev/null ++++ b/src/hotspot/cpu/mips/stubRoutines_mips_64.cpp +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "runtime/deoptimization.hpp" ++#include "runtime/frame.inline.hpp" ++#include "runtime/stubRoutines.hpp" ++#include "runtime/thread.inline.hpp" ++ ++// a description of how to extend it, see the stubRoutines.hpp file. ++ ++//find the last fp value ++address StubRoutines::gs2::_call_stub_compiled_return = NULL; +diff --git a/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp b/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp +new file mode 100644 +index 000000000..b723add6d +--- /dev/null ++++ b/src/hotspot/cpu/mips/templateInterpreterGenerator_mips.cpp @@ -0,0 +1,2094 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -104744,9 +104451,60 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ + __ bind(L); +} +#endif // !PRODUCT -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templateTable_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/templateTable_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/templateTable_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/templateTable_mips_64.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/templateTable_mips.hpp b/src/hotspot/cpu/mips/templateTable_mips.hpp +new file mode 100644 +index 000000000..46a88aba2 +--- /dev/null ++++ b/src/hotspot/cpu/mips/templateTable_mips.hpp +@@ -0,0 +1,43 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++#define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP ++ ++ static void prepare_invoke(int byte_no, ++ Register method, // linked method (or i-klass) ++ Register index = noreg, // itable index, MethodType, etc. ++ Register recv = noreg, // if caller wants to see it ++ Register flags = noreg // if caller wants to test it ++ ); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); ++ ++#endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP +diff --git a/src/hotspot/cpu/mips/templateTable_mips_64.cpp b/src/hotspot/cpu/mips/templateTable_mips_64.cpp +new file mode 100644 +index 000000000..bbf95f452 +--- /dev/null ++++ b/src/hotspot/cpu/mips/templateTable_mips_64.cpp @@ -0,0 +1,4613 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -109361,56 +109119,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templ + __ daddu(SP, SP, AT); + __ sync(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/templateTable_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/templateTable_mips.hpp ---- openjdk/src/hotspot/cpu/mips/templateTable_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/templateTable_mips.hpp 2023-09-08 09:39:50.385842065 +0800 -@@ -0,0 +1,43 @@ -+/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -+#define CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -+ -+ static void prepare_invoke(int byte_no, -+ Register method, // linked method (or i-klass) -+ Register index = noreg, // itable index, MethodType, etc. -+ Register recv = noreg, // if caller wants to see it -+ Register flags = noreg // if caller wants to test it -+ ); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ static void volatile_barrier(); -+ -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); -+ -+#endif // CPU_MIPS_VM_TEMPLATETABLE_MIPS_64_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp b/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp +new file mode 100644 +index 000000000..87f6a1132 +--- /dev/null ++++ b/src/hotspot/cpu/mips/universalNativeInvoker_mips_64.cpp @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -109444,9 +109157,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/unive + Unimplemented(); + return nullptr; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp b/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp +new file mode 100644 +index 000000000..7586b0848 +--- /dev/null ++++ b/src/hotspot/cpu/mips/universalUpcallHandler_mips_64.cpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -109489,171 +109204,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/unive +bool ProgrammableUpcallHandler::supports_optimized_upcalls() { + return false; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/vmreg_mips.cpp ---- openjdk/src/hotspot/cpu/mips/vmreg_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vmreg_mips.cpp 2023-09-08 09:39:50.389842070 +0800 -@@ -0,0 +1,56 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" -+ -+ -+ -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ regName[i++] = reg->name(); -+ regName[i++] = reg->name(); -+ reg = reg->successor(); -+ } -+ -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ regName[i++] = freg->name(); -+ regName[i++] = freg->name(); -+ freg = freg->successor(); -+ } -+ -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -+ -+VMReg VMRegImpl::vmStorageToVMReg(int type, int index) { -+ Unimplemented(); -+ return VMRegImpl::Bad(); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/vmreg_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vmreg_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vmreg_mips.hpp 2023-09-08 09:39:50.389842070 +0800 -@@ -0,0 +1,56 @@ -+/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_VMREG_MIPS_HPP -+#define CPU_MIPS_VM_VMREG_MIPS_HPP -+ -+inline Register as_Register() { -+ assert( is_Register(), "must be"); -+ return ::as_Register(value() >> 1); -+} -+ -+inline FloatRegister as_FloatRegister() { -+ assert( is_FloatRegister(), "must be" ); -+ assert( is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); -+} -+ -+inline bool is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; -+} -+ -+inline bool is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; -+} -+ -+inline bool is_concrete() { -+ assert(is_reg(), "must be"); -+ if(is_Register()) return true; -+ if(is_FloatRegister()) return true; -+ assert(false, "what register?"); -+ return false; -+} -+ -+#endif // CPU_MIPS_VM_VMREG_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmreg_mips.inline.hpp jdk17u-ls/src/hotspot/cpu/mips/vmreg_mips.inline.hpp ---- openjdk/src/hotspot/cpu/mips/vmreg_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vmreg_mips.inline.hpp 2023-09-08 09:39:50.389842070 +0800 -@@ -0,0 +1,38 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -+#define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -+ -+inline VMReg RegisterImpl::as_VMReg() { -+ if( this==noreg ) return VMRegImpl::Bad(); -+ return VMRegImpl::as_VMReg(encoding() << 1 ); -+} -+ -+inline VMReg FloatRegisterImpl::as_VMReg() { -+ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); -+} -+ -+#endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmStructs_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/vmStructs_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vmStructs_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vmStructs_mips.hpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/vmStructs_mips.hpp b/src/hotspot/cpu/mips/vmStructs_mips.hpp +new file mode 100644 +index 000000000..693991435 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmStructs_mips.hpp @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. @@ -109723,9 +109278,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vmStr + /* be present there) */ + +#endif // CPU_MIPS_VM_VMSTRUCTS_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.cpp ---- openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.cpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/vm_version_ext_mips.cpp b/src/hotspot/cpu/mips/vm_version_ext_mips.cpp +new file mode 100644 +index 000000000..d3f070785 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_ext_mips.cpp @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved. @@ -109817,9 +109374,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + strncpy(tmp, _cpu_desc, CPU_DETAILED_DESC_BUF_SIZE); + return tmp; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vm_version_ext_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vm_version_ext_mips.hpp 2023-09-08 09:39:50.385842065 +0800 +diff --git a/src/hotspot/cpu/mips/vm_version_ext_mips.hpp b/src/hotspot/cpu/mips/vm_version_ext_mips.hpp +new file mode 100644 +index 000000000..ffdcff067 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_ext_mips.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. @@ -109875,13 +109434,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve +}; + +#endif // CPU_MIPS_VM_VM_VERSION_EXT_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_mips.cpp jdk17u-ls/src/hotspot/cpu/mips/vm_version_mips.cpp ---- openjdk/src/hotspot/cpu/mips/vm_version_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vm_version_mips.cpp 2023-11-01 10:27:44.285760855 +0800 -@@ -0,0 +1,527 @@ +diff --git a/src/hotspot/cpu/mips/vm_version_mips.cpp b/src/hotspot/cpu/mips/vm_version_mips.cpp +new file mode 100644 +index 000000000..8625bc700 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_mips.cpp +@@ -0,0 +1,523 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -110250,12 +109811,6 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + FLAG_SET_DEFAULT(UseLEXT3, false); + } + -+ if (is_gs264() || is_gs464() || supports_cpucfg()) { -+ if (FLAG_IS_DEFAULT(PatchContinuousLoad)) { -+ FLAG_SET_DEFAULT(PatchContinuousLoad, false); -+ } -+ } -+ + if (UseLEXT2) { + if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstructionMIPS64)) { + FLAG_SET_DEFAULT(UseCountTrailingZerosInstructionMIPS64, 1); @@ -110377,12 +109932,14 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + } + } + ++#ifdef COMPILER2 + if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { + UseMontgomeryMultiplyIntrinsic = true; + } + if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { + UseMontgomerySquareIntrinsic = true; + } ++#endif + + if (FLAG_IS_DEFAULT(UseFMA)) { + FLAG_SET_DEFAULT(UseFMA, true); @@ -110406,9 +109963,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve + + get_processor_features(); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_version_mips.hpp jdk17u-ls/src/hotspot/cpu/mips/vm_version_mips.hpp ---- openjdk/src/hotspot/cpu/mips/vm_version_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vm_version_mips.hpp 2023-09-08 09:39:50.389842070 +0800 +diff --git a/src/hotspot/cpu/mips/vm_version_mips.hpp b/src/hotspot/cpu/mips/vm_version_mips.hpp +new file mode 100644 +index 000000000..30c7b5a93 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vm_version_mips.hpp @@ -0,0 +1,218 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -110628,9 +110187,179 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vm_ve +}; + +#endif // CPU_MIPS_VM_VM_VERSION_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp jdk17u-ls/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp ---- openjdk/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp 2023-09-08 09:39:50.389842070 +0800 +diff --git a/src/hotspot/cpu/mips/vmreg_mips.cpp b/src/hotspot/cpu/mips/vmreg_mips.cpp +new file mode 100644 +index 000000000..95dbd17f1 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmreg_mips.cpp +@@ -0,0 +1,56 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ regName[i++] = reg->name(); ++ regName[i++] = reg->name(); ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ regName[i++] = freg->name(); ++ regName[i++] = freg->name(); ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} ++ ++VMReg VMRegImpl::vmStorageToVMReg(int type, int index) { ++ Unimplemented(); ++ return VMRegImpl::Bad(); ++} +diff --git a/src/hotspot/cpu/mips/vmreg_mips.hpp b/src/hotspot/cpu/mips/vmreg_mips.hpp +new file mode 100644 +index 000000000..8ccc8c513 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmreg_mips.hpp +@@ -0,0 +1,56 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_VMREG_MIPS_HPP ++#define CPU_MIPS_VM_VMREG_MIPS_HPP ++ ++inline Register as_Register() { ++ assert( is_Register(), "must be"); ++ return ::as_Register(value() >> 1); ++} ++ ++inline FloatRegister as_FloatRegister() { ++ assert( is_FloatRegister(), "must be" ); ++ assert( is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); ++} ++ ++inline bool is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline bool is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline bool is_concrete() { ++ assert(is_reg(), "must be"); ++ if(is_Register()) return true; ++ if(is_FloatRegister()) return true; ++ assert(false, "what register?"); ++ return false; ++} ++ ++#endif // CPU_MIPS_VM_VMREG_MIPS_HPP +diff --git a/src/hotspot/cpu/mips/vmreg_mips.inline.hpp b/src/hotspot/cpu/mips/vmreg_mips.inline.hpp +new file mode 100644 +index 000000000..12ad7361a +--- /dev/null ++++ b/src/hotspot/cpu/mips/vmreg_mips.inline.hpp +@@ -0,0 +1,38 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP ++#define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP ++ ++inline VMReg RegisterImpl::as_VMReg() { ++ if( this==noreg ) return VMRegImpl::Bad(); ++ return VMRegImpl::as_VMReg(encoding() << 1 ); ++} ++ ++inline VMReg FloatRegisterImpl::as_VMReg() { ++ return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); ++} ++ ++#endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP +diff --git a/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp b/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp +new file mode 100644 +index 000000000..f373aac45 +--- /dev/null ++++ b/src/hotspot/cpu/mips/vtableStubs_mips_64.cpp @@ -0,0 +1,348 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. @@ -110980,310 +110709,23 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/mips/vtabl + const unsigned int icache_line_size = wordSize; + return icache_line_size; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp jdk17u-ls/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp ---- openjdk/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp 2023-11-01 10:27:44.289760860 +0800 -@@ -506,6 +506,9 @@ - } - } - -+void LIR_Assembler::emit_opCmpBranch(LIR_OpCmpBranch* op) { -+ ShouldNotReachHere(); -+} - - void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { - Bytecodes::Code code = op->bytecode(); -@@ -1609,6 +1612,10 @@ - __ bind(skip); - } - -+void LIR_Assembler::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type) { -+ ShouldNotReachHere(); -+} -+ - - void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, - CodeEmitInfo* info, bool pop_fpu_stack) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp jdk17u-ls/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp ---- openjdk/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp 2023-11-01 10:27:44.289760860 +0800 -@@ -275,21 +275,29 @@ - __ move(temp, addr); - } - -- --void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, T tgt, CodeEmitInfo* info) { - LIR_Opr tmp = FrameMap::R0_opr; - __ load(new LIR_Address(base, disp, T_INT), tmp, info); -- __ cmp(condition, tmp, c); -+ __ cmp_branch(condition, tmp, c, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, CodeStub*, CodeEmitInfo*); - --void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, -- int disp, BasicType type, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, T tgt, CodeEmitInfo* info) { - LIR_Opr tmp = FrameMap::R0_opr; - __ load(new LIR_Address(base, disp, type), tmp, info); -- __ cmp(condition, reg, tmp); -+ __ cmp_branch(condition, reg, tmp, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, CodeStub*, CodeEmitInfo*); - - bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { - assert(left != result, "should be different registers"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp jdk17u-ls/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp ---- openjdk/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/ppc/c1_LIR_ppc.cpp 2023-11-01 10:27:44.289760860 +0800 -@@ -62,3 +62,24 @@ - #endif - } - #endif // PRODUCT -+ -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info) { -+ cmp(condition, left, right, info); -+ branch(condition, tgt); -+} -+ -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, CodeStub*, CodeEmitInfo*); -+ -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, block, unordered); -+} -+ -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp jdk17u-ls/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp ---- openjdk/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp 2023-11-01 10:27:44.297760869 +0800 -@@ -395,6 +395,9 @@ - } - } - -+void LIR_Assembler::emit_opCmpBranch(LIR_OpCmpBranch* op) { -+ ShouldNotReachHere(); -+} - - void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { - LIR_Opr src = op->in_opr(); -@@ -1501,6 +1504,10 @@ - } - } - -+void LIR_Assembler::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type) { -+ ShouldNotReachHere(); -+} -+ - void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, - CodeEmitInfo* info, bool pop_fpu_stack) { - assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp jdk17u-ls/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp ---- openjdk/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp 2023-11-01 10:27:44.297760869 +0800 -@@ -214,16 +214,29 @@ - __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); - } - --void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, T tgt, CodeEmitInfo* info) { - LIR_Opr scratch = FrameMap::Z_R1_opr; - __ load(new LIR_Address(base, disp, T_INT), scratch, info); -- __ cmp(condition, scratch, c); -+ __ cmp_branch(condition, scratch, c, tgt); - } - --void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, CodeStub*, CodeEmitInfo*); -+ -+template -+void LIRGenerator::cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, T tgt, CodeEmitInfo* info) { - __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); -+ __ branch(condition, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, CodeStub*, CodeEmitInfo*); -+ - bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { - if (tmp->is_valid()) { - if (is_power_of_2(c + 1)) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/s390/c1_LIR_s390.cpp jdk17u-ls/src/hotspot/cpu/s390/c1_LIR_s390.cpp ---- openjdk/src/hotspot/cpu/s390/c1_LIR_s390.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/s390/c1_LIR_s390.cpp 2023-11-01 10:27:44.297760869 +0800 -@@ -56,3 +56,23 @@ - } - #endif // PRODUCT - -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info) { -+ cmp(condition, left, right, info); -+ branch(condition, tgt); -+} -+ -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, CodeStub*, CodeEmitInfo*); -+ -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, block, unordered); -+} -+ -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp jdk17u-ls/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp ---- openjdk/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp 2023-11-01 10:27:44.305760879 +0800 -@@ -1459,6 +1459,10 @@ - } - } - -+void LIR_Assembler::emit_opCmpBranch(LIR_OpCmpBranch* op) { -+ ShouldNotReachHere(); -+} -+ - void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { - LIR_Opr src = op->in_opr(); - LIR_Opr dest = op->result_opr(); -@@ -2077,6 +2081,9 @@ - } - } - -+void LIR_Assembler::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type) { -+ ShouldNotReachHere(); -+} - - void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { - assert(info == NULL, "should never be used, idiv/irem and ldiv/lrem not handled by this method"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp jdk17u-ls/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp ---- openjdk/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp 2023-11-01 10:27:44.305760879 +0800 -@@ -259,15 +259,27 @@ - __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); - } - --void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, T tgt, CodeEmitInfo* info) { - __ cmp_mem_int(condition, base, disp, c, info); -+ __ branch(condition, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_mem_int_branch(LIR_Condition, LIR_Opr, int, int, CodeStub*, CodeEmitInfo*); - --void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { -+template -+void LIRGenerator::cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, T tgt, CodeEmitInfo* info) { - __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); -+ __ branch(condition, tgt); - } - -+// Explicit instantiation for all supported types. -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, Label*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, BlockBegin*, CodeEmitInfo*); -+template void LIRGenerator::cmp_reg_mem_branch(LIR_Condition, LIR_Opr, LIR_Opr, int, BasicType, CodeStub*, CodeEmitInfo*); - - bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { - if (tmp->is_valid() && c > 0 && c < max_jint) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/c1_LIR_x86.cpp jdk17u-ls/src/hotspot/cpu/x86/c1_LIR_x86.cpp ---- openjdk/src/hotspot/cpu/x86/c1_LIR_x86.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/x86/c1_LIR_x86.cpp 2023-11-01 10:27:44.305760879 +0800 -@@ -72,3 +72,24 @@ - #endif - } - #endif // PRODUCT -+ -+template -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info) { -+ cmp(condition, left, right, info); -+ branch(condition, tgt); -+} -+ -+// Explicit instantiation for all supported types. -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, Label*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, BlockBegin*, CodeEmitInfo*); -+template void LIR_List::cmp_branch(LIR_Condition, LIR_Opr, LIR_Opr, CodeStub*, CodeEmitInfo*); -+ -+void LIR_List::cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered) { -+ cmp(condition, left, right); -+ branch(condition, block, unordered); -+} -+ -+void LIR_List::cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { -+ cmp(condition, left, right); -+ cmove(condition, src1, src2, dst, type); -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp jdk17u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp ---- openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp 2023-11-01 10:27:44.305760879 +0800 -@@ -266,7 +266,8 @@ - #define __ ce->masm()-> - - void ZBarrierSetAssembler::generate_c1_load_barrier_test(LIR_Assembler* ce, -- LIR_Opr ref) const { -+ LIR_Opr ref, -+ LIR_Opr res) const { - __ testptr(ref->as_register(), address_bad_mask_from_thread(r15_thread)); - } - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp jdk17u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp ---- openjdk/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.hpp 2023-11-01 10:27:44.305760879 +0800 -@@ -80,7 +80,8 @@ - - #ifdef COMPILER1 - void generate_c1_load_barrier_test(LIR_Assembler* ce, -- LIR_Opr ref) const; -+ LIR_Opr ref, -+ LIR_Opr res) const; - - void generate_c1_load_barrier_stub(LIR_Assembler* ce, - ZLoadBarrierStubC1* stub) const; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/cpu/x86/gc/z/zGlobals_x86.hpp jdk17u-ls/src/hotspot/cpu/x86/gc/z/zGlobals_x86.hpp ---- openjdk/src/hotspot/cpu/x86/gc/z/zGlobals_x86.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/cpu/x86/gc/z/zGlobals_x86.hpp 2023-11-01 10:27:44.305760879 +0800 -@@ -28,6 +28,8 @@ +diff --git a/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.hpp b/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.hpp +index 3657b16fc..a2aab2257 100644 +--- a/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.hpp ++++ b/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.hpp +@@ -30,6 +30,8 @@ const size_t ZPlatformGranuleSizeShift = 21; // 2MB const size_t ZPlatformHeapViews = 3; - const size_t ZPlatformCacheLineSize = 64; + const size_t ZPlatformCacheLineSize = DEFAULT_CACHE_LINE_SIZE; +const bool ZPlatformLoadBarrierTestResultInRegister = false; + size_t ZPlatformAddressOffsetBits(); size_t ZPlatformAddressMetadataShift(); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_linux.cpp jdk17u-ls/src/hotspot/os/linux/os_linux.cpp ---- openjdk/src/hotspot/os/linux/os_linux.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os/linux/os_linux.cpp 2023-11-01 10:27:44.329760908 +0800 +diff --git a/src/hotspot/os/linux/os_linux.cpp b/src/hotspot/os/linux/os_linux.cpp +index 7c951cee5..5747d4d3f 100644 +--- a/src/hotspot/os/linux/os_linux.cpp ++++ b/src/hotspot/os/linux/os_linux.cpp @@ -23,6 +23,12 @@ * */ @@ -111297,7 +110739,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_li // no precompiled headers #include "jvm.h" #include "classfile/vmSymbols.hpp" -@@ -2416,7 +2422,7 @@ +@@ -2457,7 +2463,7 @@ void os::print_memory_info(outputStream* st) { // before "flags" so if we find a second "model name", then the // "flags" field is considered missing. static bool print_model_name_and_flags(outputStream* st, char* buf, size_t buflen) { @@ -111306,7 +110748,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_li // Other platforms have less repetitive cpuinfo files FILE *fp = fopen("/proc/cpuinfo", "r"); if (fp) { -@@ -2506,7 +2512,7 @@ +@@ -2547,7 +2553,7 @@ void os::pd_print_cpu_info(outputStream* st, char* buf, size_t buflen) { print_sys_devices_cpu_info(st, buf, buflen); } @@ -111315,9 +110757,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os/linux/os_li const char* search_string = "model name"; #elif defined(M68K) const char* search_string = "CPU"; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp 2023-09-08 09:39:50.481842191 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp +new file mode 100644 +index 000000000..30719a034 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -111343,13 +110787,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + * questions. + * + */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp 2023-11-01 10:27:44.337760917 +0800 -@@ -0,0 +1,269 @@ +diff --git a/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp +new file mode 100644 +index 000000000..77413aba9 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp +@@ -0,0 +1,275 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -111516,13 +110962,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + + switch (order) { + case memory_order_relaxed: ++ case memory_order_release: + asm volatile ( + "1: ll.w %[prev], %[dest] \n\t" + " bne %[prev], %[_old], 2f \n\t" + " move %[temp], %[_new] \n\t" + " sc.w %[temp], %[dest] \n\t" + " beqz %[temp], 1b \n\t" -+ "2: \n\t" ++ " b 3f \n\t" ++ "2: dbar 0x700 \n\t" ++ "3: \n\t" + : [prev] "=&r" (prev), [temp] "=&r" (temp) + : [_old] "r" (compare_value), [_new] "r" (exchange_value), [dest] "ZC" (*dest) + : "memory"); @@ -111535,7 +110984,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + " sc.w %[temp], %[dest] \n\t" + " beqz %[temp], 1b \n\t" + " b 3f \n\t" -+ "2: dbar 0 \n\t" ++ "2: dbar 0x14 \n\t" + "3: \n\t" + : [prev] "=&r" (prev), [temp] "=&r" (temp) + : [_old] "r" (compare_value), [_new] "r" (exchange_value), [dest] "ZC" (*dest) @@ -111557,13 +111006,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + + switch (order) { + case memory_order_relaxed: ++ case memory_order_release: + asm volatile ( + "1: ll.d %[prev], %[dest] \n\t" + " bne %[prev], %[_old], 2f \n\t" + " move %[temp], %[_new] \n\t" + " sc.d %[temp], %[dest] \n\t" + " beqz %[temp], 1b \n\t" -+ "2: \n\t" ++ " b 3f \n\t" ++ "2: dbar 0x700 \n\t" ++ "3: \n\t" + : [prev] "=&r" (prev), [temp] "=&r" (temp) + : [_old] "r" (compare_value), [_new] "r" (exchange_value), [dest] "ZC" (*dest) + : "memory"); @@ -111576,7 +111028,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + " sc.d %[temp], %[dest] \n\t" + " beqz %[temp], 1b \n\t" + " b 3f \n\t" -+ "2: dbar 0 \n\t" ++ "2: dbar 0x14 \n\t" + "3: \n\t" + : [prev] "=&r" (prev), [temp] "=&r" (temp) + : [_old] "r" (compare_value), [_new] "r" (exchange_value), [dest] "ZC" (*dest) @@ -111616,9 +111068,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +}; + +#endif // OS_CPU_LINUX_LOONGARCH_ATOMIC_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp 2023-09-08 09:39:50.481842191 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp +new file mode 100644 +index 000000000..c9f675bac +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/bytes_linux_loongarch.inline.hpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -111657,9 +111111,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +inline u8 Bytes::swap_u8(u8 x) { return bswap_64(x); } + +#endif // OS_CPU_LINUX_LOONGARCH_BYTES_LINUX_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp 2023-09-08 09:39:50.481842191 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp +new file mode 100644 +index 000000000..826c1fe39 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -111786,9 +111242,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +} + +#endif // OS_CPU_LINUX_LOONGARCH_COPY_LINUX_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp 2023-09-08 09:39:50.481842191 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp +new file mode 100644 +index 000000000..46d5d5a26 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -111831,9 +111289,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +#endif + +#endif // OS_CPU_LINUX_LOONGARCH_GC_Z_ZSYSCALL_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp 2023-09-08 09:39:50.481842191 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp +new file mode 100644 +index 000000000..0b5247aa0 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -111878,9 +111338,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_LOONGARCH_GLOBALS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s ---- openjdk/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s 2023-09-08 09:39:50.481842191 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s +new file mode 100644 +index 000000000..ebd73af0c +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s @@ -0,0 +1,25 @@ +# +# Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved. @@ -111907,9 +111369,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +# + + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp 2023-11-01 10:27:44.337760917 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp +new file mode 100644 +index 000000000..6236e741d +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -111944,29 +111408,31 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +// Included in orderAccess.hpp header file. + +// Implementation of class OrderAccess. -+#define inlasm_sync() if (os::is_ActiveCoresMP()) \ ++#define inlasm_sync(v) if (os::is_ActiveCoresMP()) \ + __asm__ __volatile__ ("nop" : : : "memory"); \ + else \ -+ __asm__ __volatile__ ("dbar 0" : : : "memory"); ++ __asm__ __volatile__ ("dbar %0" : :"K"(v) : "memory"); ++#define inlasm_synci() __asm__ __volatile__ ("ibar 0" : : : "memory"); + -+inline void OrderAccess::loadload() { inlasm_sync(); } -+inline void OrderAccess::storestore() { inlasm_sync(); } -+inline void OrderAccess::loadstore() { inlasm_sync(); } -+inline void OrderAccess::storeload() { inlasm_sync(); } -+ -+inline void OrderAccess::acquire() { inlasm_sync(); } -+inline void OrderAccess::release() { inlasm_sync(); } -+inline void OrderAccess::fence() { inlasm_sync(); } -+inline void OrderAccess::cross_modify_fence_impl() { inlasm_sync(); } ++inline void OrderAccess::loadload() { inlasm_sync(0x15); } ++inline void OrderAccess::storestore() { inlasm_sync(0x1a); } ++inline void OrderAccess::loadstore() { inlasm_sync(0x16); } ++inline void OrderAccess::storeload() { inlasm_sync(0x19); } + ++inline void OrderAccess::acquire() { inlasm_sync(0x14); } ++inline void OrderAccess::release() { inlasm_sync(0x12); } ++inline void OrderAccess::fence() { inlasm_sync(0x10); } ++inline void OrderAccess::cross_modify_fence_impl() { inlasm_synci(); } + +#undef inlasm_sync + +#endif // OS_CPU_LINUX_LOONGARCH_ORDERACCESS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp 2023-11-01 10:27:44.337760917 +0800 -@@ -0,0 +1,500 @@ +diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp +new file mode 100644 +index 000000000..b32ffe910 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp +@@ -0,0 +1,529 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. @@ -112098,6 +111564,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + intptr_t* sp; + intptr_t* fp; + address epc = fetch_frame_from_context(ucVoid, &sp, &fp); ++ if (!is_readable_pointer(epc)) { ++ // Try to recover from calling into bad memory ++ // Assume new frame has not been set up, the same as ++ // compiled frame stack bang ++ return fetch_compiled_frame_from_context(ucVoid); ++ } + return frame(sp, fp, epc); +} + @@ -112186,7 +111658,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +#endif + + // Handle signal from NativeJump::patch_verified_entry(). -+ if (sig == SIGILL & nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { ++ if (sig == SIGILL && nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { +#ifdef PRINT_SIGNAL_HANDLE + tty->print_cr("verified entry = %lx, sig=%d", nativeInstruction_at(pc), sig); +#endif @@ -112245,6 +111717,24 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +#ifdef PRINT_SIGNAL_HANDLE + tty->print_cr("continuation_for_implicit_exception stub: %lx", stub); +#endif ++ } else if (sig == SIGILL && nativeInstruction_at(pc)->is_stop()) { ++ // Pull a pointer to the error message out of the instruction ++ // stream. ++ const uint64_t *detail_msg_ptr ++ = (uint64_t*)(pc + 4/*NativeInstruction::instruction_size*/); ++ const char *detail_msg = (const char *)*detail_msg_ptr; ++ const char *msg = "stop"; ++ if (TraceTraps) { ++ tty->print_cr("trap: %s: (SIGILL)", msg); ++ } ++ ++ // End life with a fatal error, message and detail message and the context. ++ // Note: no need to do any post-processing here (e.g. signal chaining) ++ va_list va_dummy; ++ VMError::report_and_die(thread, uc, nullptr, 0, msg, detail_msg, va_dummy); ++ va_end(va_dummy); ++ ++ ShouldNotReachHere(); + } + } else if ((thread->thread_state() == _thread_in_vm || + thread->thread_state() == _thread_in_native) && @@ -112392,6 +111882,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + if (context == NULL) return; + + const ucontext_t *uc = (const ucontext_t*)context; ++ + st->print_cr("Registers:"); + st->print( "ZERO=" INTPTR_FORMAT, (intptr_t)uc->uc_mcontext.__gregs[0]); + st->print(", RA=" INTPTR_FORMAT, (intptr_t)uc->uc_mcontext.__gregs[1]); @@ -112434,19 +111925,23 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + st->print(", S8=" INTPTR_FORMAT, (intptr_t)uc->uc_mcontext.__gregs[31]); + st->cr(); + st->cr(); ++} + -+ intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc); -+ st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", p2i(sp)); -+ print_hex_dump(st, (address)(sp - 32), (address)(sp + 32), sizeof(intptr_t)); ++void os::print_tos_pc(outputStream *st, const void *context) { ++ if (context == NULL) return; ++ ++ const ucontext_t* uc = (const ucontext_t*)context; ++ ++ address sp = (address)os::Linux::ucontext_get_sp(uc); ++ print_tos(st, sp); + st->cr(); + + // Note: it may be unsafe to inspect memory near pc. For example, pc may + // point to garbage if entry point in an nmethod is corrupted. Leave + // this at the end, and hope for the best. -+ address pc = os::Posix::ucontext_get_pc(uc); -+ st->print_cr("Instructions: (pc=" PTR_FORMAT ")", p2i(pc)); -+ print_hex_dump(st, pc - 64, pc + 64, sizeof(char)); -+ Disassembler::decode(pc - 80, pc + 80, st); ++ address pc = os::fetch_frame_from_context(uc).pc(); ++ print_instructions(st, pc); ++ st->cr(); +} + +void os::setup_fpu() { @@ -112467,9 +111962,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +bool os::is_ActiveCoresMP() { + return UseActiveCoresMP && _initial_active_processor_count == 1; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp +new file mode 100644 +index 000000000..fa02f8ba2 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.hpp @@ -0,0 +1,38 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -112509,9 +112006,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + static bool is_ActiveCoresMP(); + +#endif // OS_CPU_LINUX_LOONGARCH_OS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp +new file mode 100644 +index 000000000..cf3a59638 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -112569,9 +112068,73 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +} + +#endif // OS_CPU_LINUX_LOONGARCH_PREFETCH_LINUX_LOONGARCH_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S b/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S +new file mode 100644 +index 000000000..fdc6da358 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S +@@ -0,0 +1,56 @@ ++/* ++ * Copyright (c) 2022 SAP SE. All rights reserved. ++ * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++ .globl SafeFetchN_impl ++ .globl _SafeFetchN_fault ++ .globl _SafeFetchN_continuation ++ .globl SafeFetch32_impl ++ .globl _SafeFetch32_fault ++ .globl _SafeFetch32_continuation ++ ++ # Support for int SafeFetch32(int* address, int defaultval); ++ # ++ # a0 : address ++ # a1 : defaultval ++SafeFetch32_impl: ++_SafeFetch32_fault: ++ ld.w $r4, $r4, 0 ++ jr $r1 ++_SafeFetch32_continuation: ++ or $r4, $r5, $r0 ++ jr $r1 ++ ++ # Support for intptr_t SafeFetchN(intptr_t* address, intptr_t defaultval); ++ # ++ # a0 : address ++ # a1 : defaultval ++SafeFetchN_impl: ++_SafeFetchN_fault: ++ ld.d $r4, $r4, 0 ++ jr $r1 ++_SafeFetchN_continuation: ++ or $r4, $r5, $r0 ++ jr $r1 +diff --git a/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp +new file mode 100644 +index 000000000..9204302bc +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.cpp @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -112678,9 +112241,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +} + +void JavaThread::cache_global_variables() { } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp +new file mode 100644 +index 000000000..82fc6fb65 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/thread_linux_loongarch.hpp @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -112748,9 +112313,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_LOONGARCH_VM_THREAD_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp ---- openjdk/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp +new file mode 100644 +index 000000000..a39cb79bb +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -112807,9 +112374,112 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_l +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_LOONGARCH_VMSTRUCTS_LINUX_LOONGARCH_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp +new file mode 100644 +index 000000000..3711a7036 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp +@@ -0,0 +1,95 @@ ++/* ++ * Copyright (c) 2006, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/register.hpp" ++#include "runtime/os.hpp" ++#include "runtime/os.inline.hpp" ++#include "runtime/vm_version.hpp" ++ ++#include ++#include ++ ++#ifndef HWCAP_LOONGARCH_LAM ++#define HWCAP_LOONGARCH_LAM (1 << 1) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_UAL ++#define HWCAP_LOONGARCH_UAL (1 << 2) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LSX ++#define HWCAP_LOONGARCH_LSX (1 << 4) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LASX ++#define HWCAP_LOONGARCH_LASX (1 << 5) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_COMPLEX ++#define HWCAP_LOONGARCH_COMPLEX (1 << 7) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_CRYPTO ++#define HWCAP_LOONGARCH_CRYPTO (1 << 8) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LBT_X86 ++#define HWCAP_LOONGARCH_LBT_X86 (1 << 10) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LBT_ARM ++#define HWCAP_LOONGARCH_LBT_ARM (1 << 11) ++#endif ++ ++#ifndef HWCAP_LOONGARCH_LBT_MIPS ++#define HWCAP_LOONGARCH_LBT_MIPS (1 << 12) ++#endif ++ ++void VM_Version::get_os_cpu_info() { ++ ++ uint64_t auxv = getauxval(AT_HWCAP); ++ ++ static_assert(CPU_LAM == HWCAP_LOONGARCH_LAM, "Flag CPU_LAM must follow Linux HWCAP"); ++ static_assert(CPU_UAL == HWCAP_LOONGARCH_UAL, "Flag CPU_UAL must follow Linux HWCAP"); ++ static_assert(CPU_LSX == HWCAP_LOONGARCH_LSX, "Flag CPU_LSX must follow Linux HWCAP"); ++ static_assert(CPU_LASX == HWCAP_LOONGARCH_LASX, "Flag CPU_LASX must follow Linux HWCAP"); ++ static_assert(CPU_COMPLEX == HWCAP_LOONGARCH_COMPLEX, "Flag CPU_COMPLEX must follow Linux HWCAP"); ++ static_assert(CPU_CRYPTO == HWCAP_LOONGARCH_CRYPTO, "Flag CPU_CRYPTO must follow Linux HWCAP"); ++ static_assert(CPU_LBT_X86 == HWCAP_LOONGARCH_LBT_X86, "Flag CPU_LBT_X86 must follow Linux HWCAP"); ++ static_assert(CPU_LBT_ARM == HWCAP_LOONGARCH_LBT_ARM, "Flag CPU_LBT_ARM must follow Linux HWCAP"); ++ static_assert(CPU_LBT_MIPS == HWCAP_LOONGARCH_LBT_MIPS, "Flag CPU_LBT_MIPS must follow Linux HWCAP"); ++ ++ _features = auxv & ( ++ HWCAP_LOONGARCH_LAM | ++ HWCAP_LOONGARCH_UAL | ++ HWCAP_LOONGARCH_LSX | ++ HWCAP_LOONGARCH_LASX | ++ HWCAP_LOONGARCH_COMPLEX | ++ HWCAP_LOONGARCH_CRYPTO | ++ HWCAP_LOONGARCH_LBT_X86 | ++ HWCAP_LOONGARCH_LBT_ARM | ++ HWCAP_LOONGARCH_LBT_MIPS); ++} +diff --git a/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp +new file mode 100644 +index 000000000..30719a034 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/assembler_linux_mips.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -112835,9 +112505,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + * questions. + * + */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp +new file mode 100644 +index 000000000..c82e3ce1e +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/atomic_linux_mips.hpp @@ -0,0 +1,194 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -113033,9 +112705,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + + +#endif // OS_CPU_LINUX_MIPS_VM_ATOMIC_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp +new file mode 100644 +index 000000000..5b5cd10aa +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/bytes_linux_mips.inline.hpp @@ -0,0 +1,37 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -113074,9 +112748,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +inline u8 Bytes::swap_u8(u8 x) { return bswap_64(x); } + +#endif // OS_CPU_LINUX_MIPS_VM_BYTES_LINUX_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp +new file mode 100644 +index 000000000..3fd6ef7b3 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/copy_linux_mips.inline.hpp @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -113203,9 +112879,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +} + +#endif // OS_CPU_LINUX_MIPS_VM_COPY_LINUX_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp +new file mode 100644 +index 000000000..f1599ac5f +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/globals_linux_mips.hpp @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -113258,9 +112936,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_MIPS_VM_GLOBALS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/linux_mips.s jdk17u-ls/src/hotspot/os_cpu/linux_mips/linux_mips.s ---- openjdk/src/hotspot/os_cpu/linux_mips/linux_mips.s 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/linux_mips.s 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/linux_mips.s b/src/hotspot/os_cpu/linux_mips/linux_mips.s +new file mode 100644 +index 000000000..36c8d810c +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/linux_mips.s @@ -0,0 +1,25 @@ +# +# Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved. @@ -113287,9 +112967,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +# + + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp 2023-11-01 10:27:44.337760917 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp +new file mode 100644 +index 000000000..a92bf43bd +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/orderAccess_linux_mips.hpp @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -113328,6 +113010,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + __asm__ __volatile__ ("nop" : : : "memory"); \ + else \ + __asm__ __volatile__ ("sync" : : : "memory"); ++#define inlasm_synci() __asm__ __volatile__ ("synci 0($0)" : : : "memory"); + +inline void OrderAccess::loadload() { inlasm_sync(); } +inline void OrderAccess::storestore() { inlasm_sync(); } @@ -113337,19 +113020,20 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +inline void OrderAccess::acquire() { inlasm_sync(); } +inline void OrderAccess::release() { inlasm_sync(); } +inline void OrderAccess::fence() { inlasm_sync(); } -+inline void OrderAccess::cross_modify_fence_impl() { inlasm_sync(); } -+ ++inline void OrderAccess::cross_modify_fence_impl() { inlasm_synci(); } + +#undef inlasm_sync + +#endif // OS_CPU_LINUX_MIPS_VM_ORDERACCESS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp 2023-11-01 10:27:44.337760917 +0800 -@@ -0,0 +1,810 @@ +diff --git a/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp +new file mode 100644 +index 000000000..ff1af7beb +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/os_linux_mips.cpp +@@ -0,0 +1,817 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -113597,7 +113281,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#endif + + // Handle signal from NativeJump::patch_verified_entry(). -+ if (sig == SIGILL & nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { ++ if (sig == SIGILL && nativeInstruction_at(pc)->is_sigill_zombie_not_entrant()) { +#ifdef PRINT_SIGNAL_HANDLE + tty->print_cr("verified entry = %lx, sig=%d", nativeInstruction_at(pc), sig); +#endif @@ -114069,6 +113753,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + if (context == NULL) return; + + const ucontext_t *uc = (const ucontext_t*)context; ++ + st->print_cr("Registers:"); + st->print( "R0=" INTPTR_FORMAT, (intptr_t)uc->uc_mcontext.gregs[0]); + st->print(", AT=" INTPTR_FORMAT, (intptr_t)uc->uc_mcontext.gregs[1]); @@ -114111,6 +113796,12 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + st->print(", RA=" INTPTR_FORMAT, (intptr_t)uc->uc_mcontext.gregs[31]); + st->cr(); + st->cr(); ++} ++ ++void os::print_tos_pc(outputStream *st, const void *context) { ++ if (context == NULL) return; ++ ++ const ucontext_t* uc = (const ucontext_t*)context; + + intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc); + st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", p2i(sp)); @@ -114157,9 +113848,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +bool os::is_ActiveCoresMP() { + return UseActiveCoresMP && _initial_active_processor_count == 1; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp +new file mode 100644 +index 000000000..c07d08156 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/os_linux_mips.hpp @@ -0,0 +1,39 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -114200,9 +113893,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + static bool is_ActiveCoresMP(); + +#endif // OS_CPU_LINUX_MIPS_VM_OS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp b/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp +new file mode 100644 +index 000000000..93490345f +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/prefetch_linux_mips.inline.hpp @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -114262,13 +113957,81 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +} + +#endif // OS_CPU_LINUX_MIPS_VM_PREFETCH_LINUX_MIPS_INLINE_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp 2023-11-01 10:27:44.337760917 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/safefetch_linux_mips64.S b/src/hotspot/os_cpu/linux_mips/safefetch_linux_mips64.S +new file mode 100644 +index 000000000..fc6ee6eca +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/safefetch_linux_mips64.S +@@ -0,0 +1,60 @@ ++/* ++ * Copyright (c) 2022 SAP SE. All rights reserved. ++ * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++ .globl SafeFetchN_impl ++ .globl _SafeFetchN_fault ++ .globl _SafeFetchN_continuation ++ .globl SafeFetch32_impl ++ .globl _SafeFetch32_fault ++ .globl _SafeFetch32_continuation ++ ++ # Support for int SafeFetch32(int* address, int defaultval); ++ # ++ # a0 : address ++ # a1 : defaultval ++SafeFetch32_impl: ++_SafeFetch32_fault: ++ lw $2, 0($4) ++ j $31 ++ nop ++_SafeFetch32_continuation: ++ or $2, $5, $0 ++ j $31 ++ nop ++ ++ # Support for intptr_t SafeFetchN(intptr_t* address, intptr_t defaultval); ++ # ++ # a0 : address ++ # a1 : defaultval ++SafeFetchN_impl: ++_SafeFetchN_fault: ++ ld $2, 0($4) ++ j $31 ++ nop ++_SafeFetchN_continuation: ++ or $2, $5, $0 ++ j $31 ++ nop +diff --git a/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp +new file mode 100644 +index 000000000..4372eb41e +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.cpp @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -114352,7 +114115,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + + frame ret_frame(ret_sp, ret_fp, addr); + if (!ret_frame.safe_for_sender(jt)) { -+#if COMPILER2 ++#ifdef COMPILER2 + // C2 and JVMCI use ebp as a general register see if NULL fp helps + frame ret_frame2(ret_sp, NULL, addr); + if (!ret_frame2.safe_for_sender(jt)) { @@ -114374,9 +114137,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +} + +void JavaThread::cache_global_variables() { } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp +new file mode 100644 +index 000000000..c38f6950f +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/thread_linux_mips.hpp @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -114444,9 +114209,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_MIPS_VM_THREAD_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp ---- openjdk/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp b/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp +new file mode 100644 +index 000000000..b7454bf04 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/vmStructs_linux_mips.hpp @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -114503,9 +114270,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_MIPS_VM_VMSTRUCTS_LINUX_MIPS_HPP -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp jdk17u-ls/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp ---- openjdk/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp 2023-09-08 09:39:50.485842196 +0800 +diff --git a/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp b/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp +new file mode 100644 +index 000000000..93e4bea04 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_mips/vm_version_linux_mips.cpp @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. @@ -114535,35 +114304,60 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/os_cpu/linux_m +#include "precompiled.hpp" +#include "runtime/os.hpp" +#include "runtime/vm_version.hpp" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/asm/codeBuffer.cpp jdk17u-ls/src/hotspot/share/asm/codeBuffer.cpp ---- openjdk/src/hotspot/share/asm/codeBuffer.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/asm/codeBuffer.cpp 2023-11-01 10:27:44.341760922 +0800 -@@ -330,6 +330,9 @@ +diff --git a/src/hotspot/share/adlc/formssel.cpp b/src/hotspot/share/adlc/formssel.cpp +index b45f432da..02bec17dd 100644 +--- a/src/hotspot/share/adlc/formssel.cpp ++++ b/src/hotspot/share/adlc/formssel.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + // FORMS.CPP - Definitions for ADL Parser Forms Classes + #include "adlc.hpp" + +@@ -4124,6 +4130,7 @@ bool MatchRule::is_ideal_membar() const { + !strcmp(_opType,"MemBarVolatile") || + !strcmp(_opType,"MemBarCPUOrder") || + !strcmp(_opType,"MemBarStoreStore") || ++ !strcmp(_opType,"SameAddrLoadFence" ) || + !strcmp(_opType,"OnSpinWait"); + } + +diff --git a/src/hotspot/share/asm/codeBuffer.cpp b/src/hotspot/share/asm/codeBuffer.cpp +index 0012152d4..e3660cab2 100644 +--- a/src/hotspot/share/asm/codeBuffer.cpp ++++ b/src/hotspot/share/asm/codeBuffer.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023. These ++ * modifications are Copyright (c) 2018, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "asm/codeBuffer.hpp" + #include "code/oopRecorder.inline.hpp" +@@ -330,6 +336,7 @@ void CodeSection::relocate(address at, RelocationHolder const& spec, int format) assert(rtype == relocInfo::none || rtype == relocInfo::runtime_call_type || rtype == relocInfo::internal_word_type|| -+#ifdef MIPS -+ rtype == relocInfo::internal_pc_type || -+#endif ++ NOT_ZERO(MIPS64_ONLY(rtype == relocInfo::internal_pc_type ||)) rtype == relocInfo::section_word_type || rtype == relocInfo::external_word_type, "code needs relocation information"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/asm/codeBuffer.hpp jdk17u-ls/src/hotspot/share/asm/codeBuffer.hpp ---- openjdk/src/hotspot/share/asm/codeBuffer.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/asm/codeBuffer.hpp 2023-09-08 09:39:50.497842212 +0800 -@@ -422,6 +422,9 @@ - _oop_recorder = NULL; - _overflow_arena = NULL; - _last_insn = NULL; -+#if defined(MIPS) && !defined(ZERO) -+ _continuous_load_instuctions_count = 0; -+#endif - - #ifndef PRODUCT - _decode_begin = NULL; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_Compiler.cpp jdk17u-ls/src/hotspot/share/c1/c1_Compiler.cpp ---- openjdk/src/hotspot/share/c1/c1_Compiler.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_Compiler.cpp 2023-11-01 10:27:44.341760922 +0800 +diff --git a/src/hotspot/share/c1/c1_Compiler.cpp b/src/hotspot/share/c1/c1_Compiler.cpp +index de173c64a..df93c01d8 100644 +--- a/src/hotspot/share/c1/c1_Compiler.cpp ++++ b/src/hotspot/share/c1/c1_Compiler.cpp @@ -43,6 +43,12 @@ #include "utilities/bitMap.inline.hpp" #include "utilities/macros.hpp" @@ -114577,7 +114371,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_Co Compiler::Compiler() : AbstractCompiler(compiler_c1) { } -@@ -211,7 +217,7 @@ +@@ -212,7 +218,7 @@ bool Compiler::is_intrinsic_supported(const methodHandle& method) { case vmIntrinsics::_updateCRC32: case vmIntrinsics::_updateBytesCRC32: case vmIntrinsics::_updateByteBufferCRC32: @@ -114586,853 +114380,239 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_Co case vmIntrinsics::_updateBytesCRC32C: case vmIntrinsics::_updateDirectByteBufferCRC32C: #endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LinearScan.cpp jdk17u-ls/src/hotspot/share/c1/c1_LinearScan.cpp ---- openjdk/src/hotspot/share/c1/c1_LinearScan.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LinearScan.cpp 2023-11-01 10:27:44.349760932 +0800 -@@ -35,6 +35,12 @@ - #include "runtime/timerTrace.hpp" - #include "utilities/bitMap.inline.hpp" +diff --git a/src/hotspot/share/c1/c1_LIR.cpp b/src/hotspot/share/c1/c1_LIR.cpp +index 308f3a09c..53a68cdb2 100644 +--- a/src/hotspot/share/c1/c1_LIR.cpp ++++ b/src/hotspot/share/c1/c1_LIR.cpp +@@ -22,6 +22,12 @@ + * + */ +/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + - #ifndef PRODUCT - - static LinearScanStatistic _stat_before_alloc; -@@ -1256,6 +1262,23 @@ - } - break; - } -+ case lir_cmp_cmove: { -+ assert(op->as_Op4() != NULL, "lir_cmp_cmove must be LIR_Op4"); -+ LIR_Op4* cmove = (LIR_Op4*)op; -+ -+ LIR_Opr move_from = cmove->in_opr3(); -+ LIR_Opr move_to = cmove->result_opr(); -+ -+ if (move_to->is_register() && move_from->is_register()) { -+ Interval* from = interval_at(reg_num(move_from)); -+ Interval* to = interval_at(reg_num(move_to)); -+ if (from != NULL && to != NULL) { -+ to->set_register_hint(from); -+ TRACE_LINEAR_SCAN(4, tty->print_cr("operation at op_id %d: added hint from interval %d to %d", cmove->id(), from->reg_num(), to->reg_num())); -+ } -+ } -+ break; -+ } - default: - break; - } -@@ -3386,7 +3409,9 @@ - check_live = (move->patch_code() == lir_patch_none); - } - LIR_OpBranch* branch = op->as_OpBranch(); -- if (branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) { -+ LIR_OpCmpBranch* cmp_branch = op->as_OpCmpBranch(); -+ if ((branch != NULL && branch->stub() != NULL && branch->stub()->is_exception_throw_stub()) || -+ (cmp_branch != NULL && cmp_branch->stub() != NULL && cmp_branch->stub()->is_exception_throw_stub())) { - // Don't bother checking the stub in this case since the - // exception stub will never return to normal control flow. - check_live = false; -@@ -6282,6 +6307,16 @@ - if (branch->ublock() == target_from) { - branch->change_ublock(target_to); - } -+ } else if (op->code() == lir_cmp_branch || op->code() == lir_cmp_float_branch) { -+ assert(op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); -+ LIR_OpCmpBranch* branch = (LIR_OpCmpBranch*)op; -+ -+ if (branch->block() == target_from) { -+ branch->change_block(target_to); -+ } -+ if (branch->ublock() == target_from) { -+ branch->change_ublock(target_to); -+ } - } - } - } -@@ -6404,6 +6439,20 @@ - } - } - } -+ } else if (prev_op->code() == lir_cmp_branch || prev_op->code() == lir_cmp_float_branch) { -+ assert(prev_op->as_OpCmpBranch() != NULL, "branch must be of type LIR_OpCmpBranch"); -+ LIR_OpCmpBranch* prev_branch = (LIR_OpCmpBranch*)prev_op; -+ -+ if (prev_branch->stub() == NULL) { -+ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == NULL) { -+ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); -+ -+ // eliminate a conditional branch to the immediate successor -+ prev_branch->change_block(last_branch->block()); -+ prev_branch->negate_cond(); -+ instructions->trunc_to(instructions->length() - 1); -+ } -+ } - } - } - } -@@ -6479,6 +6528,13 @@ - assert(op_branch->block() == NULL || code->find(op_branch->block()) != -1, "branch target not valid"); - assert(op_branch->ublock() == NULL || code->find(op_branch->ublock()) != -1, "branch target not valid"); - } -+ -+ LIR_OpCmpBranch* op_cmp_branch = instructions->at(j)->as_OpCmpBranch(); -+ -+ if (op_cmp_branch != NULL) { -+ assert(op_cmp_branch->block() == NULL || code->find(op_cmp_branch->block()) != -1, "branch target not valid"); -+ assert(op_cmp_branch->ublock() == NULL || code->find(op_cmp_branch->ublock()) != -1, "branch target not valid"); -+ } - } - - for (j = 0; j < block->number_of_sux() - 1; j++) { -@@ -6722,6 +6778,24 @@ - break; - } - -+ case lir_cmp_branch: -+ case lir_cmp_float_branch: { -+ LIR_OpCmpBranch* branch = op->as_OpCmpBranch(); -+ if (branch->block() == NULL) { -+ inc_counter(counter_stub_branch); -+ } else { -+ inc_counter(counter_cond_branch); -+ } -+ inc_counter(counter_cmp); -+ break; -+ } -+ -+ case lir_cmp_cmove: { -+ inc_counter(counter_misc_inst); -+ inc_counter(counter_cmp); -+ break; -+ } -+ - case lir_neg: - case lir_add: - case lir_sub: -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRAssembler.cpp jdk17u-ls/src/hotspot/share/c1/c1_LIRAssembler.cpp ---- openjdk/src/hotspot/share/c1/c1_LIRAssembler.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LIRAssembler.cpp 2023-11-01 10:27:44.345760927 +0800 -@@ -757,6 +757,18 @@ - } - - -+void LIR_Assembler::emit_op4(LIR_Op4* op) { -+ switch (op->code()) { -+ case lir_cmp_cmove: -+ cmp_cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->in_opr3(), op->in_opr4(), op->result_opr(), op->type()); -+ break; -+ -+ default: -+ Unimplemented(); -+ break; -+ } -+} -+ - void LIR_Assembler::build_frame() { - _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRAssembler.hpp jdk17u-ls/src/hotspot/share/c1/c1_LIRAssembler.hpp ---- openjdk/src/hotspot/share/c1/c1_LIRAssembler.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LIRAssembler.hpp 2023-11-01 10:27:44.345760927 +0800 -@@ -186,7 +186,9 @@ - void emit_op1(LIR_Op1* op); - void emit_op2(LIR_Op2* op); - void emit_op3(LIR_Op3* op); -+ void emit_op4(LIR_Op4* op); - void emit_opBranch(LIR_OpBranch* op); -+ void emit_opCmpBranch(LIR_OpCmpBranch* op); - void emit_opLabel(LIR_OpLabel* op); - void emit_arraycopy(LIR_OpArrayCopy* op); - void emit_updatecrc32(LIR_OpUpdateCRC32* op); -@@ -219,6 +221,7 @@ - void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions - void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); - void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type); -+ void cmp_cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr result, BasicType type); - - void call( LIR_OpJavaCall* op, relocInfo::relocType rtype); - void ic_call( LIR_OpJavaCall* op); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIR.cpp jdk17u-ls/src/hotspot/share/c1/c1_LIR.cpp ---- openjdk/src/hotspot/share/c1/c1_LIR.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LIR.cpp 2023-11-01 10:27:44.345760927 +0800 -@@ -236,6 +236,18 @@ + #include "precompiled.hpp" + #include "c1/c1_CodeStubs.hpp" + #include "c1/c1_InstructionPrinter.hpp" +@@ -190,6 +196,8 @@ void LIR_Op2::verify() const { + case lir_cmove: + #ifdef RISCV + assert(false, "lir_cmove is LIR_Op4 on RISCV"); ++#elif defined(LOONGARCH) ++ assert(false, "lir_cmove is LIR_Op4 on LoongArch"); #endif - } + case lir_xchg: + break; +@@ -241,7 +249,7 @@ void LIR_Op2::verify() const { -+void LIR_Op4::verify() const { -+#ifdef ASSERT -+ switch (code()) { -+ case lir_cmp_cmove: -+ break; -+ -+ default: -+ assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), -+ "can't produce oops from arith"); -+ } -+#endif -+} LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block) +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) + #else : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) -@@ -291,6 +303,56 @@ +@@ -254,7 +262,7 @@ LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block) } + LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) : +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) + #else + LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) +@@ -267,7 +275,7 @@ LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) : + } -+LIR_OpCmpBranch::LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeStub* stub, CodeEmitInfo* info) -+ : LIR_Op2(lir_cmp_branch, cond, left, right, info) -+ , _label(stub->entry()) -+ , _block(NULL) -+ , _ublock(NULL) -+ , _stub(stub) { -+} -+ -+LIR_OpCmpBranch::LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, CodeEmitInfo* info) -+ : LIR_Op2(lir_cmp_branch, cond, left, right, info) -+ , _label(block->label()) -+ , _block(block) -+ , _ublock(NULL) -+ , _stub(NULL) { -+} -+ -+LIR_OpCmpBranch::LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* ublock, CodeEmitInfo* info) -+ : LIR_Op2(lir_cmp_float_branch, cond, left, right, info) -+ , _label(block->label()) -+ , _block(block) -+ , _ublock(ublock) -+ , _stub(NULL) { -+} -+ -+void LIR_OpCmpBranch::change_block(BlockBegin* b) { -+ assert(_block != NULL, "must have old block"); -+ assert(_block->label() == label(), "must be equal"); -+ -+ _block = b; -+ _label = b->label(); -+} -+ -+void LIR_OpCmpBranch::change_ublock(BlockBegin* b) { -+ assert(_ublock != NULL, "must have old block"); -+ -+ _ublock = b; -+} -+ -+void LIR_OpCmpBranch::negate_cond() { -+ switch (condition()) { -+ case lir_cond_equal: set_condition(lir_cond_notEqual); break; -+ case lir_cond_notEqual: set_condition(lir_cond_equal); break; -+ case lir_cond_less: set_condition(lir_cond_greaterEqual); break; -+ case lir_cond_lessEqual: set_condition(lir_cond_greater); break; -+ case lir_cond_greaterEqual: set_condition(lir_cond_less); break; -+ case lir_cond_greater: set_condition(lir_cond_lessEqual); break; -+ default: ShouldNotReachHere(); -+ } -+} -+ - LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, - LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, - bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, -@@ -497,10 +559,7 @@ + LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock) +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) + #else + : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) +@@ -512,6 +520,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) { assert(opConvert->_info == NULL, "must be"); if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); if (opConvert->_result->is_valid()) do_output(opConvert->_result); --#ifdef PPC32 -- if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); -- if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); --#endif + if (opConvert->_tmp->is_valid()) do_temp(opConvert->_tmp); - do_stub(opConvert->_stub); + #ifdef PPC32 + if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); + if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); +@@ -528,7 +537,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) { + assert(op->as_OpBranch() != NULL, "must be"); + LIR_OpBranch* opBranch = (LIR_OpBranch*)op; - break; -@@ -597,6 +656,25 @@ - break; - } - -+// LIR_OpCmpBranch; -+ case lir_cmp_branch: // may have info, input and result register always invalid -+ case lir_cmp_float_branch: // may have info, input and result register always invalid -+ { -+ assert(op->as_OpCmpBranch() != NULL, "must be"); -+ LIR_OpCmpBranch* opCmpBranch = (LIR_OpCmpBranch*)op; -+ assert(opCmpBranch->_tmp2->is_illegal() && opCmpBranch->_tmp3->is_illegal() && -+ opCmpBranch->_tmp4->is_illegal() && opCmpBranch->_tmp5->is_illegal(), "not used"); -+ -+ if (opCmpBranch->_info) do_info(opCmpBranch->_info); -+ if (opCmpBranch->_opr1->is_valid()) do_input(opCmpBranch->_opr1); -+ if (opCmpBranch->_opr2->is_valid()) do_input(opCmpBranch->_opr2); -+ if (opCmpBranch->_tmp1->is_valid()) do_temp(opCmpBranch->_tmp1); -+ if (opCmpBranch->_stub != NULL) opCmpBranch->stub()->visit(this); -+ assert(opCmpBranch->_result->is_illegal(), "not used"); -+ -+ break; -+ } -+ - // special handling for cmove: right input operand must not be equal +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() && + opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() && + opBranch->_tmp5->is_illegal(), "not used"); +@@ -625,7 +634,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) { // to the result operand, otherwise the backend fails case lir_cmove: -@@ -697,6 +775,29 @@ - break; - } - -+// LIR_Op4 -+ // special handling for cmp cmove: src2(opr4) operand must not be equal -+ // to the result operand, otherwise the backend fails -+ case lir_cmp_cmove: -+ { -+ assert(op->as_Op4() != NULL, "must be"); -+ LIR_Op4* op4 = (LIR_Op4*)op; -+ -+ assert(op4->_info == NULL, "not used"); -+ assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && -+ op4->_opr3->is_valid() && op4->_opr4->is_valid() && -+ op4->_result->is_valid(), "used"); -+ -+ do_input(op4->_opr1); -+ do_input(op4->_opr2); -+ do_input(op4->_opr3); -+ do_input(op4->_opr4); -+ do_temp(op4->_opr4); -+ do_output(op4->_result); -+ -+ break; -+ } -+ - // LIR_OpJavaCall - case lir_static_call: - case lir_optvirtual_call: -@@ -1022,6 +1123,13 @@ - masm->emit_op2(this); - } + { +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + assert(op->as_Op4() != NULL, "must be"); + LIR_Op4* op4 = (LIR_Op4*)op; -+void LIR_OpCmpBranch::emit_code(LIR_Assembler* masm) { -+ masm->emit_opCmpBranch(this); -+ if (stub()) { -+ masm->append_code_stub(stub()); -+ } -+} -+ - void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { - masm->emit_alloc_array(this); - masm->append_code_stub(stub()); -@@ -1042,6 +1150,10 @@ +@@ -1095,7 +1104,7 @@ void LIR_Op3::emit_code(LIR_Assembler* masm) { masm->emit_op3(this); } -+void LIR_Op4::emit_code(LIR_Assembler* masm) { -+ masm->emit_op4(this); -+} -+ - void LIR_OpLock::emit_code(LIR_Assembler* masm) { - masm->emit_lock(this); - if (stub()) { -@@ -1418,8 +1530,7 @@ - if (deoptimize_on_null) { - // Emit an explicit null check and deoptimize if opr is null - CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); -- cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); -- branch(lir_cond_equal, deopt); -+ cmp_branch(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL), deopt); - } else { - // Emit an implicit null check - append(new LIR_Op1(lir_null_check, opr, info)); -@@ -1667,6 +1778,8 @@ - case lir_cmp_l2i: s = "cmp_l2i"; break; - case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; - case lir_cmp_fd2i: s = "comp_fd2i"; break; -+ case lir_cmp_branch: s = "cmp_branch"; break; -+ case lir_cmp_float_branch: s = "cmp_fbranch"; break; - case lir_cmove: s = "cmove"; break; - case lir_add: s = "add"; break; - case lir_sub: s = "sub"; break; -@@ -1690,6 +1803,8 @@ - case lir_irem: s = "irem"; break; - case lir_fmad: s = "fmad"; break; - case lir_fmaf: s = "fmaf"; break; -+ // LIR_Op4 -+ case lir_cmp_cmove: s = "cmp_cmove"; break; - // LIR_OpJavaCall - case lir_static_call: s = "static"; break; - case lir_optvirtual_call: s = "optvirtual"; break; -@@ -1840,6 +1955,26 @@ - } +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void LIR_Op4::emit_code(LIR_Assembler* masm) { + masm->emit_op4(this); + } +@@ -1141,7 +1150,7 @@ LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) + , _file(NULL) + , _line(0) + #endif +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + , _cmp_opr1(LIR_OprFact::illegalOpr) + , _cmp_opr2(LIR_OprFact::illegalOpr) + #endif +@@ -1162,7 +1171,7 @@ void LIR_List::set_file_and_line(const char * file, int line) { } + #endif -+// LIR_OpCmpBranch -+void LIR_OpCmpBranch::print_instr(outputStream* out) const { -+ print_condition(out, condition()); out->print(" "); -+ in_opr1()->print(out); out->print(" "); -+ in_opr2()->print(out); out->print(" "); -+ if (block() != NULL) { -+ out->print("[B%d] ", block()->block_id()); -+ } else if (stub() != NULL) { -+ out->print("["); -+ stub()->print_name(out); -+ out->print(": " INTPTR_FORMAT "]", p2i(stub())); -+ if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); -+ } else { -+ out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); -+ } -+ if (ublock() != NULL) { -+ out->print("unordered: [B%d] ", ublock()->block_id()); -+ } -+} -+ - void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { - switch(cond) { - case lir_cond_equal: out->print("[EQ]"); break; -@@ -1860,12 +1995,7 @@ +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void LIR_List::set_cmp_oprs(LIR_Op* op) { + switch (op->code()) { + case lir_cmp: +@@ -1185,7 +1194,7 @@ void LIR_List::set_cmp_oprs(LIR_Op* op) { + break; + #if INCLUDE_ZGC + case lir_zloadbarrier_test: +- _cmp_opr1 = FrameMap::as_opr(t1); ++ _cmp_opr1 = FrameMap::as_opr(RISCV_ONLY(t1) LOONGARCH64_ONLY(SCR1)); + _cmp_opr2 = LIR_OprFact::intConst(0); + break; + #endif +@@ -1924,7 +1933,7 @@ void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { + // LIR_OpBranch + void LIR_OpBranch::print_instr(outputStream* out) const { + print_condition(out, cond()); out->print(" "); +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + in_opr1()->print(out); out->print(" "); + in_opr2()->print(out); out->print(" "); + #endif +@@ -1963,6 +1972,9 @@ void LIR_OpConvert::print_instr(outputStream* out) const { print_bytecode(out, bytecode()); in_opr()->print(out); out->print(" "); result_opr()->print(out); out->print(" "); --#ifdef PPC32 -- if(tmp1()->is_valid()) { -- tmp1()->print(out); out->print(" "); -- tmp2()->print(out); out->print(" "); -- } --#endif -+ if(tmp()->is_valid()) tmp()->print(out); out->print(" "); - } - - void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { -@@ -1962,6 +2092,19 @@ - result_opr()->print(out); - } - -+ -+// LIR_Op4 -+void LIR_Op4::print_instr(outputStream* out) const { -+ if (code() == lir_cmp_cmove) { -+ print_condition(out, condition()); out->print(" "); ++ if(tmp()->is_valid()) { ++ tmp()->print(out); out->print(" "); + } -+ in_opr1()->print(out); out->print(" "); -+ in_opr2()->print(out); out->print(" "); -+ in_opr3()->print(out); out->print(" "); -+ in_opr4()->print(out); out->print(" "); -+ result_opr()->print(out); -+} -+ - - void LIR_OpLock::print_instr(outputStream* out) const { - hdr_opr()->print(out); out->print(" "); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRGenerator.cpp jdk17u-ls/src/hotspot/share/c1/c1_LIRGenerator.cpp ---- openjdk/src/hotspot/share/c1/c1_LIRGenerator.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LIRGenerator.cpp 2023-11-01 10:27:44.345760927 +0800 -@@ -475,13 +475,11 @@ - CodeEmitInfo* null_check_info, CodeEmitInfo* range_check_info) { - CodeStub* stub = new RangeCheckStub(range_check_info, index, array); - if (index->is_constant()) { -- cmp_mem_int(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), -- index->as_jint(), null_check_info); -- __ branch(lir_cond_belowEqual, stub); // forward branch -- } else { -- cmp_reg_mem(lir_cond_aboveEqual, index, array, -- arrayOopDesc::length_offset_in_bytes(), T_INT, null_check_info); -- __ branch(lir_cond_aboveEqual, stub); // forward branch -+ cmp_mem_int_branch(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), -+ index->as_jint(), stub, null_check_info); // forward branch -+ } else { -+ cmp_reg_mem_branch(lir_cond_aboveEqual, index, array, arrayOopDesc::length_offset_in_bytes(), -+ T_INT, stub, null_check_info); // forward branch - } - } + #ifdef PPC32 + if(tmp1()->is_valid()) { + tmp1()->print(out); out->print(" "); +@@ -2014,7 +2026,7 @@ void LIR_OpRoundFP::print_instr(outputStream* out) const { -@@ -489,12 +487,11 @@ - void LIRGenerator::nio_range_check(LIR_Opr buffer, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) { - CodeStub* stub = new RangeCheckStub(info, index); - if (index->is_constant()) { -- cmp_mem_int(lir_cond_belowEqual, buffer, java_nio_Buffer::limit_offset(), index->as_jint(), info); -- __ branch(lir_cond_belowEqual, stub); // forward branch -+ cmp_mem_int_branch(lir_cond_belowEqual, buffer, java_nio_Buffer::limit_offset(), -+ index->as_jint(), stub, info); // forward branch - } else { -- cmp_reg_mem(lir_cond_aboveEqual, index, buffer, -- java_nio_Buffer::limit_offset(), T_INT, info); -- __ branch(lir_cond_aboveEqual, stub); // forward branch -+ cmp_reg_mem_branch(lir_cond_aboveEqual, index, buffer, -+ java_nio_Buffer::limit_offset(), T_INT, stub, info); // forward branch - } - __ move(index, result); - } -@@ -920,7 +917,7 @@ - return tmp; - } - --void LIRGenerator::profile_branch(If* if_instr, If::Condition cond) { -+void LIRGenerator::profile_branch(If* if_instr, If::Condition cond, LIR_Opr left, LIR_Opr right) { - if (if_instr->should_profile()) { - ciMethod* method = if_instr->profiled_method(); - assert(method != NULL, "method should be set if branch is profiled"); -@@ -941,10 +938,17 @@ - __ metadata2reg(md->constant_encoding(), md_reg); - - LIR_Opr data_offset_reg = new_pointer_register(); -- __ cmove(lir_cond(cond), -- LIR_OprFact::intptrConst(taken_count_offset), -- LIR_OprFact::intptrConst(not_taken_count_offset), -- data_offset_reg, as_BasicType(if_instr->x()->type())); -+ if (left == LIR_OprFact::illegalOpr && right == LIR_OprFact::illegalOpr) { -+ __ cmove(lir_cond(cond), -+ LIR_OprFact::intptrConst(taken_count_offset), -+ LIR_OprFact::intptrConst(not_taken_count_offset), -+ data_offset_reg, as_BasicType(if_instr->x()->type())); -+ } else { -+ __ cmp_cmove(lir_cond(cond), left, right, -+ LIR_OprFact::intptrConst(taken_count_offset), -+ LIR_OprFact::intptrConst(not_taken_count_offset), -+ data_offset_reg, as_BasicType(if_instr->x()->type())); -+ } - - // MDO cells are intptr_t, so the data_reg width is arch-dependent. - LIR_Opr data_reg = new_pointer_register(); -@@ -1294,8 +1298,8 @@ - } - - __ move(new LIR_Address(rcvr.result(), java_lang_Class::klass_offset(), T_ADDRESS), temp, info); -- __ cmp(lir_cond_notEqual, temp, LIR_OprFact::metadataConst(0)); -- __ cmove(lir_cond_notEqual, LIR_OprFact::intConst(0), LIR_OprFact::intConst(1), result, T_BOOLEAN); -+ __ cmp_cmove(lir_cond_notEqual, temp, LIR_OprFact::metadataConst(0), -+ LIR_OprFact::intConst(0), LIR_OprFact::intConst(1), result, T_BOOLEAN); - } - - // Example: Foo.class.getModifiers() -@@ -1327,8 +1331,8 @@ - - // Check if this is a Java mirror of primitive type, and select the appropriate klass. - LIR_Opr klass = new_register(T_METADATA); -- __ cmp(lir_cond_equal, recv_klass, LIR_OprFact::metadataConst(0)); -- __ cmove(lir_cond_equal, prim_klass, recv_klass, klass, T_ADDRESS); -+ __ cmp_cmove(lir_cond_equal, recv_klass, LIR_OprFact::metadataConst(0), -+ prim_klass, recv_klass, klass, T_ADDRESS); - - // Get the answer. - __ move(new LIR_Address(klass, in_bytes(Klass::modifier_flags_offset()), T_INT), result); -@@ -1360,8 +1364,7 @@ - LabelObj* L_done = new LabelObj(); - LabelObj* L_array = new LabelObj(); - -- __ cmp(lir_cond_lessEqual, layout, 0); -- __ branch(lir_cond_lessEqual, L_array->label()); -+ __ cmp_branch(lir_cond_lessEqual, layout, 0, L_array->label()); - - // Instance case: the layout helper gives us instance size almost directly, - // but we need to mask out the _lh_instance_slow_path_bit. -@@ -1414,8 +1417,7 @@ - LabelObj* L_shift_exit = new LabelObj(); - - __ branch_destination(L_shift_loop->label()); -- __ cmp(lir_cond_equal, layout, 0); -- __ branch(lir_cond_equal, L_shift_exit->label()); -+ __ cmp_branch(lir_cond_equal, layout, 0, L_shift_exit->label()); - - #ifdef _LP64 - __ shift_left(length, 1, length); -@@ -1714,8 +1716,8 @@ - - if (GenerateRangeChecks && needs_range_check) { - if (use_length) { -- __ cmp(lir_cond_belowEqual, length.result(), index.result()); -- __ branch(lir_cond_belowEqual, new RangeCheckStub(range_check_info, index.result(), array.result())); -+ CodeStub* stub = new RangeCheckStub(range_check_info, index.result(), array.result()); -+ __ cmp_branch(lir_cond_belowEqual, length.result(), index.result(), stub); - } else { - array_range_check(array.result(), index.result(), null_check_info, range_check_info); - // range_check also does the null check -@@ -1893,12 +1895,11 @@ - CodeEmitInfo* info = state_for(x); - CodeStub* stub = new RangeCheckStub(info, index.result()); - if (index.result()->is_constant()) { -- cmp_mem_int(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), index.result()->as_jint(), info); -- __ branch(lir_cond_belowEqual, stub); -+ cmp_mem_int_branch(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), -+ index.result()->as_jint(), stub, info); - } else { -- cmp_reg_mem(lir_cond_aboveEqual, index.result(), buf.result(), -- java_nio_Buffer::limit_offset(), T_INT, info); -- __ branch(lir_cond_aboveEqual, stub); -+ cmp_reg_mem_branch(lir_cond_aboveEqual, index.result(), buf.result(), -+ java_nio_Buffer::limit_offset(), T_INT, stub, info); - } - __ move(index.result(), result); - } else { -@@ -1976,8 +1977,8 @@ - } else if (use_length) { - // TODO: use a (modified) version of array_range_check that does not require a - // constant length to be loaded to a register -- __ cmp(lir_cond_belowEqual, length.result(), index.result()); -- __ branch(lir_cond_belowEqual, new RangeCheckStub(range_check_info, index.result(), array.result())); -+ CodeStub* stub = new RangeCheckStub(range_check_info, index.result(), array.result()); -+ __ cmp_branch(lir_cond_belowEqual, length.result(), index.result(), stub); - } else { - array_range_check(array.result(), index.result(), null_check_info, range_check_info); - // The range check performs the null check, so clear it out for the load -@@ -2352,19 +2353,14 @@ - int high_key = one_range->high_key(); - BlockBegin* dest = one_range->sux(); - if (low_key == high_key) { -- __ cmp(lir_cond_equal, value, low_key); -- __ branch(lir_cond_equal, dest); -+ __ cmp_branch(lir_cond_equal, value, low_key, dest); - } else if (high_key - low_key == 1) { -- __ cmp(lir_cond_equal, value, low_key); -- __ branch(lir_cond_equal, dest); -- __ cmp(lir_cond_equal, value, high_key); -- __ branch(lir_cond_equal, dest); -+ __ cmp_branch(lir_cond_equal, value, low_key, dest); -+ __ cmp_branch(lir_cond_equal, value, high_key, dest); - } else { - LabelObj* L = new LabelObj(); -- __ cmp(lir_cond_less, value, low_key); -- __ branch(lir_cond_less, L->label()); -- __ cmp(lir_cond_lessEqual, value, high_key); -- __ branch(lir_cond_lessEqual, dest); -+ __ cmp_branch(lir_cond_less, value, low_key, L->label()); -+ __ cmp_branch(lir_cond_lessEqual, value, high_key, dest); - __ branch_destination(L->label()); - } - } -@@ -2464,12 +2460,11 @@ - __ move(LIR_OprFact::intptrConst(default_count_offset), data_offset_reg); - for (int i = 0; i < len; i++) { - int count_offset = md->byte_offset_of_slot(data, MultiBranchData::case_count_offset(i)); -- __ cmp(lir_cond_equal, value, i + lo_key); - __ move(data_offset_reg, tmp_reg); -- __ cmove(lir_cond_equal, -- LIR_OprFact::intptrConst(count_offset), -- tmp_reg, -- data_offset_reg, T_INT); -+ __ cmp_cmove(lir_cond_equal, value, LIR_OprFact::intConst(i + lo_key), -+ LIR_OprFact::intptrConst(count_offset), -+ tmp_reg, -+ data_offset_reg, T_INT); - } - - LIR_Opr data_reg = new_pointer_register(); -@@ -2483,8 +2478,7 @@ - do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux()); - } else { - for (int i = 0; i < len; i++) { -- __ cmp(lir_cond_equal, value, i + lo_key); -- __ branch(lir_cond_equal, x->sux_at(i)); -+ __ cmp_branch(lir_cond_equal, value, i + lo_key, x->sux_at(i)); - } - __ jump(x->default_sux()); - } -@@ -2522,12 +2516,11 @@ - __ move(LIR_OprFact::intptrConst(default_count_offset), data_offset_reg); - for (int i = 0; i < len; i++) { - int count_offset = md->byte_offset_of_slot(data, MultiBranchData::case_count_offset(i)); -- __ cmp(lir_cond_equal, value, x->key_at(i)); - __ move(data_offset_reg, tmp_reg); -- __ cmove(lir_cond_equal, -- LIR_OprFact::intptrConst(count_offset), -- tmp_reg, -- data_offset_reg, T_INT); -+ __ cmp_cmove(lir_cond_equal, value, LIR_OprFact::intConst(x->key_at(i)), -+ LIR_OprFact::intptrConst(count_offset), -+ tmp_reg, -+ data_offset_reg, T_INT); - } - - LIR_Opr data_reg = new_pointer_register(); -@@ -2542,8 +2535,7 @@ - } else { - int len = x->length(); - for (int i = 0; i < len; i++) { -- __ cmp(lir_cond_equal, value, x->key_at(i)); -- __ branch(lir_cond_equal, x->sux_at(i)); -+ __ cmp_branch(lir_cond_equal, value, x->key_at(i), x->sux_at(i)); - } - __ jump(x->default_sux()); - } -@@ -3038,8 +3030,8 @@ - f_val.dont_load_item(); - LIR_Opr reg = rlock_result(x); - -- __ cmp(lir_cond(x->cond()), left.result(), right.result()); -- __ cmove(lir_cond(x->cond()), t_val.result(), f_val.result(), reg, as_BasicType(x->x()->type())); -+ __ cmp_cmove(lir_cond(x->cond()), left.result(), right.result(), -+ t_val.result(), f_val.result(), reg, as_BasicType(x->x()->type())); - } - - #ifdef JFR_HAVE_INTRINSICS -@@ -3056,8 +3048,7 @@ - __ move(LIR_OprFact::oopConst(NULL), result); - LIR_Opr jobj = new_register(T_METADATA); - __ move_wide(jobj_addr, jobj); -- __ cmp(lir_cond_equal, jobj, LIR_OprFact::metadataConst(0)); -- __ branch(lir_cond_equal, L_end->label()); -+ __ cmp_branch(lir_cond_equal, jobj, LIR_OprFact::metadataConst(0), L_end->label()); - - access_load(IN_NATIVE, T_OBJECT, LIR_OprFact::address(new LIR_Address(jobj, T_OBJECT)), result); - -@@ -3365,21 +3356,24 @@ - - void LIRGenerator::increment_backedge_counter_conditionally(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info, int left_bci, int right_bci, int bci) { - if (compilation()->count_backedges()) { -+ LIR_Opr step = new_register(T_INT); -+ LIR_Opr plus_one = LIR_OprFact::intConst(InvocationCounter::count_increment); -+ LIR_Opr zero = LIR_OprFact::intConst(0); - #if defined(X86) && !defined(_LP64) - // BEWARE! On 32-bit x86 cmp clobbers its left argument so we need a temp copy. - LIR_Opr left_copy = new_register(left->type()); - __ move(left, left_copy); - __ cmp(cond, left_copy, right); --#else -- __ cmp(cond, left, right); --#endif -- LIR_Opr step = new_register(T_INT); -- LIR_Opr plus_one = LIR_OprFact::intConst(InvocationCounter::count_increment); -- LIR_Opr zero = LIR_OprFact::intConst(0); - __ cmove(cond, - (left_bci < bci) ? plus_one : zero, - (right_bci < bci) ? plus_one : zero, - step, left->type()); -+#else -+ __ cmp_cmove(cond, left, right, -+ (left_bci < bci) ? plus_one : zero, -+ (right_bci < bci) ? plus_one : zero, -+ step, left->type()); -+#endif - increment_backedge_counter(info, step, bci); - } - } -@@ -3418,8 +3412,7 @@ - // DeoptimizeStub will reexecute from the current state in code info. - CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_tenured, - Deoptimization::Action_make_not_entrant); -- __ cmp(lir_cond_lessEqual, result, LIR_OprFact::intConst(0)); -- __ branch(lir_cond_lessEqual, deopt); -+ __ cmp_branch(lir_cond_lessEqual, result, LIR_OprFact::intConst(0), deopt); - } - } - -@@ -3465,8 +3458,7 @@ - int freq = frequency << InvocationCounter::count_shift; - if (freq == 0) { - if (!step->is_constant()) { -- __ cmp(lir_cond_notEqual, step, LIR_OprFact::intConst(0)); -- __ branch(lir_cond_notEqual, overflow); -+ __ cmp_branch(lir_cond_notEqual, step, LIR_OprFact::intConst(0), overflow); - } else { - __ branch(lir_cond_always, overflow); - } -@@ -3474,12 +3466,11 @@ - LIR_Opr mask = load_immediate(freq, T_INT); - if (!step->is_constant()) { - // If step is 0, make sure the overflow check below always fails -- __ cmp(lir_cond_notEqual, step, LIR_OprFact::intConst(0)); -- __ cmove(lir_cond_notEqual, result, LIR_OprFact::intConst(InvocationCounter::count_increment), result, T_INT); -+ __ cmp_cmove(lir_cond_notEqual, step, LIR_OprFact::intConst(0), -+ result, LIR_OprFact::intConst(InvocationCounter::count_increment), result, T_INT); - } - __ logical_and(result, mask, result); -- __ cmp(lir_cond_equal, result, LIR_OprFact::intConst(0)); -- __ branch(lir_cond_equal, overflow); -+ __ cmp_branch(lir_cond_equal, result, LIR_OprFact::intConst(0), overflow); - } - __ branch_destination(overflow->continuation()); - } -@@ -3592,8 +3583,7 @@ - CodeEmitInfo *info = state_for(x, x->state()); - CodeStub* stub = new PredicateFailedStub(info); - -- __ cmp(lir_cond(cond), left, right); -- __ branch(lir_cond(cond), stub); -+ __ cmp_branch(lir_cond(cond), left, right, stub); - } - } - -@@ -3747,8 +3737,8 @@ - __ move(new LIR_Address(klass, in_bytes(Klass::layout_helper_offset()), T_INT), layout); - int diffbit = Klass::layout_helper_boolean_diffbit(); - __ logical_and(layout, LIR_OprFact::intConst(diffbit), layout); -- __ cmp(lir_cond_notEqual, layout, LIR_OprFact::intConst(0)); -- __ cmove(lir_cond_notEqual, value_fixed, value, value_fixed, T_BYTE); -+ __ cmp_cmove(lir_cond_notEqual, layout, LIR_OprFact::intConst(0), -+ value_fixed, value, value_fixed, T_BYTE); - value = value_fixed; - return value; + // LIR_Op2 + void LIR_Op2::print_instr(outputStream* out) const { +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) { + #else + if (code() == lir_cmove || code() == lir_cmp) { +@@ -2069,7 +2081,7 @@ void LIR_Op3::print_instr(outputStream* out) const { + result_opr()->print(out); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIRGenerator.hpp jdk17u-ls/src/hotspot/share/c1/c1_LIRGenerator.hpp ---- openjdk/src/hotspot/share/c1/c1_LIRGenerator.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LIRGenerator.hpp 2023-11-01 10:27:44.345760927 +0800 -@@ -365,8 +365,10 @@ - void new_instance (LIR_Opr dst, ciInstanceKlass* klass, bool is_unresolved, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info); - - // machine dependent -- void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); -- void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info); -+ template -+ void cmp_mem_int_branch(LIR_Condition condition, LIR_Opr base, int disp, int c, T tgt, CodeEmitInfo* info); -+ template -+ void cmp_reg_mem_branch(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, T tgt, CodeEmitInfo* info); - - void arraycopy_helper(Intrinsic* x, int* flags, ciArrayKlass** expected_type); -@@ -393,7 +395,7 @@ +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + // LIR_Op4 + void LIR_Op4::print_instr(outputStream* out) const { + print_condition(out, condition()); out->print(" "); +diff --git a/src/hotspot/share/c1/c1_LIR.hpp b/src/hotspot/share/c1/c1_LIR.hpp +index 717404e97..e9a981b20 100644 +--- a/src/hotspot/share/c1/c1_LIR.hpp ++++ b/src/hotspot/share/c1/c1_LIR.hpp +@@ -22,6 +22,12 @@ + * + */ - LIR_Opr safepoint_poll_register(); ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_C1_C1_LIR_HPP + #define SHARE_C1_C1_LIR_HPP -- void profile_branch(If* if_instr, If::Condition cond); -+ void profile_branch(If* if_instr, If::Condition cond, LIR_Opr left = LIR_OprFact::illegalOpr, LIR_Opr right = LIR_OprFact::illegalOpr); - void increment_event_counter_impl(CodeEmitInfo* info, - ciMethod *method, LIR_Opr step, int frequency, - int bci, bool backedge, bool notify); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LIR.hpp jdk17u-ls/src/hotspot/share/c1/c1_LIR.hpp ---- openjdk/src/hotspot/share/c1/c1_LIR.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/c1/c1_LIR.hpp 2023-11-01 10:27:44.345760927 +0800 -@@ -866,9 +866,11 @@ - class LIR_OpReturn; - class LIR_OpRoundFP; - class LIR_Op2; -+class LIR_OpCmpBranch; +@@ -869,7 +875,7 @@ class LIR_Op2; class LIR_OpDelay; class LIR_Op3; class LIR_OpAllocArray; -+class LIR_Op4; +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + class LIR_Op4; + #endif class LIR_OpCall; - class LIR_OpJavaCall; - class LIR_OpRTCall; -@@ -928,6 +930,8 @@ +@@ -917,7 +923,7 @@ enum LIR_Code { + , lir_null_check + , lir_return + , lir_leal +-#ifndef RISCV ++#if !defined(RISCV) && !defined(LOONGARCH) + , lir_branch + , lir_cond_float_branch + #endif +@@ -931,7 +937,7 @@ enum LIR_Code { + , lir_load_klass + , end_op1 + , begin_op2 +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + , lir_branch + , lir_cond_float_branch + #endif +@@ -939,7 +945,7 @@ enum LIR_Code { , lir_cmp_l2i , lir_ucmp_fd2i , lir_cmp_fd2i -+ , lir_cmp_branch -+ , lir_cmp_float_branch +-#ifndef RISCV ++#if !defined(RISCV) && !defined(LOONGARCH) , lir_cmove + #endif , lir_add - , lir_sub -@@ -956,6 +960,9 @@ +@@ -969,7 +975,7 @@ enum LIR_Code { , lir_fmad , lir_fmaf , end_op3 -+ , begin_op4 -+ , lir_cmp_cmove -+ , end_op4 - , begin_opJavaCall - , lir_static_call - , lir_optvirtual_call -@@ -1121,6 +1128,7 @@ - virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } - virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } - virtual LIR_OpBranch* as_OpBranch() { return NULL; } -+ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return NULL; } - virtual LIR_OpReturn* as_OpReturn() { return NULL; } - virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } - virtual LIR_OpConvert* as_OpConvert() { return NULL; } -@@ -1128,6 +1136,7 @@ +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + , begin_op4 + , lir_cmove + , end_op4 +@@ -1010,7 +1016,7 @@ enum LIR_Code { + , begin_opAssert + , lir_assert + , end_opAssert +-#if defined(RISCV) && defined(INCLUDE_ZGC) ++#if (defined(RISCV) || defined(LOONGARCH)) && defined(INCLUDE_ZGC) + , begin_opZLoadBarrierTest + , lir_zloadbarrier_test + , end_opZLoadBarrierTest +@@ -1151,7 +1157,7 @@ class LIR_Op: public CompilationResourceObj { virtual LIR_Op1* as_Op1() { return NULL; } virtual LIR_Op2* as_Op2() { return NULL; } virtual LIR_Op3* as_Op3() { return NULL; } -+ virtual LIR_Op4* as_Op4() { return NULL; } +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + virtual LIR_Op4* as_Op4() { return NULL; } + #endif virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } - virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } - virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } -@@ -1461,15 +1470,18 @@ +@@ -1447,15 +1453,18 @@ class LIR_OpConvert: public LIR_Op1 { private: Bytecodes::Code _bytecode; ConversionStub* _stub; @@ -115453,142 +114633,123 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI virtual void emit_code(LIR_Assembler* masm); virtual LIR_OpConvert* as_OpConvert() { return this; } -@@ -1624,7 +1636,7 @@ +@@ -1610,7 +1619,7 @@ class LIR_Op2: public LIR_Op { , _tmp4(LIR_OprFact::illegalOpr) , _tmp5(LIR_OprFact::illegalOpr) , _condition(condition) { -- assert(code == lir_cmp || code == lir_assert, "code check"); -+ assert(code == lir_cmp || code == lir_cmp_branch || code == lir_cmp_float_branch || code == lir_assert, "code check"); +- assert(code == lir_cmp || code == lir_assert RISCV_ONLY(|| code == lir_branch || code == lir_cond_float_branch), "code check"); ++ assert(code == lir_cmp || code == lir_assert RISCV_ONLY(|| code == lir_branch || code == lir_cond_float_branch)LOONGARCH64_ONLY(|| code == lir_branch || code == lir_cond_float_branch), "code check"); } LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) -@@ -1656,7 +1668,7 @@ +@@ -1642,7 +1651,7 @@ class LIR_Op2: public LIR_Op { , _tmp4(LIR_OprFact::illegalOpr) , _tmp5(LIR_OprFact::illegalOpr) , _condition(lir_cond_unknown) { -- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); -+ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); +- assert(code != lir_cmp && RISCV_ONLY(code != lir_branch && code != lir_cond_float_branch &&) is_in_range(code, begin_op2, end_op2), "code check"); ++ assert(code != lir_cmp && RISCV_ONLY(code != lir_branch && code != lir_cond_float_branch &&)LOONGARCH64_ONLY(code != lir_branch && code != lir_cond_float_branch &&) is_in_range(code, begin_op2, end_op2), "code check"); } LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, -@@ -1672,7 +1684,7 @@ +@@ -1658,7 +1667,7 @@ class LIR_Op2: public LIR_Op { , _tmp4(tmp4) , _tmp5(tmp5) , _condition(lir_cond_unknown) { -- assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); -+ assert((code != lir_cmp && code != lir_cmp_branch && code != lir_cmp_float_branch) && is_in_range(code, begin_op2, end_op2), "code check"); +- assert(code != lir_cmp && RISCV_ONLY(code != lir_branch && code != lir_cond_float_branch &&) is_in_range(code, begin_op2, end_op2), "code check"); ++ assert(code != lir_cmp && RISCV_ONLY(code != lir_branch && code != lir_cond_float_branch &&)LOONGARCH64_ONLY(code != lir_branch && code != lir_cond_float_branch &&) is_in_range(code, begin_op2, end_op2), "code check"); } LIR_Opr in_opr1() const { return _opr1; } -@@ -1684,10 +1696,12 @@ +@@ -1670,14 +1679,14 @@ class LIR_Op2: public LIR_Op { LIR_Opr tmp4_opr() const { return _tmp4; } LIR_Opr tmp5_opr() const { return _tmp5; } LIR_Condition condition() const { -- assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; -+ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); -+ return _condition; +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch || code() == lir_assert, "only valid for branch and assert"); return _condition; + #else + assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; + #endif } void set_condition(LIR_Condition condition) { -- assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; -+ assert(code() == lir_cmp || code() == lir_cmp_branch || code() == lir_cmp_float_branch || code() == lir_cmove, "only valid for cmp and cmove"); -+ _condition = condition; - } - - void set_fpu_stack_size(int size) { _fpu_stack_size = size; } -@@ -1701,6 +1715,43 @@ +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + assert(code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch, "only valid for branch"); _condition = condition; + #else + assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; +@@ -1695,7 +1704,7 @@ class LIR_Op2: public LIR_Op { virtual void print_instr(outputStream* out) const PRODUCT_RETURN; }; -+class LIR_OpCmpBranch: public LIR_Op2 { -+ friend class LIR_OpVisitState; -+ -+ private: -+ Label* _label; -+ BlockBegin* _block; // if this is a branch to a block, this is the block -+ BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block -+ CodeStub* _stub; // if this is a branch to a stub, this is the stub -+ -+ public: -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl, CodeEmitInfo* info = NULL) -+ : LIR_Op2(lir_cmp_branch, cond, left, right, info) -+ , _label(lbl) -+ , _block(NULL) -+ , _ublock(NULL) -+ , _stub(NULL) { } -+ -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, CodeStub* stub, CodeEmitInfo* info = NULL); -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, CodeEmitInfo* info = NULL); -+ -+ // for unordered comparisons -+ LIR_OpCmpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* ublock, CodeEmitInfo* info = NULL); -+ -+ Label* label() const { return _label; } -+ BlockBegin* block() const { return _block; } -+ BlockBegin* ublock() const { return _ublock; } -+ CodeStub* stub() const { return _stub; } -+ -+ void change_block(BlockBegin* b); -+ void change_ublock(BlockBegin* b); -+ void negate_cond(); -+ -+ virtual void emit_code(LIR_Assembler* masm); -+ virtual LIR_OpCmpBranch* as_OpCmpBranch() { return this; } -+ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; -+}; -+ - class LIR_OpAllocArray : public LIR_Op { +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + class LIR_OpBranch: public LIR_Op2 { + #else + class LIR_OpBranch: public LIR_Op { +@@ -1703,7 +1712,7 @@ class LIR_OpBranch: public LIR_Op { friend class LIR_OpVisitState; -@@ -1765,6 +1816,48 @@ + private: +-#ifndef RISCV ++#if !defined(RISCV) && !defined(LOONGARCH) + LIR_Condition _cond; + #endif + Label* _label; +@@ -1713,7 +1722,7 @@ class LIR_OpBranch: public LIR_Op { + + public: + LIR_OpBranch(LIR_Condition cond, Label* lbl) +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) + #else + : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) +@@ -1730,7 +1739,7 @@ class LIR_OpBranch: public LIR_Op { + // for unordered comparisons + LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock); + +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + LIR_Condition cond() const { return condition(); } + void set_cond(LIR_Condition cond) { set_condition(cond); } + #else +@@ -1814,7 +1823,7 @@ class LIR_Op3: public LIR_Op { + virtual void print_instr(outputStream* out) const PRODUCT_RETURN; }; +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + class LIR_Op4: public LIR_Op { + friend class LIR_OpVisitState; + protected: +@@ -2112,7 +2121,7 @@ class LIR_List: public CompilationResourceObj { + const char * _file; + int _line; + #endif +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + LIR_Opr _cmp_opr1; + LIR_Opr _cmp_opr2; + #endif +@@ -2128,7 +2137,7 @@ class LIR_List: public CompilationResourceObj { + } + #endif // PRODUCT -+class LIR_Op4: public LIR_Op { -+ friend class LIR_OpVisitState; -+ -+ private: -+ LIR_Opr _opr1; -+ LIR_Opr _opr2; -+ LIR_Opr _opr3; -+ LIR_Opr _opr4; -+ BasicType _type; -+ LIR_Condition _condition; -+ -+ void verify() const; -+ -+ public: -+ LIR_Op4(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr opr4, LIR_Opr result, BasicType type) -+ : LIR_Op(code, result, NULL) -+ , _opr1(opr1) -+ , _opr2(opr2) -+ , _opr3(opr3) -+ , _opr4(opr4) -+ , _type(type) -+ , _condition(condition) { -+ assert(is_in_range(code, begin_op4, end_op4), "code check"); -+ assert(type != T_ILLEGAL, "cmove should have type"); -+ } -+ LIR_Opr in_opr1() const { return _opr1; } -+ LIR_Opr in_opr2() const { return _opr2; } -+ LIR_Opr in_opr3() const { return _opr3; } -+ LIR_Opr in_opr4() const { return _opr4; } -+ BasicType type() const { return _type; } -+ LIR_Condition condition() const { -+ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); return _condition; -+ } -+ void set_condition(LIR_Condition condition) { -+ assert(code() == lir_cmp_cmove, "only valid for cmp cmove"); _condition = condition; -+ } -+ -+ virtual void emit_code(LIR_Assembler* masm); -+ virtual LIR_Op4* as_Op4() { return this; } -+ virtual void print_instr(outputStream* out) const PRODUCT_RETURN; -+}; -+ - //-------------------------------- - class LabelObj: public CompilationResourceObj { - private: -@@ -2106,7 +2199,9 @@ +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + set_cmp_oprs(op); + // lir_cmp set cmp oprs only on riscv + if (op->code() == lir_cmp) return; +@@ -2150,7 +2159,7 @@ class LIR_List: public CompilationResourceObj { + void set_file_and_line(const char * file, int line); + #endif + +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void set_cmp_oprs(LIR_Op* op); + #endif + +@@ -2246,7 +2255,9 @@ class LIR_List: public CompilationResourceObj { void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } void return_op(LIR_Opr result) { append(new LIR_OpReturn(result)); } @@ -115599,35 +114760,142 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/c1/c1_LI void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } -@@ -2130,6 +2225,15 @@ - cmp(condition, left, LIR_OprFact::intConst(right), info); +@@ -2273,7 +2284,7 @@ class LIR_List: public CompilationResourceObj { + void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); + void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); + +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type, + LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr) { + append(new LIR_Op4(lir_cmove, condition, src1, src2, cmp_opr1, cmp_opr2, dst, type)); +diff --git a/src/hotspot/share/c1/c1_LIRAssembler.cpp b/src/hotspot/share/c1/c1_LIRAssembler.cpp +index 989a6f8ad..e288de2ab 100644 +--- a/src/hotspot/share/c1/c1_LIRAssembler.cpp ++++ b/src/hotspot/share/c1/c1_LIRAssembler.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "asm/assembler.inline.hpp" + #include "c1/c1_Compilation.hpp" +@@ -691,7 +697,7 @@ void LIR_Assembler::emit_op2(LIR_Op2* op) { + comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op); + break; + +-#ifndef RISCV ++#if !defined(RISCV) && !defined(LOONGARCH) + case lir_cmove: + cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type()); + break; +@@ -758,7 +764,7 @@ void LIR_Assembler::emit_op2(LIR_Op2* op) { } + } -+ // machine dependent -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, T tgt, CodeEmitInfo* info = NULL); -+ template -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, int right, T tgt, CodeEmitInfo* info = NULL) { -+ cmp_branch(condition, left, LIR_OprFact::intConst(right), tgt, info); -+ } -+ void cmp_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right, BlockBegin* block, BlockBegin* unordered); +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void LIR_Assembler::emit_op4(LIR_Op4* op) { + switch(op->code()) { + case lir_cmove: +diff --git a/src/hotspot/share/c1/c1_LIRAssembler.hpp b/src/hotspot/share/c1/c1_LIRAssembler.hpp +index c82baa15f..84c34db49 100644 +--- a/src/hotspot/share/c1/c1_LIRAssembler.hpp ++++ b/src/hotspot/share/c1/c1_LIRAssembler.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ + - void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); - void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); + #ifndef SHARE_C1_C1_LIRASSEMBLER_HPP + #define SHARE_C1_C1_LIRASSEMBLER_HPP -@@ -2137,6 +2241,9 @@ - append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); +@@ -186,7 +192,7 @@ class LIR_Assembler: public CompilationResourceObj { + void emit_op1(LIR_Op1* op); + void emit_op2(LIR_Op2* op); + void emit_op3(LIR_Op3* op); +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void emit_op4(LIR_Op4* op); + #endif + void emit_opBranch(LIR_OpBranch* op); +@@ -222,7 +228,7 @@ class LIR_Assembler: public CompilationResourceObj { + void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); + void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions + void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type, + LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr); + #else +diff --git a/src/hotspot/share/c1/c1_LinearScan.cpp b/src/hotspot/share/c1/c1_LinearScan.cpp +index d3d38d11a..6947406b2 100644 +--- a/src/hotspot/share/c1/c1_LinearScan.cpp ++++ b/src/hotspot/share/c1/c1_LinearScan.cpp +@@ -35,6 +35,12 @@ + #include "runtime/timerTrace.hpp" + #include "utilities/bitMap.inline.hpp" + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef PRODUCT + + static LinearScanStatistic _stat_before_alloc; +@@ -1240,7 +1246,7 @@ void LinearScan::add_register_hints(LIR_Op* op) { + break; + } + case lir_cmove: { +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + assert(op->as_Op4() != NULL, "lir_cmove must be LIR_Op4"); + LIR_Op4* cmove = (LIR_Op4*)op; + #else +@@ -3151,7 +3157,7 @@ void LinearScan::do_linear_scan() { + } } -+ // machine dependent -+ void cmp_cmove(LIR_Condition condition, LIR_Opr left, LIR_Opr right, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type); -+ - void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, - LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); - void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nmethod.cpp jdk17u-ls/src/hotspot/share/code/nmethod.cpp ---- openjdk/src/hotspot/share/code/nmethod.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/code/nmethod.cpp 2023-11-01 10:27:44.365760951 +0800 +-#ifndef RISCV ++#if !defined(RISCV) && !defined(LOONGARCH) + // Disable these optimizations on riscv temporarily, because it does not + // work when the comparison operands are bound to branches or cmoves. + { TIME_LINEAR_SCAN(timer_optimize_lir); +@@ -6385,7 +6391,7 @@ void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { + // There might be a cmove inserted for profiling which depends on the same + // compare. If we change the condition of the respective compare, we have + // to take care of this cmove as well. +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + LIR_Op4* prev_cmove = NULL; + #else + LIR_Op2* prev_cmove = NULL; +@@ -6395,7 +6401,7 @@ void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { + prev_op = instructions->at(j); + // check for the cmove + if (prev_op->code() == lir_cmove) { +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + assert(prev_op->as_Op4() != NULL, "cmove must be of type LIR_Op4"); + prev_cmove = (LIR_Op4*)prev_op; + #else +diff --git a/src/hotspot/share/code/nmethod.cpp b/src/hotspot/share/code/nmethod.cpp +index f5861d1f3..e1b78dcf3 100644 +--- a/src/hotspot/share/code/nmethod.cpp ++++ b/src/hotspot/share/code/nmethod.cpp @@ -22,6 +22,12 @@ * */ @@ -115641,7 +114909,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nme #include "precompiled.hpp" #include "jvm.h" #include "asm/assembler.inline.hpp" -@@ -2480,7 +2486,8 @@ +@@ -2541,7 +2547,8 @@ void nmethod::verify_scopes() { //verify_interrupt_point(iter.addr()); break; case relocInfo::runtime_call_type: @@ -115651,7 +114919,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nme address destination = iter.reloc()->value(); // Right now there is no way to find out which entries support // an interrupt point. It would be nice if we had this -@@ -3042,7 +3049,8 @@ +@@ -3106,7 +3113,8 @@ const char* nmethod::reloc_string_for(u_char* begin, u_char* end) { return st.as_string(); } case relocInfo::runtime_call_type: @@ -115661,10 +114929,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/nme stringStream st; st.print("runtime_call"); CallRelocation* r = (CallRelocation*)iter.reloc(); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/relocInfo.cpp jdk17u-ls/src/hotspot/share/code/relocInfo.cpp ---- openjdk/src/hotspot/share/code/relocInfo.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/code/relocInfo.cpp 2023-09-08 09:39:50.545842275 +0800 -@@ -402,6 +402,7 @@ +diff --git a/src/hotspot/share/code/relocInfo.cpp b/src/hotspot/share/code/relocInfo.cpp +index 47769c53a..ed69d18d7 100644 +--- a/src/hotspot/share/code/relocInfo.cpp ++++ b/src/hotspot/share/code/relocInfo.cpp +@@ -402,6 +402,7 @@ void virtual_call_Relocation::unpack_data() { _cached_value = x0==0? NULL: address_from_scaled_offset(x0, point); } @@ -115672,7 +114941,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { short* p = pack_1_int_to((short *)dest->locs_end(), (jint)(_offset >> 2)); dest->set_locs_end((relocInfo*) p); -@@ -410,6 +411,7 @@ +@@ -410,6 +411,7 @@ void runtime_call_w_cp_Relocation::pack_data_to(CodeSection * dest) { void runtime_call_w_cp_Relocation::unpack_data() { _offset = unpack_1_int() << 2; } @@ -115680,7 +114949,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel void static_stub_Relocation::pack_data_to(CodeSection* dest) { short* p = (short*) dest->locs_end(); -@@ -874,7 +876,7 @@ +@@ -874,7 +876,7 @@ void RelocIterator::print_current() { break; } case relocInfo::runtime_call_type: @@ -115689,10 +114958,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel { CallRelocation* r = (CallRelocation*) reloc(); tty->print(" | [destination=" INTPTR_FORMAT "]", p2i(r->destination())); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/relocInfo.hpp jdk17u-ls/src/hotspot/share/code/relocInfo.hpp ---- openjdk/src/hotspot/share/code/relocInfo.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/code/relocInfo.hpp 2023-09-08 09:39:50.545842275 +0800 -@@ -266,7 +266,11 @@ +diff --git a/src/hotspot/share/code/relocInfo.hpp b/src/hotspot/share/code/relocInfo.hpp +index 55d4ac7c6..b1c347330 100644 +--- a/src/hotspot/share/code/relocInfo.hpp ++++ b/src/hotspot/share/code/relocInfo.hpp +@@ -266,7 +266,11 @@ class relocInfo { poll_return_type = 11, // polling instruction for safepoints at return metadata_type = 12, // metadata that used to be oops trampoline_stub_type = 13, // stub-entry for trampoline @@ -115704,7 +114974,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel data_prefix_tag = 15, // tag for a prefix (carries data arguments) type_mask = 15 // A mask which selects only the above values }; -@@ -300,13 +304,13 @@ +@@ -300,13 +304,13 @@ class relocInfo { visitor(static_call) \ visitor(static_stub) \ visitor(runtime_call) \ @@ -115720,7 +114990,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel public: -@@ -1146,6 +1150,16 @@ +@@ -1146,6 +1150,16 @@ class runtime_call_Relocation : public CallRelocation { }; @@ -115737,7 +115007,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel class runtime_call_w_cp_Relocation : public CallRelocation { public: static RelocationHolder spec() { -@@ -1175,6 +1189,7 @@ +@@ -1175,6 +1189,7 @@ class runtime_call_w_cp_Relocation : public CallRelocation { void pack_data_to(CodeSection * dest); void unpack_data(); }; @@ -115745,9 +115015,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/rel // Trampoline Relocations. // A trampoline allows to encode a small branch in the code, even if there -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vtableStubs.cpp jdk17u-ls/src/hotspot/share/code/vtableStubs.cpp ---- openjdk/src/hotspot/share/code/vtableStubs.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/code/vtableStubs.cpp 2023-09-08 09:39:50.549842280 +0800 +diff --git a/src/hotspot/share/code/vtableStubs.cpp b/src/hotspot/share/code/vtableStubs.cpp +index 7ea2d19fc..7306230e8 100644 +--- a/src/hotspot/share/code/vtableStubs.cpp ++++ b/src/hotspot/share/code/vtableStubs.cpp @@ -22,6 +22,12 @@ * */ @@ -115761,7 +115032,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vta #include "precompiled.hpp" #include "code/vtableStubs.hpp" #include "compiler/compileBroker.hpp" -@@ -102,7 +108,11 @@ +@@ -102,7 +108,11 @@ int VtableStubs::_itab_stub_size = 0; #if defined(PRODUCT) // These values are good for the PRODUCT case (no tracing). @@ -115773,7 +115044,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vta static const int first_itableStub_size = 256; #else // These values are good for the non-PRODUCT case (when tracing can be switched on). -@@ -113,6 +123,7 @@ +@@ -113,6 +123,7 @@ int VtableStubs::_itab_stub_size = 0; // vtable itable // aarch64: 460 324 // arm: ? ? @@ -115781,41 +115052,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/code/vta // ppc (linux, BE): 404 288 // ppc (linux, LE): 356 276 // ppc (AIX): 416 296 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp jdk17u-ls/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/g1/c1/g1BarrierSetC1.cpp 2023-11-01 10:27:44.369760956 +0800 -@@ -74,7 +74,6 @@ - // Read the marking-in-progress flag. - LIR_Opr flag_val = gen->new_register(T_INT); - __ load(mark_active_flag_addr, flag_val); -- __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); - - LIR_PatchCode pre_val_patch_code = lir_patch_none; - -@@ -103,7 +102,7 @@ - slow = new G1PreBarrierStub(pre_val); - } - -- __ branch(lir_cond_notEqual, slow); -+ __ cmp_branch(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0), slow); - __ branch_destination(slow->continuation()); - } - -@@ -168,10 +167,8 @@ - } - assert(new_val->is_register(), "must be a register at this point"); - -- __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD)); -- - CodeStub* slow = new G1PostBarrierStub(addr, new_val); -- __ branch(lir_cond_notEqual, slow); -+ __ cmp_branch(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD), slow); - __ branch_destination(slow->continuation()); - } - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp jdk17u-ls/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp ---- openjdk/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp 2023-11-01 10:27:44.377760965 +0800 +diff --git a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp +index f09441088..a8c1f97a8 100644 +--- a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp ++++ b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp @@ -22,6 +22,12 @@ * */ @@ -115829,7 +115069,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/g1 #ifndef SHARE_GC_G1_G1PARSCANTHREADSTATE_INLINE_HPP #define SHARE_GC_G1_G1PARSCANTHREADSTATE_INLINE_HPP -@@ -58,6 +64,9 @@ +@@ -58,6 +64,9 @@ void G1ParScanThreadState::trim_queue_partially() { void G1ParScanThreadState::trim_queue() { trim_queue_to_threshold(0); assert(_task_queue->overflow_empty(), "invariant"); @@ -115839,94 +115079,50 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/g1/g1 assert(_task_queue->taskqueue_empty(), "invariant"); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp jdk17u-ls/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/shared/c1/barrierSetC1.cpp 2023-11-01 10:27:44.385760975 +0800 -@@ -193,8 +193,7 @@ - /* Normalize boolean value returned by unsafe operation, i.e., value != 0 ? value = true : value false. */ - if (mask_boolean) { - LabelObj* equalZeroLabel = new LabelObj(); -- __ cmp(lir_cond_equal, result, 0); -- __ branch(lir_cond_equal, equalZeroLabel->label()); -+ __ cmp_branch(lir_cond_equal, result, 0, equalZeroLabel->label()); - __ move(LIR_OprFact::intConst(1), result); - __ branch_destination(equalZeroLabel->label()); - } -@@ -321,14 +320,12 @@ - referent_off = gen->new_register(T_LONG); - __ move(LIR_OprFact::longConst(java_lang_ref_Reference::referent_offset()), referent_off); - } -- __ cmp(lir_cond_notEqual, offset, referent_off); -- __ branch(lir_cond_notEqual, cont->label()); -+ __ cmp_branch(lir_cond_notEqual, offset, referent_off, cont->label()); - } - if (gen_source_check) { - // offset is a const and equals referent offset - // if (source == null) -> continue -- __ cmp(lir_cond_equal, base_reg, LIR_OprFact::oopConst(NULL)); -- __ branch(lir_cond_equal, cont->label()); -+ __ cmp_branch(lir_cond_equal, base_reg, LIR_OprFact::oopConst(NULL), cont->label()); - } - LIR_Opr src_klass = gen->new_register(T_METADATA); - if (gen_type_check) { -@@ -338,8 +335,7 @@ - LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(InstanceKlass::reference_type_offset()), T_BYTE); - LIR_Opr reference_type = gen->new_register(T_INT); - __ move(reference_type_addr, reference_type); -- __ cmp(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE)); -- __ branch(lir_cond_equal, cont->label()); -+ __ cmp_branch(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE), cont->label()); - } - } - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp jdk17u-ls/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/shared/c1/cardTableBarrierSetC1.cpp 2023-11-01 10:27:44.385760975 +0800 -@@ -86,8 +86,7 @@ - __ move(card_addr, cur_value); - - LabelObj* L_already_dirty = new LabelObj(); -- __ cmp(lir_cond_equal, cur_value, dirty); -- __ branch(lir_cond_equal, L_already_dirty->label()); -+ __ cmp_branch(lir_cond_equal, cur_value, dirty, L_already_dirty->label()); - __ move(dirty, card_addr); - __ branch_destination(L_already_dirty->label()); - } else { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp jdk17u-ls/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/shenandoah/c1/shenandoahBarrierSetC1.cpp 2023-11-01 10:27:44.389760979 +0800 -@@ -78,7 +78,6 @@ - // Read the marking-in-progress flag. - LIR_Opr flag_val = gen->new_register(T_INT); - __ load(mark_active_flag_addr, flag_val); -- __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); - - LIR_PatchCode pre_val_patch_code = lir_patch_none; +diff --git a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp +index 56fdd2abe..17b9bcafd 100644 +--- a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp ++++ b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp +@@ -22,6 +22,12 @@ + * + */ -@@ -106,7 +105,7 @@ - slow = new ShenandoahPreBarrierStub(pre_val); - } ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "gc/shared/tlab_globals.hpp" + #include "gc/shared/c2/barrierSetC2.hpp" +@@ -266,6 +272,8 @@ public: -- __ branch(lir_cond_notEqual, slow); -+ __ cmp_branch(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0), slow); - __ branch_destination(slow->continuation()); - } + bool is_volatile = (decorators & MO_SEQ_CST) != 0; + bool is_acquire = (decorators & MO_ACQUIRE) != 0; ++ bool is_relaxed = (decorators & MO_RELAXED) != 0; ++ bool is_unsafe = (decorators & C2_UNSAFE_ACCESS) != 0; -@@ -153,10 +152,9 @@ - __ logical_and(flag_val, mask_reg, masked_flag); - flag_val = masked_flag; + // If reference is volatile, prevent following volatiles ops from + // floating up before the volatile access. +@@ -299,6 +307,13 @@ public: + assert(_leading_membar == NULL || support_IRIW_for_not_multiple_copy_atomic_cpu, "no leading membar expected"); + Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n); + mb->as_MemBar()->set_trailing_load(); ++ } else if (is_relaxed && is_unsafe) { ++#ifdef LOONGARCH64 ++ assert(kit != nullptr, "unsupported at optimization time"); ++ Node* n = _access.raw_access(); ++ Node* mb = kit->insert_mem_bar(Op_SameAddrLoadFence, n); ++ mb->as_MemBar()->set_trailing_load(); ++#endif + } + } } -- __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); - - CodeStub* slow = new ShenandoahLoadReferenceBarrierStub(obj, addr, result, tmp1, tmp2, decorators); -- __ branch(lir_cond_notEqual, slow); -+ __ cmp_branch(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0), slow); - __ branch_destination(slow->continuation()); - - return result; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp jdk17u-ls/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp ---- openjdk/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp 2023-11-01 10:27:44.393760984 +0800 +diff --git a/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp b/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp +index 7d31ff02e..07dac06ae 100644 +--- a/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp ++++ b/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp @@ -22,6 +22,12 @@ * */ @@ -115944,63 +115140,41 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/shena #include "utilities/defaultStream.hpp" void ShenandoahArguments::initialize() { --#if !(defined AARCH64 || defined AMD64 || defined IA32 || defined PPC64) -+#if !(defined AARCH64 || defined AMD64 || defined IA32 || defined PPC64 || defined LOONGARCH64) +-#if !(defined AARCH64 || defined AMD64 || defined IA32 || defined PPC64 || defined RISCV64) ++#if !(defined AARCH64 || defined AMD64 || defined IA32 || defined PPC64 || defined RISCV64 || defined LOONGARCH64) vm_exit_during_initialization("Shenandoah GC is not supported on this platform."); #endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp jdk17u-ls/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp ---- openjdk/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp 2023-11-01 10:27:44.397760989 +0800 -@@ -99,15 +99,20 @@ - - virtual void visit(LIR_OpVisitState* state) { - state->do_input(_opr); -+ if (_result->is_valid()) { -+ state->do_temp(_opr); -+ state->do_output(_result); -+ } - } - - virtual void emit_code(LIR_Assembler* ce) { -- ZBarrierSet::assembler()->generate_c1_load_barrier_test(ce, _opr); -+ ZBarrierSet::assembler()->generate_c1_load_barrier_test(ce, _opr, result_opr()); - } - - virtual void print_instr(outputStream* out) const { - _opr->print(out); - out->print(" "); -+ result_opr()->print(out); - } - - #ifndef PRODUCT -@@ -143,13 +148,21 @@ - #endif +diff --git a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp +index 0e99bf107..d5541cf89 100644 +--- a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp ++++ b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp +@@ -21,6 +21,12 @@ + * questions. + */ - void ZBarrierSetC1::load_barrier(LIRAccess& access, LIR_Opr result) const { -+ LIR_Op* op = new LIR_OpZLoadBarrierTest(result); ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ + - // Fast path -- __ append(new LIR_OpZLoadBarrierTest(result)); -+ __ append(op); - - // Slow path - const address runtime_stub = load_barrier_on_oop_field_preloaded_runtime_stub(access.decorators()); - CodeStub* const stub = new ZLoadBarrierStubC1(access, result, runtime_stub); -- __ branch(lir_cond_notEqual, stub); -+ if (ZPlatformLoadBarrierTestResultInRegister) { -+ LIR_Opr res = access.gen()->new_register(result->type()); -+ op->set_result_opr(res); -+ __ cmp_branch(lir_cond_notEqual, res, LIR_OprFact::intptrConst(NULL_WORD), stub); -+ } else { -+ __ branch(lir_cond_notEqual, stub); -+ } - __ branch_destination(stub->continuation()); - } + #include "precompiled.hpp" + #include "c1/c1_LIR.hpp" + #include "c1/c1_LIRGenerator.hpp" +@@ -94,7 +100,7 @@ private: -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpreter/interpreterRuntime.cpp jdk17u-ls/src/hotspot/share/interpreter/interpreterRuntime.cpp ---- openjdk/src/hotspot/share/interpreter/interpreterRuntime.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/interpreter/interpreterRuntime.cpp 2023-09-08 09:39:50.649842412 +0800 + public: + LIR_OpZLoadBarrierTest(LIR_Opr opr) : +-#ifdef RISCV ++#if defined(RISCV) || defined(LOONGARCH) + LIR_Op(lir_zloadbarrier_test, LIR_OprFact::illegalOpr, NULL), + #else + LIR_Op(), +diff --git a/src/hotspot/share/interpreter/interpreterRuntime.cpp b/src/hotspot/share/interpreter/interpreterRuntime.cpp +index d66ed24d8..b682bb9d6 100644 +--- a/src/hotspot/share/interpreter/interpreterRuntime.cpp ++++ b/src/hotspot/share/interpreter/interpreterRuntime.cpp @@ -22,6 +22,12 @@ * */ @@ -116014,7 +115188,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #include "precompiled.hpp" #include "jvm_io.h" #include "classfile/javaClasses.inline.hpp" -@@ -1459,7 +1465,7 @@ +@@ -1459,7 +1465,7 @@ JRT_ENTRY(void, InterpreterRuntime::prepare_native_call(JavaThread* current, Met // preparing the same method will be sure to see non-null entry & mirror. JRT_END @@ -116023,9 +115197,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre JRT_LEAF(void, InterpreterRuntime::popframe_move_outgoing_args(JavaThread* current, void* src_address, void* dest_address)) if (src_address == dest_address) { return; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpreter/interpreterRuntime.hpp jdk17u-ls/src/hotspot/share/interpreter/interpreterRuntime.hpp ---- openjdk/src/hotspot/share/interpreter/interpreterRuntime.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/interpreter/interpreterRuntime.hpp 2023-09-08 09:39:50.649842412 +0800 +diff --git a/src/hotspot/share/interpreter/interpreterRuntime.hpp b/src/hotspot/share/interpreter/interpreterRuntime.hpp +index c32431784..8209c42a1 100644 +--- a/src/hotspot/share/interpreter/interpreterRuntime.hpp ++++ b/src/hotspot/share/interpreter/interpreterRuntime.hpp @@ -22,6 +22,12 @@ * */ @@ -116039,7 +115214,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #ifndef SHARE_INTERPRETER_INTERPRETERRUNTIME_HPP #define SHARE_INTERPRETER_INTERPRETERRUNTIME_HPP -@@ -135,7 +141,7 @@ +@@ -135,7 +141,7 @@ class InterpreterRuntime: AllStatic { Method* method, intptr_t* from, intptr_t* to); @@ -116048,9 +115223,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre // Popframe support (only needed on x86, AMD64 and ARM) static void popframe_move_outgoing_args(JavaThread* current, void* src_address, void* dest_address); #endif -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp jdk17u-ls/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp ---- openjdk/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp 2023-09-08 09:39:50.653842417 +0800 +diff --git a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp +index 4e167ff45..9441bae96 100644 +--- a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp ++++ b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp @@ -22,6 +22,12 @@ * */ @@ -116064,7 +115240,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #ifndef SHARE_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP #define SHARE_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP -@@ -110,9 +116,9 @@ +@@ -110,9 +116,9 @@ class TemplateInterpreterGenerator: public AbstractInterpreterGenerator { void generate_fixed_frame(bool native_call); @@ -116076,9 +115252,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/interpre #ifdef PPC void lock_method(Register Rflags, Register Rscratch1, Register Rscratch2, bool flags_preloaded=false); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp jdk17u-ls/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp ---- openjdk/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp 2023-11-01 10:27:44.425761023 +0800 +diff --git a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp +index 597ddb380..427a9503e 100644 +--- a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp ++++ b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp @@ -22,6 +22,12 @@ * */ @@ -116092,18 +115269,19 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jfr/util #ifndef SHARE_JFR_UTILITIES_JFRBIGENDIAN_HPP #define SHARE_JFR_UTILITIES_JFRBIGENDIAN_HPP -@@ -102,7 +108,7 @@ +@@ -102,7 +108,7 @@ inline T JfrBigEndian::read_unaligned(const address location) { inline bool JfrBigEndian::platform_supports_unaligned_reads(void) { #if defined(IA32) || defined(AMD64) || defined(PPC) || defined(S390) return true; --#elif defined(ARM) || defined(AARCH64) -+#elif defined(ARM) || defined(AARCH64) || defined(MIPS) || defined(LOONGARCH) +-#elif defined(ARM) || defined(AARCH64) || defined(RISCV) ++#elif defined(ARM) || defined(AARCH64) || defined(RISCV) || defined(MIPS) || defined(LOONGARCH) return false; #else #warning "Unconfigured platform" -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jvmci/vmStructs_jvmci.cpp jdk17u-ls/src/hotspot/share/jvmci/vmStructs_jvmci.cpp ---- openjdk/src/hotspot/share/jvmci/vmStructs_jvmci.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/jvmci/vmStructs_jvmci.cpp 2023-09-08 09:39:50.693842470 +0800 +diff --git a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp +index 3f57d487b..3b49daaf9 100644 +--- a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp ++++ b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp @@ -22,6 +22,12 @@ * */ @@ -116135,9 +115313,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/jvmci/vm #ifdef X86 #define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/metaspace.cpp jdk17u-ls/src/hotspot/share/memory/metaspace.cpp ---- openjdk/src/hotspot/share/memory/metaspace.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/memory/metaspace.cpp 2023-11-01 10:27:44.433761032 +0800 +diff --git a/src/hotspot/share/memory/metaspace.cpp b/src/hotspot/share/memory/metaspace.cpp +index d1882c70e..7e6253765 100644 +--- a/src/hotspot/share/memory/metaspace.cpp ++++ b/src/hotspot/share/memory/metaspace.cpp @@ -23,6 +23,12 @@ * */ @@ -116151,7 +115330,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m #include "precompiled.hpp" #include "cds/metaspaceShared.hpp" #include "classfile/classLoaderData.hpp" -@@ -587,12 +593,15 @@ +@@ -581,12 +587,15 @@ bool Metaspace::class_space_is_initialized() { // On error, returns an unreserved space. ReservedSpace Metaspace::reserve_address_space_for_compressed_classes(size_t size) { @@ -116159,8 +115338,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m +#if defined(AARCH64) || defined(PPC64) || defined(MIPS64) || defined(LOONGARCH64) const size_t alignment = Metaspace::reserve_alignment(); - // AArch64: Try to align metaspace so that we can decode a compressed - // klass with a single MOVK instruction. We can do this iff the + // AArch64: Try to align metaspace class space so that we can decode a + // compressed klass with a single MOVK instruction. We can do this iff the // compressed class base is a multiple of 4G. + + // MIPS: Cannot mmap for 1G space at 4G position, and prepare for future optimization. @@ -116168,8 +115347,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m // Additionally, above 32G, ensure the lower LogKlassAlignmentInBytes bits // of the upper 32-bits of the address are zero so we can handle a shift // when decoding. -@@ -627,16 +636,16 @@ - a += search_ranges[i].increment; +@@ -643,16 +652,16 @@ ReservedSpace Metaspace::reserve_address_space_for_compressed_classes(size_t siz + return rs; } } -#endif // defined(AARCH64) || defined(PPC64) @@ -116188,9 +115367,117 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/memory/m } #endif // _LP64 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/output.cpp jdk17u-ls/src/hotspot/share/opto/output.cpp ---- openjdk/src/hotspot/share/opto/output.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/opto/output.cpp 2023-11-01 10:27:44.481761089 +0800 +diff --git a/src/hotspot/share/opto/classes.hpp b/src/hotspot/share/opto/classes.hpp +index 614d0b4e1..8d7764eb8 100644 +--- a/src/hotspot/share/opto/classes.hpp ++++ b/src/hotspot/share/opto/classes.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "utilities/macros.hpp" + + // The giant table of Node classes. +@@ -223,6 +229,7 @@ macro(StoreStoreFence) + macro(MemBarReleaseLock) + macro(MemBarVolatile) + macro(MemBarStoreStore) ++macro(SameAddrLoadFence) + macro(MergeMem) + macro(MinI) + macro(MinL) +diff --git a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp +index 4e8e39ffa..6c7770dbf 100644 +--- a/src/hotspot/share/opto/compile.cpp ++++ b/src/hotspot/share/opto/compile.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "jvm_io.h" + #include "asm/macroAssembler.hpp" +@@ -3522,6 +3528,7 @@ void Compile::final_graph_reshaping_main_switch(Node* n, Final_Reshape_Counts& f + n->set_req(MemBarNode::Precedent, top()); + } + break; ++ case Op_SameAddrLoadFence: + case Op_MemBarAcquire: { + if (n->as_MemBar()->trailing_load() && n->req() > MemBarNode::Precedent) { + // At parse time, the trailing MemBarAcquire for a volatile load +diff --git a/src/hotspot/share/opto/memnode.cpp b/src/hotspot/share/opto/memnode.cpp +index 074b129b0..a1886f813 100644 +--- a/src/hotspot/share/opto/memnode.cpp ++++ b/src/hotspot/share/opto/memnode.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "classfile/javaClasses.hpp" + #include "compiler/compileLog.hpp" +@@ -3298,6 +3304,7 @@ MemBarNode* MemBarNode::make(Compile* C, int opcode, int atp, Node* pn) { + case Op_MemBarReleaseLock: return new MemBarReleaseLockNode(C, atp, pn); + case Op_MemBarVolatile: return new MemBarVolatileNode(C, atp, pn); + case Op_MemBarCPUOrder: return new MemBarCPUOrderNode(C, atp, pn); ++ case Op_SameAddrLoadFence: return new SameAddrLoadFenceNode(C, atp, pn); + case Op_OnSpinWait: return new OnSpinWaitNode(C, atp, pn); + case Op_Initialize: return new InitializeNode(C, atp, pn); + default: ShouldNotReachHere(); return nullptr; +diff --git a/src/hotspot/share/opto/memnode.hpp b/src/hotspot/share/opto/memnode.hpp +index 99a304862..71bf99753 100644 +--- a/src/hotspot/share/opto/memnode.hpp ++++ b/src/hotspot/share/opto/memnode.hpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_OPTO_MEMNODE_HPP + #define SHARE_OPTO_MEMNODE_HPP + +@@ -1336,6 +1342,14 @@ public: + virtual uint ideal_reg() const { return 0; } // not matched in the AD file + }; + ++// Used to prevent LoadLoad reorder for same address. ++class SameAddrLoadFenceNode: public MemBarNode { ++public: ++ SameAddrLoadFenceNode(Compile* C, int alias_idx, Node* precedent) ++ : MemBarNode(C, alias_idx, precedent) {} ++ virtual int Opcode() const; ++}; ++ + class OnSpinWaitNode: public MemBarNode { + public: + OnSpinWaitNode(Compile* C, int alias_idx, Node* precedent) +diff --git a/src/hotspot/share/opto/output.cpp b/src/hotspot/share/opto/output.cpp +index 43c46a0eb..af7a37a1b 100644 +--- a/src/hotspot/share/opto/output.cpp ++++ b/src/hotspot/share/opto/output.cpp @@ -22,6 +22,12 @@ * */ @@ -116204,10 +115491,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/out #include "precompiled.hpp" #include "asm/assembler.inline.hpp" #include "asm/macroAssembler.inline.hpp" -@@ -1011,6 +1017,27 @@ +@@ -1016,6 +1022,27 @@ void PhaseOutput::Process_OopMap_Node(MachNode *mach, int current_offset) { // Add the safepoint in the DebugInfoRecorder if( !mach->is_MachCall() ) { - mcall = NULL; + mcall = nullptr; +#if defined(MIPS) || defined(LOONGARCH) + // safepoint_pc_offset should point to tha last instruction in safePoint. + // In X86 and sparc, their safePoints only contain one instruction. @@ -116232,7 +115519,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/out C->debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map); } else { mcall = mach->as_MachCall(); -@@ -1686,6 +1713,31 @@ +@@ -1691,6 +1718,22 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) { DEBUG_ONLY(uint instr_offset = cb->insts_size()); n->emit(*cb, C->regalloc()); current_offset = cb->insts_size(); @@ -116249,50 +115536,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/out + adjust += 4; + inst = (NativeInstruction*) (cb->insts()->end() - 8); + } -+#ifdef MIPS64 -+ if (PatchContinuousLoad) { -+ // if PatchContinuousLoad is true, a nop may be inserted after a load instruction and -+ // the adjust would be 2 instructions. -+ if (inst->is_nop()) { -+ adjust += 4; -+ } -+ } -+#endif + previous_offset = current_offset - adjust; + } +#endif // Above we only verified that there is enough space in the instruction section. // However, the instruction may emit stubs that cause code buffer expansion. -@@ -1698,7 +1750,9 @@ - "ret_addr_offset() not within emitted code"); - - #ifdef ASSERT -- uint n_size = n->size(C->regalloc()); -+ // adjust: one node may be inserted one and only one nop. -+ int adjust = MIPS64_ONLY(PatchContinuousLoad ? block->number_of_nodes() * 4 :) 0; -+ uint n_size = n->size(C->regalloc()) + adjust; - if (n_size < (current_offset-instr_offset)) { - MachNode* mach = n->as_Mach(); - n->dump(); -@@ -1785,7 +1839,13 @@ - } - // Verify that the distance for generated before forward - // short branches is still valid. -- guarantee((int)(blk_starts[i+1] - blk_starts[i]) >= (current_offset - blk_offset), "shouldn't increase block size"); -+ // adjust: one node may be inserted one and only one nop. -+ int adjust = MIPS64_ONLY(PatchContinuousLoad ? block->number_of_nodes() * 4 :) 0; -+#ifndef PRODUCT -+ if ((int)(blk_starts[i+1] - blk_starts[i] + adjust) < (current_offset - blk_offset)) -+ tty->print_cr("%s:%d blk_starts[i+1]:%d, blk_starts[i]:%d, adjust: %d, current_offset:%d, blk_offset:%d", __func__, __LINE__, blk_starts[i+1], blk_starts[i], adjust, current_offset, blk_offset); -+#endif -+ guarantee((int)(blk_starts[i+1] - blk_starts[i] + adjust) >= (current_offset - blk_offset), "shouldn't increase block size"); - - // Save new block start offset - blk_starts[i] = blk_offset; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/type.cpp jdk17u-ls/src/hotspot/share/opto/type.cpp ---- openjdk/src/hotspot/share/opto/type.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/opto/type.cpp 2023-11-01 10:27:44.489761099 +0800 +diff --git a/src/hotspot/share/opto/type.cpp b/src/hotspot/share/opto/type.cpp +index f13ffbc12..f78be3e08 100644 +--- a/src/hotspot/share/opto/type.cpp ++++ b/src/hotspot/share/opto/type.cpp @@ -22,6 +22,12 @@ * */ @@ -116306,7 +115559,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/typ #include "precompiled.hpp" #include "ci/ciMethodData.hpp" #include "ci/ciTypeFlow.hpp" -@@ -78,6 +84,14 @@ +@@ -78,6 +84,14 @@ const Type::TypeInfo Type::_type_info[Type::lastype] = { { Bad, T_ILLEGAL, "vectorx:", false, 0, relocInfo::none }, // VectorX { Bad, T_ILLEGAL, "vectory:", false, 0, relocInfo::none }, // VectorY { Bad, T_ILLEGAL, "vectorz:", false, 0, relocInfo::none }, // VectorZ @@ -116321,9 +115574,45 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/opto/typ #else // all other { Bad, T_ILLEGAL, "vectormask:", false, Op_RegVectMask, relocInfo::none }, // VectorMask. { Bad, T_ILLEGAL, "vectora:", false, Op_VecA, relocInfo::none }, // VectorA. -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/os.cpp jdk17u-ls/src/hotspot/share/runtime/os.cpp ---- openjdk/src/hotspot/share/runtime/os.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/runtime/os.cpp 2023-11-01 10:27:44.509761123 +0800 +diff --git a/src/hotspot/share/runtime/objectMonitor.cpp b/src/hotspot/share/runtime/objectMonitor.cpp +index 374816fd3..e7015344a 100644 +--- a/src/hotspot/share/runtime/objectMonitor.cpp ++++ b/src/hotspot/share/runtime/objectMonitor.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "classfile/vmSymbols.hpp" + #include "gc/shared/oopStorage.hpp" +@@ -362,6 +368,9 @@ bool ObjectMonitor::enter(JavaThread* current) { + } + + assert(owner_raw() != current, "invariant"); ++ // Thread _succ != current assertion load reording before Thread if (_succ == current) _succ = nullptr. ++ // But expect order is firstly if (_succ == current) _succ = nullptr then _succ != current assertion. ++ DEBUG_ONLY(LOONGARCH64_ONLY(__asm__ __volatile__ ("dbar 0x700\n");)MIPS64_ONLY(OrderAccess::loadload();)) + assert(_succ != current, "invariant"); + assert(!SafepointSynchronize::is_at_safepoint(), "invariant"); + assert(current->thread_state() != _thread_blocked, "invariant"); +@@ -723,6 +732,7 @@ void ObjectMonitor::EnterI(JavaThread* current) { + } + + // The Spin failed -- Enqueue and park the thread ... ++ DEBUG_ONLY(LOONGARCH64_ONLY(__asm__ __volatile__ ("dbar 0x700\n");)MIPS64_ONLY(OrderAccess::loadload();)) + assert(_succ != current, "invariant"); + assert(owner_raw() != current, "invariant"); + assert(_Responsible != current, "invariant"); +diff --git a/src/hotspot/share/runtime/os.cpp b/src/hotspot/share/runtime/os.cpp +index e786b0572..6f34a7d5e 100644 +--- a/src/hotspot/share/runtime/os.cpp ++++ b/src/hotspot/share/runtime/os.cpp @@ -22,6 +22,12 @@ * */ @@ -116337,7 +115626,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ #include "precompiled.hpp" #include "jvm.h" #include "classfile/javaClasses.hpp" -@@ -1312,7 +1318,8 @@ +@@ -1238,7 +1244,8 @@ bool os::is_first_C_frame(frame* fr) { if ((uintptr_t)fr->sender_sp() == (uintptr_t)-1 || is_pointer_bad(fr->sender_sp())) return true; uintptr_t old_fp = (uintptr_t)fr->link_or_null(); @@ -116347,9 +115636,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ is_pointer_bad(fr->link_or_null())) return true; // stack grows downwards; if old_fp is below current fp or if the stack -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/sharedRuntime.cpp jdk17u-ls/src/hotspot/share/runtime/sharedRuntime.cpp ---- openjdk/src/hotspot/share/runtime/sharedRuntime.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/runtime/sharedRuntime.cpp 2023-11-01 10:27:44.517761133 +0800 +diff --git a/src/hotspot/share/runtime/sharedRuntime.cpp b/src/hotspot/share/runtime/sharedRuntime.cpp +index 9af4b513a..1a3e9fd0a 100644 +--- a/src/hotspot/share/runtime/sharedRuntime.cpp ++++ b/src/hotspot/share/runtime/sharedRuntime.cpp @@ -22,6 +22,12 @@ * */ @@ -116363,7 +115653,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ #include "precompiled.hpp" #include "classfile/javaClasses.hpp" #include "jvm.h" -@@ -3041,7 +3047,7 @@ +@@ -3054,7 +3060,7 @@ void AdapterHandlerLibrary::create_native_wrapper(const methodHandle& method) { CodeBuffer buffer(buf); struct { double data[20]; } locs_buf; buffer.insts()->initialize_shared_locs((relocInfo*)&locs_buf, sizeof(locs_buf) / sizeof(relocInfo)); @@ -116372,9 +115662,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ // On AArch64 with ZGC and nmethod entry barriers, we need all oops to be // in the constant pool to ensure ordering between the barrier and oops // accesses. For native_wrappers we need a constant. -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/sharedRuntimeTrig.cpp jdk17u-ls/src/hotspot/share/runtime/sharedRuntimeTrig.cpp ---- openjdk/src/hotspot/share/runtime/sharedRuntimeTrig.cpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/runtime/sharedRuntimeTrig.cpp 2023-09-08 09:39:50.813842627 +0800 +diff --git a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp +index 6e3aa30b0..8f1d486f5 100644 +--- a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp ++++ b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp @@ -22,6 +22,13 @@ * */ @@ -116389,7 +115680,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ #include "precompiled.hpp" #include "jni.h" #include "runtime/interfaceSupport.inline.hpp" -@@ -507,6 +514,14 @@ +@@ -507,6 +514,14 @@ static int __ieee754_rem_pio2(double x, double *y) { * sin(x) = x + (S1*x + (x *(r-y/2)+y)) */ @@ -116404,9 +115695,70 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/runtime/ static const double S1 = -1.66666666666666324348e-01, /* 0xBFC55555, 0x55555549 */ S2 = 8.33333333332248946124e-03, /* 0x3F811111, 0x1110F8A6 */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilities/macros.hpp jdk17u-ls/src/hotspot/share/utilities/macros.hpp ---- openjdk/src/hotspot/share/utilities/macros.hpp 2022-10-13 03:49:18.000000000 +0800 -+++ jdk17u-ls/src/hotspot/share/utilities/macros.hpp 2023-11-01 10:27:44.533761152 +0800 +diff --git a/src/hotspot/share/runtime/thread.inline.hpp b/src/hotspot/share/runtime/thread.inline.hpp +index d86fce3c8..71bfd4dfa 100644 +--- a/src/hotspot/share/runtime/thread.inline.hpp ++++ b/src/hotspot/share/runtime/thread.inline.hpp +@@ -23,6 +23,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2018, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef SHARE_RUNTIME_THREAD_INLINE_HPP + #define SHARE_RUNTIME_THREAD_INLINE_HPP + +@@ -132,7 +138,7 @@ inline void JavaThread::set_pending_async_exception(oop e) { + } + + inline JavaThreadState JavaThread::thread_state() const { +-#if defined(PPC64) || defined (AARCH64) || defined(RISCV64) ++#if defined(PPC64) || defined (AARCH64) || defined(RISCV64) || defined(LOONGARCH64) + // Use membars when accessing volatile _thread_state. See + // Threads::create_vm() for size checks. + return (JavaThreadState) Atomic::load_acquire((volatile jint*)&_thread_state); +@@ -144,7 +150,7 @@ inline JavaThreadState JavaThread::thread_state() const { + inline void JavaThread::set_thread_state(JavaThreadState s) { + assert(current_or_null() == NULL || current_or_null() == this, + "state change should only be called by the current thread"); +-#if defined(PPC64) || defined (AARCH64) || defined(RISCV64) ++#if defined(PPC64) || defined (AARCH64) || defined(RISCV64) || defined(LOONGARCH64) + // Use membars when accessing volatile _thread_state. See + // Threads::create_vm() for size checks. + Atomic::release_store((volatile jint*)&_thread_state, (jint)s); +diff --git a/src/hotspot/share/runtime/vmStructs.cpp b/src/hotspot/share/runtime/vmStructs.cpp +index 33de84a68..7dc3d58f3 100644 +--- a/src/hotspot/share/runtime/vmStructs.cpp ++++ b/src/hotspot/share/runtime/vmStructs.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "cds/filemap.hpp" + #include "ci/ciField.hpp" +@@ -1597,6 +1603,7 @@ typedef HashtableEntry KlassHashtableEntry; + declare_c2_type(StoreFenceNode, MemBarNode) \ + declare_c2_type(MemBarVolatileNode, MemBarNode) \ + declare_c2_type(MemBarCPUOrderNode, MemBarNode) \ ++ declare_c2_type(SameAddrLoadFenceNode, MemBarNode) \ + declare_c2_type(OnSpinWaitNode, MemBarNode) \ + declare_c2_type(BlackholeNode, MultiNode) \ + declare_c2_type(InitializeNode, MemBarNode) \ +diff --git a/src/hotspot/share/utilities/macros.hpp b/src/hotspot/share/utilities/macros.hpp +index 33ecfe089..4d024b357 100644 +--- a/src/hotspot/share/utilities/macros.hpp ++++ b/src/hotspot/share/utilities/macros.hpp @@ -22,6 +22,12 @@ * */ @@ -116459,7 +115811,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilitie #if defined(PPC32) || defined(PPC64) #ifndef PPC #define PPC -@@ -579,16 +617,34 @@ +@@ -605,16 +643,34 @@ // OS_CPU_HEADER(vmStructs) --> vmStructs_linux_x86.hpp // // basename.hpp / basename.inline.hpp @@ -116494,1311 +115846,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/hotspot/share/utilitie // basename.hpp / basename.inline.hpp #define COMPILER_HEADER(basename) XSTR(COMPILER_HEADER_STEM(basename).hpp) #define COMPILER_HEADER_INLINE(basename) XSTR(COMPILER_HEADER_STEM(basename).inline.hpp) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/share/classes/sun/security/ssl/NamedGroup.java jdk17u-ls/src/java.base/share/classes/sun/security/ssl/NamedGroup.java ---- openjdk/src/java.base/share/classes/sun/security/ssl/NamedGroup.java 2022-10-13 03:49:24.000000000 +0800 -+++ jdk17u-ls/src/java.base/share/classes/sun/security/ssl/NamedGroup.java 2023-09-08 09:39:51.197843132 +0800 -@@ -49,8 +49,114 @@ - // Elliptic Curves (RFC 4492) - // - // See sun.security.util.CurveDB for the OIDs -+ // NIST K-163 -+ -+ SECT163_K1(0x0001, "sect163k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect163k1")), -+ SECT163_R1(0x0002, "sect163r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect163r1")), -+ -+ // NIST B-163 -+ SECT163_R2(0x0003, "sect163r2", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect163r2")), -+ SECT193_R1(0x0004, "sect193r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect193r1")), -+ SECT193_R2(0x0005, "sect193r2", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect193r2")), -+ -+ // NIST K-233 -+ SECT233_K1(0x0006, "sect233k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect233k1")), -+ -+ // NIST B-233 -+ SECT233_R1(0x0007, "sect233r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect233r1")), -+ SECT239_K1(0x0008, "sect239k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect239k1")), -+ -+ // NIST K-283 -+ SECT283_K1(0x0009, "sect283k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect283k1")), -+ -+ // NIST B-283 -+ SECT283_R1(0x000A, "sect283r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect283r1")), -+ -+ // NIST K-409 -+ SECT409_K1(0x000B, "sect409k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect409k1")), -+ -+ // NIST B-409 -+ SECT409_R1(0x000C, "sect409r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect409r1")), -+ -+ // NIST K-571 -+ SECT571_K1(0x000D, "sect571k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect571k1")), -+ -+ // NIST B-571 -+ SECT571_R1(0x000E, "sect571r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("sect571r1")), -+ SECP160_K1(0x000F, "secp160k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp160k1")), -+ SECP160_R1(0x0010, "secp160r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp160r1")), -+ SECP160_R2(0x0011, "secp160r2", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp160r2")), -+ SECP192_K1(0x0012, "secp192k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp192k1")), -+ -+ // NIST P-192 -+ SECP192_R1(0x0013, "secp192r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp192r1")), -+ SECP224_K1(0x0014, "secp224k1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp224k1")), - - // NIST P-224 -+ SECP224_R1(0x0015, "secp224r1", -+ NamedGroupSpec.NAMED_GROUP_ECDHE, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ CurveDB.lookup("secp224r1")), - SECP256_K1(0x0016, "secp256k1", - NamedGroupSpec.NAMED_GROUP_ECDHE, - ProtocolVersion.PROTOCOLS_TO_12, -@@ -105,7 +211,19 @@ - FFDHE_8192(0x0104, "ffdhe8192", - NamedGroupSpec.NAMED_GROUP_FFDHE, - ProtocolVersion.PROTOCOLS_TO_13, -- PredefinedDHParameterSpecs.ffdheParams.get(8192)); -+ PredefinedDHParameterSpecs.ffdheParams.get(8192)), -+ -+ // Elliptic Curves (RFC 4492) -+ // -+ // arbitrary prime and characteristic-2 curves -+ ARBITRARY_PRIME(0xFF01, "arbitrary_explicit_prime_curves", -+ NamedGroupSpec.NAMED_GROUP_ARBITRARY, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ null), -+ ARBITRARY_CHAR2(0xFF02, "arbitrary_explicit_char2_curves", -+ NamedGroupSpec.NAMED_GROUP_ARBITRARY, -+ ProtocolVersion.PROTOCOLS_TO_12, -+ null); - - final int id; // hash + signature - final String name; // literal name -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/share/classes/sun/security/util/CurveDB.java jdk17u-ls/src/java.base/share/classes/sun/security/util/CurveDB.java ---- openjdk/src/java.base/share/classes/sun/security/util/CurveDB.java 2022-10-13 03:49:24.000000000 +0800 -+++ jdk17u-ls/src/java.base/share/classes/sun/security/util/CurveDB.java 2023-09-08 09:39:51.217843158 +0800 -@@ -147,6 +147,105 @@ - - static { - /* SEC2 prime curves */ -+ add(KnownOIDs.secp112r1, P, -+ "DB7C2ABF62E35E668076BEAD208B", -+ "DB7C2ABF62E35E668076BEAD2088", -+ "659EF8BA043916EEDE8911702B22", -+ "09487239995A5EE76B55F9C2F098", -+ "A89CE5AF8724C0A23E0E0FF77500", -+ "DB7C2ABF62E35E7628DFAC6561C5", -+ 1); -+ -+ add(KnownOIDs.secp112r2, P, -+ "DB7C2ABF62E35E668076BEAD208B", -+ "6127C24C05F38A0AAAF65C0EF02C", -+ "51DEF1815DB5ED74FCC34C85D709", -+ "4BA30AB5E892B4E1649DD0928643", -+ "adcd46f5882e3747def36e956e97", -+ "36DF0AAFD8B8D7597CA10520D04B", -+ 4); -+ -+ add(KnownOIDs.secp128r1, P, -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFF", -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFC", -+ "E87579C11079F43DD824993C2CEE5ED3", -+ "161FF7528B899B2D0C28607CA52C5B86", -+ "CF5AC8395BAFEB13C02DA292DDED7A83", -+ "FFFFFFFE0000000075A30D1B9038A115", -+ 1); -+ -+ add(KnownOIDs.secp128r2, P, -+ "FFFFFFFDFFFFFFFFFFFFFFFFFFFFFFFF", -+ "D6031998D1B3BBFEBF59CC9BBFF9AEE1", -+ "5EEEFCA380D02919DC2C6558BB6D8A5D", -+ "7B6AA5D85E572983E6FB32A7CDEBC140", -+ "27B6916A894D3AEE7106FE805FC34B44", -+ "3FFFFFFF7FFFFFFFBE0024720613B5A3", -+ 4); -+ -+ add(KnownOIDs.secp160k1, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC73", -+ "0000000000000000000000000000000000000000", -+ "0000000000000000000000000000000000000007", -+ "3B4C382CE37AA192A4019E763036F4F5DD4D7EBB", -+ "938CF935318FDCED6BC28286531733C3F03C4FEE", -+ "0100000000000000000001B8FA16DFAB9ACA16B6B3", -+ 1); -+ -+ add(KnownOIDs.secp160r1, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7FFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7FFFFFFC", -+ "1C97BEFC54BD7A8B65ACF89F81D4D4ADC565FA45", -+ "4A96B5688EF573284664698968C38BB913CBFC82", -+ "23A628553168947D59DCC912042351377AC5FB32", -+ "0100000000000000000001F4C8F927AED3CA752257", -+ 1); -+ -+ add(KnownOIDs.secp160r2, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC73", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFAC70", -+ "B4E134D3FB59EB8BAB57274904664D5AF50388BA", -+ "52DCB034293A117E1F4FF11B30F7199D3144CE6D", -+ "FEAFFEF2E331F296E071FA0DF9982CFEA7D43F2E", -+ "0100000000000000000000351EE786A818F3A1A16B", -+ 1); -+ -+ add(KnownOIDs.secp192k1, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFEE37", -+ "000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000003", -+ "DB4FF10EC057E9AE26B07D0280B7F4341DA5D1B1EAE06C7D", -+ "9B2F2F6D9C5628A7844163D015BE86344082AA88D95E2F9D", -+ "FFFFFFFFFFFFFFFFFFFFFFFE26F2FC170F69466A74DEFD8D", -+ 1); -+ -+ add(KnownOIDs.secp192r1, PD, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "64210519E59C80E70FA7E9AB72243049FEB8DEECC146B9B1", -+ "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF1012", -+ "07192B95FFC8DA78631011ED6B24CDD573F977A11E794811", -+ "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22831", -+ 1); -+ -+ add(KnownOIDs.secp224k1, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFE56D", -+ "00000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000005", -+ "A1455B334DF099DF30FC28A169A467E9E47075A90F7E650EB6B7A45C", -+ "7E089FED7FBA344282CAFBD6F7E319F7C0B0BD59E2CA4BDB556D61A5", -+ "010000000000000000000000000001DCE8D2EC6184CAF0A971769FB1F7", -+ 1); -+ -+ add(KnownOIDs.secp224r1, PD, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000001", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFFFFFFFFFE", -+ "B4050A850C04B3ABF54132565044B0B7D7BFD8BA270B39432355FFB4", -+ "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D21", -+ "BD376388B5F723FB4C22DFE6CD4375A05A07476444D5819985007E34", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3D", -+ 1); -+ - add(KnownOIDs.secp256k1, P, - "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFC2F", - "0000000000000000000000000000000000000000000000000000000000000000", -@@ -183,6 +282,435 @@ - "01FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA51868783BF2F966B7FCC0148F709A5D03BB5C9B8899C47AEBB6FB71E91386409", - 1); - -+ /* ANSI X9.62 prime curves */ -+ add(KnownOIDs.prime192v2, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "CC22D6DFB95C6B25E49C0D6364A4E5980C393AA21668D953", -+ "EEA2BAE7E1497842F2DE7769CFE9C989C072AD696F48034A", -+ "6574D11D69B6EC7A672BB82A083DF2F2B0847DE970B2DE15", -+ "FFFFFFFFFFFFFFFFFFFFFFFE5FB1A724DC80418648D8DD31", -+ 1); -+ -+ add(KnownOIDs.prime192v3, P, -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFF", -+ "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFFFFFFFFFFC", -+ "22123DC2395A05CAA7423DAECCC94760A7D462256BD56916", -+ "7D29778100C65A1DA1783716588DCE2B8B4AEE8E228F1896", -+ "38A90F22637337334B49DCB66A6DC8F9978ACA7648A943B0", -+ "FFFFFFFFFFFFFFFFFFFFFFFF7A62D031C83F4294F640EC13", -+ 1); -+ -+ add(KnownOIDs.prime239v1, P, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "6B016C3BDCF18941D0D654921475CA71A9DB2FB27D1D37796185C2942C0A", -+ "0FFA963CDCA8816CCC33B8642BEDF905C3D358573D3F27FBBD3B3CB9AAAF", -+ "7DEBE8E4E90A5DAE6E4054CA530BA04654B36818CE226B39FCCB7B02F1AE", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFF9E5E9A9F5D9071FBD1522688909D0B", -+ 1); -+ -+ add(KnownOIDs.prime239v2, P, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "617FAB6832576CBBFED50D99F0249C3FEE58B94BA0038C7AE84C8C832F2C", -+ "38AF09D98727705120C921BB5E9E26296A3CDCF2F35757A0EAFD87B830E7", -+ "5B0125E4DBEA0EC7206DA0FC01D9B081329FB555DE6EF460237DFF8BE4BA", -+ "7FFFFFFFFFFFFFFFFFFFFFFF800000CFA7E8594377D414C03821BC582063", -+ 1); -+ -+ add(KnownOIDs.prime239v3, P, -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFF", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFFFFFFFF8000000000007FFFFFFFFFFC", -+ "255705FA2A306654B1F4CB03D6A750A30C250102D4988717D9BA15AB6D3E", -+ "6768AE8E18BB92CFCF005C949AA2C6D94853D0E660BBF854B1C9505FE95A", -+ "1607E6898F390C06BC1D552BAD226F3B6FCFE48B6E818499AF18E3ED6CF3", -+ "7FFFFFFFFFFFFFFFFFFFFFFF7FFFFF975DEB41B3A6057C3C432146526551", -+ 1); -+ -+ /* SEC2 binary curves */ -+ add(KnownOIDs.sect113r1, B, -+ "020000000000000000000000000201", -+ "003088250CA6E7C7FE649CE85820F7", -+ "00E8BEE4D3E2260744188BE0E9C723", -+ "009D73616F35F4AB1407D73562C10F", -+ "00A52830277958EE84D1315ED31886", -+ "0100000000000000D9CCEC8A39E56F", -+ 2); -+ -+ add(KnownOIDs.sect113r2, B, -+ "020000000000000000000000000201", -+ "00689918DBEC7E5A0DD6DFC0AA55C7", -+ "0095E9A9EC9B297BD4BF36E059184F", -+ "01A57A6A7B26CA5EF52FCDB8164797", -+ "00B3ADC94ED1FE674C06E695BABA1D", -+ "010000000000000108789B2496AF93", -+ 2); -+ -+ add(KnownOIDs.sect131r1, B, -+ "080000000000000000000000000000010D", -+ "07A11B09A76B562144418FF3FF8C2570B8", -+ "0217C05610884B63B9C6C7291678F9D341", -+ "0081BAF91FDF9833C40F9C181343638399", -+ "078C6E7EA38C001F73C8134B1B4EF9E150", -+ "0400000000000000023123953A9464B54D", -+ 2); -+ -+ add(KnownOIDs.sect131r2, B, -+ "080000000000000000000000000000010D", -+ "03E5A88919D7CAFCBF415F07C2176573B2", -+ "04B8266A46C55657AC734CE38F018F2192", -+ "0356DCD8F2F95031AD652D23951BB366A8", -+ "0648F06D867940A5366D9E265DE9EB240F", -+ "0400000000000000016954A233049BA98F", -+ 2); -+ -+ add(KnownOIDs.sect163k1, B, -+ "0800000000000000000000000000000000000000C9", -+ "000000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000001", -+ "02FE13C0537BBC11ACAA07D793DE4E6D5E5C94EEE8", -+ "0289070FB05D38FF58321F2E800536D538CCDAA3D9", -+ "04000000000000000000020108A2E0CC0D99F8A5EF", -+ 2); -+ -+ add(KnownOIDs.sect163r1, B, -+ "0800000000000000000000000000000000000000C9", -+ "07B6882CAAEFA84F9554FF8428BD88E246D2782AE2", -+ "0713612DCDDCB40AAB946BDA29CA91F73AF958AFD9", -+ "0369979697AB43897789566789567F787A7876A654", -+ "00435EDB42EFAFB2989D51FEFCE3C80988F41FF883", -+ "03FFFFFFFFFFFFFFFFFFFF48AAB689C29CA710279B", -+ 2); -+ -+ add(KnownOIDs.sect163r2, BD, -+ "0800000000000000000000000000000000000000C9", -+ "000000000000000000000000000000000000000001", -+ "020A601907B8C953CA1481EB10512F78744A3205FD", -+ "03F0EBA16286A2D57EA0991168D4994637E8343E36", -+ "00D51FBC6C71A0094FA2CDD545B11C5C0C797324F1", -+ "040000000000000000000292FE77E70C12A4234C33", -+ 2); -+ -+ add(KnownOIDs.sect193r1, B, -+ "02000000000000000000000000000000000000000000008001", -+ "0017858FEB7A98975169E171F77B4087DE098AC8A911DF7B01", -+ "00FDFB49BFE6C3A89FACADAA7A1E5BBC7CC1C2E5D831478814", -+ "01F481BC5F0FF84A74AD6CDF6FDEF4BF6179625372D8C0C5E1", -+ "0025E399F2903712CCF3EA9E3A1AD17FB0B3201B6AF7CE1B05", -+ "01000000000000000000000000C7F34A778F443ACC920EBA49", -+ 2); -+ -+ add(KnownOIDs.sect193r2, B, -+ "02000000000000000000000000000000000000000000008001", -+ "0163F35A5137C2CE3EA6ED8667190B0BC43ECD69977702709B", -+ "00C9BB9E8927D4D64C377E2AB2856A5B16E3EFB7F61D4316AE", -+ "00D9B67D192E0367C803F39E1A7E82CA14A651350AAE617E8F", -+ "01CE94335607C304AC29E7DEFBD9CA01F596F927224CDECF6C", -+ "010000000000000000000000015AAB561B005413CCD4EE99D5", -+ 2); -+ -+ add(KnownOIDs.sect233k1, BD, -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "017232BA853A7E731AF129F22FF4149563A419C26BF50A4C9D6EEFAD6126", -+ "01DB537DECE819B7F70F555A67C427A8CD9BF18AEB9B56E0C11056FAE6A3", -+ "008000000000000000000000000000069D5BB915BCD46EFB1AD5F173ABDF", -+ 4); -+ -+ add(KnownOIDs.sect233r1, B, -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "0066647EDE6C332C7F8C0923BB58213B333B20E9CE4281FE115F7D8F90AD", -+ "00FAC9DFCBAC8313BB2139F1BB755FEF65BC391F8B36F8F8EB7371FD558B", -+ "01006A08A41903350678E58528BEBF8A0BEFF867A7CA36716F7E01F81052", -+ "01000000000000000000000000000013E974E72F8A6922031D2603CFE0D7", -+ 2); -+ -+ add(KnownOIDs.sect239k1, B, -+ "800000000000000000004000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "29A0B6A887A983E9730988A68727A8B2D126C44CC2CC7B2A6555193035DC", -+ "76310804F12E549BDB011C103089E73510ACB275FC312A5DC6B76553F0CA", -+ "2000000000000000000000000000005A79FEC67CB6E91F1C1DA800E478A5", -+ 4); -+ -+ add(KnownOIDs.sect283k1, BD, -+ "0800000000000000000000000000000000000000000000000000000000000000000010A1", -+ "000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0503213F78CA44883F1A3B8162F188E553CD265F23C1567A16876913B0C2AC2458492836", -+ "01CCDA380F1C9E318D90F95D07E5426FE87E45C0E8184698E45962364E34116177DD2259", -+ "01FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE9AE2ED07577265DFF7F94451E061E163C61", -+ 4); -+ -+ add(KnownOIDs.sect283r1, B, -+ "0800000000000000000000000000000000000000000000000000000000000000000010A1", -+ "000000000000000000000000000000000000000000000000000000000000000000000001", -+ "027B680AC8B8596DA5A4AF8A19A0303FCA97FD7645309FA2A581485AF6263E313B79A2F5", -+ "05F939258DB7DD90E1934F8C70B0DFEC2EED25B8557EAC9C80E2E198F8CDBECD86B12053", -+ "03676854FE24141CB98FE6D4B20D02B4516FF702350EDDB0826779C813F0DF45BE8112F4", -+ "03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEF90399660FC938A90165B042A7CEFADB307", -+ 2); -+ -+ add(KnownOIDs.sect409k1, BD, -+ "02000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000001", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0060F05F658F49C1AD3AB1890F7184210EFD0987E307C84C27ACCFB8F9F67CC2C460189EB5AAAA62EE222EB1B35540CFE9023746", -+ "01E369050B7C4E42ACBA1DACBF04299C3460782F918EA427E6325165E9EA10E3DA5F6C42E9C55215AA9CA27A5863EC48D8E0286B", -+ "007FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE5F83B2D4EA20400EC4557D5ED3E3E7CA5B4B5C83B8E01E5FCF", -+ 4); -+ -+ add(KnownOIDs.sect409r1, B, -+ "02000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000001", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0021A5C2C8EE9FEB5C4B9A753B7B476B7FD6422EF1F3DD674761FA99D6AC27C8A9A197B272822F6CD57A55AA4F50AE317B13545F", -+ "015D4860D088DDB3496B0C6064756260441CDE4AF1771D4DB01FFE5B34E59703DC255A868A1180515603AEAB60794E54BB7996A7", -+ "0061B1CFAB6BE5F32BBFA78324ED106A7636B9C5A7BD198D0158AA4F5488D08F38514F1FDF4B4F40D2181B3681C364BA0273C706", -+ "010000000000000000000000000000000000000000000000000001E2AAD6A612F33307BE5FA47C3C9E052F838164CD37D9A21173", -+ 2); -+ -+ add(KnownOIDs.sect571k1, BD, -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "026EB7A859923FBC82189631F8103FE4AC9CA2970012D5D46024804801841CA44370958493B205E647DA304DB4CEB08CBBD1BA39494776FB988B47174DCA88C7E2945283A01C8972", -+ "0349DC807F4FBF374F4AEADE3BCA95314DD58CEC9F307A54FFC61EFC006D8A2C9D4979C0AC44AEA74FBEBBB9F772AEDCB620B01A7BA7AF1B320430C8591984F601CD4C143EF1C7A3", -+ "020000000000000000000000000000000000000000000000000000000000000000000000131850E1F19A63E4B391A8DB917F4138B630D84BE5D639381E91DEB45CFE778F637C1001", -+ 4); -+ -+ add(KnownOIDs.sect571r1, B, -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "02F40E7E2221F295DE297117B7F3D62F5C6A97FFCB8CEFF1CD6BA8CE4A9A18AD84FFABBD8EFA59332BE7AD6756A66E294AFD185A78FF12AA520E4DE739BACA0C7FFEFF7F2955727A", -+ "0303001D34B856296C16C0D40D3CD7750A93D1D2955FA80AA5F40FC8DB7B2ABDBDE53950F4C0D293CDD711A35B67FB1499AE60038614F1394ABFA3B4C850D927E1E7769C8EEC2D19", -+ "037BF27342DA639B6DCCFFFEB73D69D78C6C27A6009CBBCA1980F8533921E8A684423E43BAB08A576291AF8F461BB2A8B3531D2F0485C19B16E2F1516E23DD3C1A4827AF1B8AC15B", -+ "03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE661CE18FF55987308059B186823851EC7DD9CA1161DE93D5174D66E8382E9BB2FE84E47", -+ 2); -+ -+ /* ANSI X9.62 binary curves */ -+ add(KnownOIDs.c2tnb191v1, B, -+ "800000000000000000000000000000000000000000000201", -+ "2866537B676752636A68F56554E12640276B649EF7526267", -+ "2E45EF571F00786F67B0081B9495A3D95462F5DE0AA185EC", -+ "36B3DAF8A23206F9C4F299D7B21A9C369137F2C84AE1AA0D", -+ "765BE73433B3F95E332932E70EA245CA2418EA0EF98018FB", -+ "40000000000000000000000004A20E90C39067C893BBB9A5", -+ 2); -+ -+ add(KnownOIDs.c2tnb191v2, B, -+ "800000000000000000000000000000000000000000000201", -+ "401028774D7777C7B7666D1366EA432071274F89FF01E718", -+ "0620048D28BCBD03B6249C99182B7C8CD19700C362C46A01", -+ "3809B2B7CC1B28CC5A87926AAD83FD28789E81E2C9E3BF10", -+ "17434386626D14F3DBF01760D9213A3E1CF37AEC437D668A", -+ "20000000000000000000000050508CB89F652824E06B8173", -+ 4); -+ -+ add(KnownOIDs.c2tnb191v3, B, -+ "800000000000000000000000000000000000000000000201", -+ "6C01074756099122221056911C77D77E77A777E7E7E77FCB", -+ "71FE1AF926CF847989EFEF8DB459F66394D90F32AD3F15E8", -+ "375D4CE24FDE434489DE8746E71786015009E66E38A926DD", -+ "545A39176196575D985999366E6AD34CE0A77CD7127B06BE", -+ "155555555555555555555555610C0B196812BFB6288A3EA3", -+ 6); -+ -+ add(KnownOIDs.c2tnb239v1, B, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "32010857077C5431123A46B808906756F543423E8D27877578125778AC76", -+ "790408F2EEDAF392B012EDEFB3392F30F4327C0CA3F31FC383C422AA8C16", -+ "57927098FA932E7C0A96D3FD5B706EF7E5F5C156E16B7E7C86038552E91D", -+ "61D8EE5077C33FECF6F1A16B268DE469C3C7744EA9A971649FC7A9616305", -+ "2000000000000000000000000000000F4D42FFE1492A4993F1CAD666E447", -+ 4); -+ -+ add(KnownOIDs.c2tnb239v2, B, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "4230017757A767FAE42398569B746325D45313AF0766266479B75654E65F", -+ "5037EA654196CFF0CD82B2C14A2FCF2E3FF8775285B545722F03EACDB74B", -+ "28F9D04E900069C8DC47A08534FE76D2B900B7D7EF31F5709F200C4CA205", -+ "5667334C45AFF3B5A03BAD9DD75E2C71A99362567D5453F7FA6E227EC833", -+ "1555555555555555555555555555553C6F2885259C31E3FCDF154624522D", -+ 6); -+ -+ add(KnownOIDs.c2tnb239v3, B, -+ "800000000000000000000000000000000000000000000000001000000001", -+ "01238774666A67766D6676F778E676B66999176666E687666D8766C66A9F", -+ "6A941977BA9F6A435199ACFC51067ED587F519C5ECB541B8E44111DE1D40", -+ "70F6E9D04D289C4E89913CE3530BFDE903977D42B146D539BF1BDE4E9C92", -+ "2E5A0EAF6E5E1305B9004DCE5C0ED7FE59A35608F33837C816D80B79F461", -+ "0CCCCCCCCCCCCCCCCCCCCCCCCCCCCCAC4912D2D9DF903EF9888B8A0E4CFF", -+ 0xA); -+ -+ add(KnownOIDs.c2tnb359v1, B, -+ "800000000000000000000000000000000000000000000000000000000000000000000000100000000000000001", -+ "5667676A654B20754F356EA92017D946567C46675556F19556A04616B567D223A5E05656FB549016A96656A557", -+ "2472E2D0197C49363F1FE7F5B6DB075D52B6947D135D8CA445805D39BC345626089687742B6329E70680231988", -+ "3C258EF3047767E7EDE0F1FDAA79DAEE3841366A132E163ACED4ED2401DF9C6BDCDE98E8E707C07A2239B1B097", -+ "53D7E08529547048121E9C95F3791DD804963948F34FAE7BF44EA82365DC7868FE57E4AE2DE211305A407104BD", -+ "01AF286BCA1AF286BCA1AF286BCA1AF286BCA1AF286BC9FB8F6B85C556892C20A7EB964FE7719E74F490758D3B", -+ 0x4C); -+ -+ add(KnownOIDs.c2tnb431r1, B, -+ "800000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000001", -+ "1A827EF00DD6FC0E234CAF046C6A5D8A85395B236CC4AD2CF32A0CADBDC9DDF620B0EB9906D0957F6C6FEACD615468DF104DE296CD8F", -+ "10D9B4A3D9047D8B154359ABFB1B7F5485B04CEB868237DDC9DEDA982A679A5A919B626D4E50A8DD731B107A9962381FB5D807BF2618", -+ "120FC05D3C67A99DE161D2F4092622FECA701BE4F50F4758714E8A87BBF2A658EF8C21E7C5EFE965361F6C2999C0C247B0DBD70CE6B7", -+ "20D0AF8903A96F8D5FA2C255745D3C451B302C9346D9B7E485E7BCE41F6B591F3E8F6ADDCBB0BC4C2F947A7DE1A89B625D6A598B3760", -+ "0340340340340340340340340340340340340340340340340340340323C313FAB50589703B5EC68D3587FEC60D161CC149C1AD4A91", -+ 0x2760); -+ -+ /* ANSI X9.62 binary curves from the 1998 standard but forbidden -+ * in the 2005 version of the standard. -+ * We don't register them but leave them here for the time being in -+ * case we need to support them after all. -+ */ -+/* -+ add(KnownOIDs.c2pnb163v1, B, -+ "080000000000000000000000000000000000000107", -+ "072546B5435234A422E0789675F432C89435DE5242", -+ "00C9517D06D5240D3CFF38C74B20B6CD4D6F9DD4D9", -+ "07AF69989546103D79329FCC3D74880F33BBE803CB", -+ "01EC23211B5966ADEA1D3F87F7EA5848AEF0B7CA9F", -+ "0400000000000000000001E60FC8821CC74DAEAFC1", -+ 2); -+ -+ add(KnownOIDs.c2pnb163v2, B, -+ "080000000000000000000000000000000000000107", -+ "0108B39E77C4B108BED981ED0E890E117C511CF072", -+ "0667ACEB38AF4E488C407433FFAE4F1C811638DF20", -+ "0024266E4EB5106D0A964D92C4860E2671DB9B6CC5", -+ "079F684DDF6684C5CD258B3890021B2386DFD19FC5", -+ "03FFFFFFFFFFFFFFFFFFFDF64DE1151ADBB78F10A7", -+ 2); -+ -+ add(KnownOIDs.c2pnb163v3, B, -+ "080000000000000000000000000000000000000107", -+ "07A526C63D3E25A256A007699F5447E32AE456B50E", -+ "03F7061798EB99E238FD6F1BF95B48FEEB4854252B", -+ "02F9F87B7C574D0BDECF8A22E6524775F98CDEBDCB", -+ "05B935590C155E17EA48EB3FF3718B893DF59A05D0", -+ "03FFFFFFFFFFFFFFFFFFFE1AEE140F110AFF961309", -+ 2); -+ -+ add(KnownOIDs.c2pnb176w1, B, -+ "0100000000000000000000000000000000080000000007", -+ "E4E6DB2995065C407D9D39B8D0967B96704BA8E9C90B", -+ "5DDA470ABE6414DE8EC133AE28E9BBD7FCEC0AE0FFF2", -+ "8D16C2866798B600F9F08BB4A8E860F3298CE04A5798", -+ "6FA4539C2DADDDD6BAB5167D61B436E1D92BB16A562C", -+ "00010092537397ECA4F6145799D62B0A19CE06FE26AD", -+ 0xFF6E); -+ -+ add(KnownOIDs.c2pnb208w1, B, -+ "010000000000000000000000000000000800000000000000000007", -+ "0000000000000000000000000000000000000000000000000000", -+ "C8619ED45A62E6212E1160349E2BFA844439FAFC2A3FD1638F9E", -+ "89FDFBE4ABE193DF9559ECF07AC0CE78554E2784EB8C1ED1A57A", -+ "0F55B51A06E78E9AC38A035FF520D8B01781BEB1A6BB08617DE3", -+ "000101BAF95C9723C57B6C21DA2EFF2D5ED588BDD5717E212F9D", -+ 0xFE48); -+ -+ add(KnownOIDs.c2pnb272w1, B, -+ "010000000000000000000000000000000000000000000000000000010000000000000B", -+ "91A091F03B5FBA4AB2CCF49C4EDD220FB028712D42BE752B2C40094DBACDB586FB20", -+ "7167EFC92BB2E3CE7C8AAAFF34E12A9C557003D7C73A6FAF003F99F6CC8482E540F7", -+ "6108BABB2CEEBCF787058A056CBE0CFE622D7723A289E08A07AE13EF0D10D171DD8D", -+ "10C7695716851EEF6BA7F6872E6142FBD241B830FF5EFCACECCAB05E02005DDE9D23", -+ "000100FAF51354E0E39E4892DF6E319C72C8161603FA45AA7B998A167B8F1E629521", -+ 0xFF06); -+ -+ add(KnownOIDs.c2pnb304w1, B, -+ "010000000000000000000000000000000000000000000000000000000000000000000000000807", -+ "FD0D693149A118F651E6DCE6802085377E5F882D1B510B44160074C1288078365A0396C8E681", -+ "BDDB97E555A50A908E43B01C798EA5DAA6788F1EA2794EFCF57166B8C14039601E55827340BE", -+ "197B07845E9BE2D96ADB0F5F3C7F2CFFBD7A3EB8B6FEC35C7FD67F26DDF6285A644F740A2614", -+ "E19FBEB76E0DA171517ECF401B50289BF014103288527A9B416A105E80260B549FDC1B92C03B", -+ "000101D556572AABAC800101D556572AABAC8001022D5C91DD173F8FB561DA6899164443051D", -+ 0xFE2E); -+ -+ add(KnownOIDs.c2pnb368w1, B, -+ "0100000000000000000000000000000000000000000000000000000000000000000000002000000000000000000007", -+ "E0D2EE25095206F5E2A4F9ED229F1F256E79A0E2B455970D8D0D865BD94778C576D62F0AB7519CCD2A1A906AE30D", -+ "FC1217D4320A90452C760A58EDCD30C8DD069B3C34453837A34ED50CB54917E1C2112D84D164F444F8F74786046A", -+ "1085E2755381DCCCE3C1557AFA10C2F0C0C2825646C5B34A394CBCFA8BC16B22E7E789E927BE216F02E1FB136A5F", -+ "7B3EB1BDDCBA62D5D8B2059B525797FC73822C59059C623A45FF3843CEE8F87CD1855ADAA81E2A0750B80FDA2310", -+ "00010090512DA9AF72B08349D98A5DD4C7B0532ECA51CE03E2D10F3B7AC579BD87E909AE40A6F131E9CFCE5BD967", -+ 0xFF70); -+*/ -+ -+ /* -+ * Brainpool curves (RFC 5639) -+ * (Twisted curves are not included) -+ */ -+ -+ add(KnownOIDs.brainpoolP160r1, P, -+ "E95E4A5F737059DC60DFC7AD95B3D8139515620F", -+ "340E7BE2A280EB74E2BE61BADA745D97E8F7C300", -+ "1E589A8595423412134FAA2DBDEC95C8D8675E58", -+ "BED5AF16EA3F6A4F62938C4631EB5AF7BDBCDBC3", -+ "1667CB477A1A8EC338F94741669C976316DA6321", -+ "E95E4A5F737059DC60DF5991D45029409E60FC09", -+ 1); -+ -+ add(KnownOIDs.brainpoolP192r1, P, -+ "C302F41D932A36CDA7A3463093D18DB78FCE476DE1A86297", -+ "6A91174076B1E0E19C39C031FE8685C1CAE040E5C69A28EF", -+ "469A28EF7C28CCA3DC721D044F4496BCCA7EF4146FBF25C9", -+ "C0A0647EAAB6A48753B033C56CB0F0900A2F5C4853375FD6", -+ "14B690866ABD5BB88B5F4828C1490002E6773FA2FA299B8F", -+ "C302F41D932A36CDA7A3462F9E9E916B5BE8F1029AC4ACC1", -+ 1); -+ -+ add(KnownOIDs.brainpoolP224r1, P, -+ "D7C134AA264366862A18302575D1D787B09F075797DA89F57EC8C0FF", -+ "68A5E62CA9CE6C1C299803A6C1530B514E182AD8B0042A59CAD29F43", -+ "2580F63CCFE44138870713B1A92369E33E2135D266DBB372386C400B", -+ "0D9029AD2C7E5CF4340823B2A87DC68C9E4CE3174C1E6EFDEE12C07D", -+ "58AA56F772C0726F24C6B89E4ECDAC24354B9E99CAA3F6D3761402CD", -+ "D7C134AA264366862A18302575D0FB98D116BC4B6DDEBCA3A5A7939F", -+ 1); -+ -+ add(KnownOIDs.brainpoolP256r1, P, -+ "A9FB57DBA1EEA9BC3E660A909D838D726E3BF623D52620282013481D1F6E5377", -+ "7D5A0975FC2C3057EEF67530417AFFE7FB8055C126DC5C6CE94A4B44F330B5D9", -+ "26DC5C6CE94A4B44F330B5D9BBD77CBF958416295CF7E1CE6BCCDC18FF8C07B6", -+ "8BD2AEB9CB7E57CB2C4B482FFC81B7AFB9DE27E1E3BD23C23A4453BD9ACE3262", -+ "547EF835C3DAC4FD97F8461A14611DC9C27745132DED8E545C1D54C72F046997", -+ "A9FB57DBA1EEA9BC3E660A909D838D718C397AA3B561A6F7901E0E82974856A7", -+ 1); -+ -+ add(KnownOIDs.brainpoolP320r1, P, -+ "D35E472036BC4FB7E13C785ED201E065F98FCFA6F6F40DEF4F92B9EC7893EC28FCD412B1F1B32E27", -+ "3EE30B568FBAB0F883CCEBD46D3F3BB8A2A73513F5EB79DA66190EB085FFA9F492F375A97D860EB4", -+ "520883949DFDBC42D3AD198640688A6FE13F41349554B49ACC31DCCD884539816F5EB4AC8FB1F1A6", -+ "43BD7E9AFB53D8B85289BCC48EE5BFE6F20137D10A087EB6E7871E2A10A599C710AF8D0D39E20611", -+ "14FDD05545EC1CC8AB4093247F77275E0743FFED117182EAA9C77877AAAC6AC7D35245D1692E8EE1", -+ "D35E472036BC4FB7E13C785ED201E065F98FCFA5B68F12A32D482EC7EE8658E98691555B44C59311", -+ 1); -+ -+ add(KnownOIDs.brainpoolP384r1, P, -+ "8CB91E82A3386D280F5D6F7E50E641DF152F7109ED5456B412B1DA197FB71123ACD3A729901D1A71874700133107EC53", -+ "7BC382C63D8C150C3C72080ACE05AFA0C2BEA28E4FB22787139165EFBA91F90F8AA5814A503AD4EB04A8C7DD22CE2826", -+ "04A8C7DD22CE28268B39B55416F0447C2FB77DE107DCD2A62E880EA53EEB62D57CB4390295DBC9943AB78696FA504C11", -+ "1D1C64F068CF45FFA2A63A81B7C13F6B8847A3E77EF14FE3DB7FCAFE0CBD10E8E826E03436D646AAEF87B2E247D4AF1E", -+ "8ABE1D7520F9C2A45CB1EB8E95CFD55262B70B29FEEC5864E19C054FF99129280E4646217791811142820341263C5315", -+ "8CB91E82A3386D280F5D6F7E50E641DF152F7109ED5456B31F166E6CAC0425A7CF3AB6AF6B7FC3103B883202E9046565", -+ 1); -+ -+ add(KnownOIDs.brainpoolP512r1, P, -+ "AADD9DB8DBE9C48B3FD4E6AE33C9FC07CB308DB3B3C9D20ED6639CCA703308717D4D9B009BC66842AECDA12AE6A380E62881FF2F2D82C68528AA6056583A48F3", -+ "7830A3318B603B89E2327145AC234CC594CBDD8D3DF91610A83441CAEA9863BC2DED5D5AA8253AA10A2EF1C98B9AC8B57F1117A72BF2C7B9E7C1AC4D77FC94CA", -+ "3DF91610A83441CAEA9863BC2DED5D5AA8253AA10A2EF1C98B9AC8B57F1117A72BF2C7B9E7C1AC4D77FC94CADC083E67984050B75EBAE5DD2809BD638016F723", -+ "81AEE4BDD82ED9645A21322E9C4C6A9385ED9F70B5D916C1B43B62EEF4D0098EFF3B1F78E2D0D48D50D1687B93B97D5F7C6D5047406A5E688B352209BCB9F822", -+ "7DDE385D566332ECC0EABFA9CF7822FDF209F70024A57B1AA000C55B881F8111B2DCDE494A5F485E5BCA4BD88A2763AED1CA2B2FA8F0540678CD1E0F3AD80892", -+ "AADD9DB8DBE9C48B3FD4E6AE33C9FC07CB308DB3B3C9D20ED6639CCA70330870553E5C414CA92619418661197FAC10471DB1D381085DDADDB58796829CA90069", -+ 1); -+ - specCollection = Collections.unmodifiableCollection(oidMap.values()); - } - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c jdk17u-ls/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c ---- openjdk/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c 2022-10-13 03:49:19.000000000 +0800 -+++ jdk17u-ls/src/java.base/unix/native/libnio/fs/UnixNativeDispatcher.c 2023-09-08 09:39:51.293843258 +0800 -@@ -594,7 +594,15 @@ - JNU_ThrowInternalError(env, "should not reach here"); - return; - } -+ -+#ifdef __mips__ -+ // __NR_newfstatat is incorrect on Loongnix -+ // workaround it using glibc's fstatat64 -+ RESTARTABLE(fstatat64((int)dfd, path, &buf, (int)flag), err); -+#else - RESTARTABLE((*my_fstatat64_func)((int)dfd, path, &buf, (int)flag), err); -+#endif -+ - if (err == -1) { - throwUnixException(env, errno); - } else { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java jdk17u-ls/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java ---- openjdk/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java 2022-10-13 03:49:24.000000000 +0800 -+++ jdk17u-ls/src/java.xml.crypto/share/classes/com/sun/org/apache/xml/internal/security/algorithms/implementations/ECDSAUtils.java 2023-09-08 09:39:52.137844368 +0800 -@@ -171,6 +171,149 @@ - static { - ecCurveDefinitions.add( - new ECCurveDefinition( -+ "secp112r1", -+ "1.3.132.0.6", -+ "db7c2abf62e35e668076bead208b", -+ "db7c2abf62e35e668076bead2088", -+ "659ef8ba043916eede8911702b22", -+ "09487239995a5ee76b55f9c2f098", -+ "a89ce5af8724c0a23e0e0ff77500", -+ "db7c2abf62e35e7628dfac6561c5", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp112r2", -+ "1.3.132.0.7", -+ "db7c2abf62e35e668076bead208b", -+ "6127c24c05f38a0aaaf65c0ef02c", -+ "51def1815db5ed74fcc34c85d709", -+ "4ba30ab5e892b4e1649dd0928643", -+ "adcd46f5882e3747def36e956e97", -+ "36df0aafd8b8d7597ca10520d04b", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp128r1", -+ "1.3.132.0.28", -+ "fffffffdffffffffffffffffffffffff", -+ "fffffffdfffffffffffffffffffffffc", -+ "e87579c11079f43dd824993c2cee5ed3", -+ "161ff7528b899b2d0c28607ca52c5b86", -+ "cf5ac8395bafeb13c02da292dded7a83", -+ "fffffffe0000000075a30d1b9038a115", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp128r2", -+ "1.3.132.0.29", -+ "fffffffdffffffffffffffffffffffff", -+ "d6031998d1b3bbfebf59cc9bbff9aee1", -+ "5eeefca380d02919dc2c6558bb6d8a5d", -+ "7b6aa5d85e572983e6fb32a7cdebc140", -+ "27b6916a894d3aee7106fe805fc34b44", -+ "3fffffff7fffffffbe0024720613b5a3", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp160k1", -+ "1.3.132.0.9", -+ "fffffffffffffffffffffffffffffffeffffac73", -+ "0000000000000000000000000000000000000000", -+ "0000000000000000000000000000000000000007", -+ "3b4c382ce37aa192a4019e763036f4f5dd4d7ebb", -+ "938cf935318fdced6bc28286531733c3f03c4fee", -+ "0100000000000000000001b8fa16dfab9aca16b6b3", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp160r1", -+ "1.3.132.0.8", -+ "ffffffffffffffffffffffffffffffff7fffffff", -+ "ffffffffffffffffffffffffffffffff7ffffffc", -+ "1c97befc54bd7a8b65acf89f81d4d4adc565fa45", -+ "4a96b5688ef573284664698968c38bb913cbfc82", -+ "23a628553168947d59dcc912042351377ac5fb32", -+ "0100000000000000000001f4c8f927aed3ca752257", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp160r2", -+ "1.3.132.0.30", -+ "fffffffffffffffffffffffffffffffeffffac73", -+ "fffffffffffffffffffffffffffffffeffffac70", -+ "b4e134d3fb59eb8bab57274904664d5af50388ba", -+ "52dcb034293a117e1f4ff11b30f7199d3144ce6d", -+ "feaffef2e331f296e071fa0df9982cfea7d43f2e", -+ "0100000000000000000000351ee786a818f3a1a16b", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp192k1", -+ "1.3.132.0.31", -+ "fffffffffffffffffffffffffffffffffffffffeffffee37", -+ "000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000003", -+ "db4ff10ec057e9ae26b07d0280b7f4341da5d1b1eae06c7d", -+ "9b2f2f6d9c5628a7844163d015be86344082aa88d95e2f9d", -+ "fffffffffffffffffffffffe26f2fc170f69466a74defd8d", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp192r1 [NIST P-192, X9.62 prime192v1]", -+ "1.2.840.10045.3.1.1", -+ "fffffffffffffffffffffffffffffffeffffffffffffffff", -+ "fffffffffffffffffffffffffffffffefffffffffffffffc", -+ "64210519e59c80e70fa7e9ab72243049feb8deecc146b9b1", -+ "188da80eb03090f67cbf20eb43a18800f4ff0afd82ff1012", -+ "07192b95ffc8da78631011ed6b24cdd573f977a11e794811", -+ "ffffffffffffffffffffffff99def836146bc9b1b4d22831", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp224k1", -+ "1.3.132.0.32", -+ "fffffffffffffffffffffffffffffffffffffffffffffffeffffe56d", -+ "00000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000005", -+ "a1455b334df099df30fc28a169a467e9e47075a90f7e650eb6b7a45c", -+ "7e089fed7fba344282cafbd6f7e319f7c0b0bd59e2ca4bdb556d61a5", -+ "010000000000000000000000000001dce8d2ec6184caf0a971769fb1f7", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "secp224r1 [NIST P-224]", -+ "1.3.132.0.33", -+ "ffffffffffffffffffffffffffffffff000000000000000000000001", -+ "fffffffffffffffffffffffffffffffefffffffffffffffffffffffe", -+ "b4050a850c04b3abf54132565044b0b7d7bfd8ba270b39432355ffb4", -+ "b70e0cbd6bb4bf7f321390b94a03c1d356c21122343280d6115c1d21", -+ "bd376388b5f723fb4c22dfe6cd4375a05a07476444d5819985007e34", -+ "ffffffffffffffffffffffffffff16a2e0b8f03e13dd29455c5c2a3d", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( - "secp256k1", - "1.3.132.0.10", - "fffffffffffffffffffffffffffffffffffffffffffffffffffffffefffffc2f", -@@ -220,6 +363,409 @@ - "01fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffa51868783bf2f966b7fcc0148f709a5d03bb5c9b8899c47aebb6fb71e91386409", - 1) - ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime192v2", -+ "1.2.840.10045.3.1.2", -+ "fffffffffffffffffffffffffffffffeffffffffffffffff", -+ "fffffffffffffffffffffffffffffffefffffffffffffffc", -+ "cc22d6dfb95c6b25e49c0d6364a4e5980c393aa21668d953", -+ "eea2bae7e1497842f2de7769cfe9c989c072ad696f48034a", -+ "6574d11d69b6ec7a672bb82a083df2f2b0847de970b2de15", -+ "fffffffffffffffffffffffe5fb1a724dc80418648d8dd31", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime192v3", -+ "1.2.840.10045.3.1.3", -+ "fffffffffffffffffffffffffffffffeffffffffffffffff", -+ "fffffffffffffffffffffffffffffffefffffffffffffffc", -+ "22123dc2395a05caa7423daeccc94760a7d462256bd56916", -+ "7d29778100c65a1da1783716588dce2b8b4aee8e228f1896", -+ "38a90f22637337334b49dcb66a6dc8f9978aca7648a943b0", -+ "ffffffffffffffffffffffff7a62d031c83f4294f640ec13", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime239v1", -+ "1.2.840.10045.3.1.4", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007fffffffffff", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007ffffffffffc", -+ "6b016c3bdcf18941d0d654921475ca71a9db2fb27d1d37796185c2942c0a", -+ "0ffa963cdca8816ccc33b8642bedf905c3d358573d3f27fbbd3b3cb9aaaf", -+ "7debe8e4e90a5dae6e4054ca530ba04654b36818ce226b39fccb7b02f1ae", -+ "7fffffffffffffffffffffff7fffff9e5e9a9f5d9071fbd1522688909d0b", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime239v2", -+ "1.2.840.10045.3.1.5", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007fffffffffff", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007ffffffffffc", -+ "617fab6832576cbbfed50d99f0249c3fee58b94ba0038c7ae84c8c832f2c", -+ "38af09d98727705120c921bb5e9e26296a3cdcf2f35757a0eafd87b830e7", -+ "5b0125e4dbea0ec7206da0fc01d9b081329fb555de6ef460237dff8be4ba", -+ "7fffffffffffffffffffffff800000cfa7e8594377d414c03821bc582063", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 prime239v3", -+ "1.2.840.10045.3.1.6", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007fffffffffff", -+ "7fffffffffffffffffffffff7fffffffffff8000000000007ffffffffffc", -+ "255705fa2a306654b1f4cb03d6a750a30c250102d4988717d9ba15ab6d3e", -+ "6768ae8e18bb92cfcf005c949aa2c6d94853d0e660bbf854b1c9505fe95a", -+ "1607e6898f390c06bc1d552bad226f3b6fcfe48b6e818499af18e3ed6cf3", -+ "7fffffffffffffffffffffff7fffff975deb41b3a6057c3c432146526551", -+ 1) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect113r1", -+ "1.3.132.0.4", -+ "020000000000000000000000000201", -+ "003088250ca6e7c7fe649ce85820f7", -+ "00e8bee4d3e2260744188be0e9c723", -+ "009d73616f35f4ab1407d73562c10f", -+ "00a52830277958ee84d1315ed31886", -+ "0100000000000000d9ccec8a39e56f", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect113r2", -+ "1.3.132.0.5", -+ "020000000000000000000000000201", -+ "00689918dbec7e5a0dd6dfc0aa55c7", -+ "0095e9a9ec9b297bd4bf36e059184f", -+ "01a57a6a7b26ca5ef52fcdb8164797", -+ "00b3adc94ed1fe674c06e695baba1d", -+ "010000000000000108789b2496af93", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect131r1", -+ "1.3.132.0.22", -+ "080000000000000000000000000000010d", -+ "07a11b09a76b562144418ff3ff8c2570b8", -+ "0217c05610884b63b9c6c7291678f9d341", -+ "0081baf91fdf9833c40f9c181343638399", -+ "078c6e7ea38c001f73c8134b1b4ef9e150", -+ "0400000000000000023123953a9464b54d", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect131r2", -+ "1.3.132.0.23", -+ "080000000000000000000000000000010d", -+ "03e5a88919d7cafcbf415f07c2176573b2", -+ "04b8266a46c55657ac734ce38f018f2192", -+ "0356dcd8f2f95031ad652d23951bb366a8", -+ "0648f06d867940a5366d9e265de9eb240f", -+ "0400000000000000016954a233049ba98f", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect163k1 [NIST K-163]", -+ "1.3.132.0.1", -+ "0800000000000000000000000000000000000000c9", -+ "000000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000001", -+ "02fe13c0537bbc11acaa07d793de4e6d5e5c94eee8", -+ "0289070fb05d38ff58321f2e800536d538ccdaa3d9", -+ "04000000000000000000020108a2e0cc0d99f8a5ef", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect163r1", -+ "1.3.132.0.2", -+ "0800000000000000000000000000000000000000c9", -+ "07b6882caaefa84f9554ff8428bd88e246d2782ae2", -+ "0713612dcddcb40aab946bda29ca91f73af958afd9", -+ "0369979697ab43897789566789567f787a7876a654", -+ "00435edb42efafb2989d51fefce3c80988f41ff883", -+ "03ffffffffffffffffffff48aab689c29ca710279b", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect163r2 [NIST B-163]", -+ "1.3.132.0.15", -+ "0800000000000000000000000000000000000000c9", -+ "000000000000000000000000000000000000000001", -+ "020a601907b8c953ca1481eb10512f78744a3205fd", -+ "03f0eba16286a2d57ea0991168d4994637e8343e36", -+ "00d51fbc6c71a0094fa2cdd545b11c5c0c797324f1", -+ "040000000000000000000292fe77e70c12a4234c33", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect193r1", -+ "1.3.132.0.24", -+ "02000000000000000000000000000000000000000000008001", -+ "0017858feb7a98975169e171f77b4087de098ac8a911df7b01", -+ "00fdfb49bfe6c3a89facadaa7a1e5bbc7cc1c2e5d831478814", -+ "01f481bc5f0ff84a74ad6cdf6fdef4bf6179625372d8c0c5e1", -+ "0025e399f2903712ccf3ea9e3a1ad17fb0b3201b6af7ce1b05", -+ "01000000000000000000000000c7f34a778f443acc920eba49", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect193r2", -+ "1.3.132.0.25", -+ "02000000000000000000000000000000000000000000008001", -+ "0163f35a5137c2ce3ea6ed8667190b0bc43ecd69977702709b", -+ "00c9bb9e8927d4d64c377e2ab2856a5b16e3efb7f61d4316ae", -+ "00d9b67d192e0367c803f39e1a7e82ca14a651350aae617e8f", -+ "01ce94335607c304ac29e7defbd9ca01f596f927224cdecf6c", -+ "010000000000000000000000015aab561b005413ccd4ee99d5", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect233k1 [NIST K-233]", -+ "1.3.132.0.26", -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "017232ba853a7e731af129f22ff4149563a419c26bf50a4c9d6eefad6126", -+ "01db537dece819b7f70f555a67c427a8cd9bf18aeb9b56e0c11056fae6a3", -+ "008000000000000000000000000000069d5bb915bcd46efb1ad5f173abdf", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect233r1 [NIST B-233]", -+ "1.3.132.0.27", -+ "020000000000000000000000000000000000000004000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "0066647ede6c332c7f8c0923bb58213b333b20e9ce4281fe115f7d8f90ad", -+ "00fac9dfcbac8313bb2139f1bb755fef65bc391f8b36f8f8eb7371fd558b", -+ "01006a08a41903350678e58528bebf8a0beff867a7ca36716f7e01f81052", -+ "01000000000000000000000000000013e974e72f8a6922031d2603cfe0d7", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect239k1", -+ "1.3.132.0.3", -+ "800000000000000000004000000000000000000000000000000000000001", -+ "000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000001", -+ "29a0b6a887a983e9730988a68727a8b2d126c44cc2cc7b2a6555193035dc", -+ "76310804f12e549bdb011c103089e73510acb275fc312a5dc6b76553f0ca", -+ "2000000000000000000000000000005a79fec67cb6e91f1c1da800e478a5", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect283k1 [NIST K-283]", -+ "1.3.132.0.16", -+ "0800000000000000000000000000000000000000000000000000000000000000000010a1", -+ "000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0503213f78ca44883f1a3b8162f188e553cd265f23c1567a16876913b0c2ac2458492836", -+ "01ccda380f1c9e318d90f95d07e5426fe87e45c0e8184698e45962364e34116177dd2259", -+ "01ffffffffffffffffffffffffffffffffffe9ae2ed07577265dff7f94451e061e163c61", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect283r1 [NIST B-283]", -+ "1.3.132.0.17", -+ "0800000000000000000000000000000000000000000000000000000000000000000010a1", -+ "000000000000000000000000000000000000000000000000000000000000000000000001", -+ "027b680ac8b8596da5a4af8a19a0303fca97fd7645309fa2a581485af6263e313b79a2f5", -+ "05f939258db7dd90e1934f8c70b0dfec2eed25b8557eac9c80e2e198f8cdbecd86b12053", -+ "03676854fe24141cb98fe6d4b20d02b4516ff702350eddb0826779c813f0df45be8112f4", -+ "03ffffffffffffffffffffffffffffffffffef90399660fc938a90165b042a7cefadb307", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect409k1 [NIST K-409]", -+ "1.3.132.0.36", -+ "02000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000001", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0060f05f658f49c1ad3ab1890f7184210efd0987e307c84c27accfb8f9f67cc2c460189eb5aaaa62ee222eb1b35540cfe9023746", -+ "01e369050b7c4e42acba1dacbf04299c3460782f918ea427e6325165e9ea10e3da5f6c42e9c55215aa9ca27a5863ec48d8e0286b", -+ "007ffffffffffffffffffffffffffffffffffffffffffffffffffe5f83b2d4ea20400ec4557d5ed3e3e7ca5b4b5c83b8e01e5fcf", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect409r1 [NIST B-409]", -+ "1.3.132.0.37", -+ "02000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000001", -+ "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "0021a5c2c8ee9feb5c4b9a753b7b476b7fd6422ef1f3dd674761fa99d6ac27c8a9a197b272822f6cd57a55aa4f50ae317b13545f", -+ "015d4860d088ddb3496b0c6064756260441cde4af1771d4db01ffe5b34e59703dc255a868a1180515603aeab60794e54bb7996a7", -+ "0061b1cfab6be5f32bbfa78324ed106a7636b9c5a7bd198d0158aa4f5488d08f38514f1fdf4b4f40d2181b3681c364ba0273c706", -+ "010000000000000000000000000000000000000000000000000001e2aad6a612f33307be5fa47c3c9e052f838164cd37d9a21173", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect571k1 [NIST K-571]", -+ "1.3.132.0.38", -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "026eb7a859923fbc82189631f8103fe4ac9ca2970012d5d46024804801841ca44370958493b205e647da304db4ceb08cbbd1ba39494776fb988b47174dca88c7e2945283a01c8972", -+ "0349dc807f4fbf374f4aeade3bca95314dd58cec9f307a54ffc61efc006d8a2c9d4979c0ac44aea74fbebbb9f772aedcb620b01a7ba7af1b320430c8591984f601cd4c143ef1c7a3", -+ "020000000000000000000000000000000000000000000000000000000000000000000000131850e1f19a63e4b391a8db917f4138b630d84be5d639381e91deb45cfe778f637c1001", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "sect571r1 [NIST B-571]", -+ "1.3.132.0.39", -+ "080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425", -+ "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001", -+ "02f40e7e2221f295de297117b7f3d62f5c6a97ffcb8ceff1cd6ba8ce4a9a18ad84ffabbd8efa59332be7ad6756a66e294afd185a78ff12aa520e4de739baca0c7ffeff7f2955727a", -+ "0303001d34b856296c16c0d40d3cd7750a93d1d2955fa80aa5f40fc8db7b2abdbde53950f4c0d293cdd711a35b67fb1499ae60038614f1394abfa3b4c850d927e1e7769c8eec2d19", -+ "037bf27342da639b6dccfffeb73d69d78c6c27a6009cbbca1980f8533921e8a684423e43bab08a576291af8f461bb2a8b3531d2f0485c19b16e2f1516e23dd3c1a4827af1b8ac15b", -+ "03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe661ce18ff55987308059b186823851ec7dd9ca1161de93d5174d66e8382e9bb2fe84e47", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb191v1", -+ "1.2.840.10045.3.0.5", -+ "800000000000000000000000000000000000000000000201", -+ "2866537b676752636a68f56554e12640276b649ef7526267", -+ "2e45ef571f00786f67b0081b9495a3d95462f5de0aa185ec", -+ "36b3daf8a23206f9c4f299d7b21a9c369137f2c84ae1aa0d", -+ "765be73433b3f95e332932e70ea245ca2418ea0ef98018fb", -+ "40000000000000000000000004a20e90c39067c893bbb9a5", -+ 2) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb191v2", -+ "1.2.840.10045.3.0.6", -+ "800000000000000000000000000000000000000000000201", -+ "401028774d7777c7b7666d1366ea432071274f89ff01e718", -+ "0620048d28bcbd03b6249c99182b7c8cd19700c362c46a01", -+ "3809b2b7cc1b28cc5a87926aad83fd28789e81e2c9e3bf10", -+ "17434386626d14f3dbf01760d9213a3e1cf37aec437d668a", -+ "20000000000000000000000050508cb89f652824e06b8173", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb191v3", -+ "1.2.840.10045.3.0.7", -+ "800000000000000000000000000000000000000000000201", -+ "6c01074756099122221056911c77d77e77a777e7e7e77fcb", -+ "71fe1af926cf847989efef8db459f66394d90f32ad3f15e8", -+ "375d4ce24fde434489de8746e71786015009e66e38a926dd", -+ "545a39176196575d985999366e6ad34ce0a77cd7127b06be", -+ "155555555555555555555555610c0b196812bfb6288a3ea3", -+ 6) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb239v1", -+ "1.2.840.10045.3.0.11", -+ "800000000000000000000000000000000000000000000000001000000001", -+ "32010857077c5431123a46b808906756f543423e8d27877578125778ac76", -+ "790408f2eedaf392b012edefb3392f30f4327c0ca3f31fc383c422aa8c16", -+ "57927098fa932e7c0a96d3fd5b706ef7e5f5c156e16b7e7c86038552e91d", -+ "61d8ee5077c33fecf6f1a16b268de469c3c7744ea9a971649fc7a9616305", -+ "2000000000000000000000000000000f4d42ffe1492a4993f1cad666e447", -+ 4) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb239v2", -+ "1.2.840.10045.3.0.12", -+ "800000000000000000000000000000000000000000000000001000000001", -+ "4230017757a767fae42398569b746325d45313af0766266479b75654e65f", -+ "5037ea654196cff0cd82b2c14a2fcf2e3ff8775285b545722f03eacdb74b", -+ "28f9d04e900069c8dc47a08534fe76d2b900b7d7ef31f5709f200c4ca205", -+ "5667334c45aff3b5a03bad9dd75e2c71a99362567d5453f7fa6e227ec833", -+ "1555555555555555555555555555553c6f2885259c31e3fcdf154624522d", -+ 6) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb239v3", -+ "1.2.840.10045.3.0.13", -+ "800000000000000000000000000000000000000000000000001000000001", -+ "01238774666a67766d6676f778e676b66999176666e687666d8766c66a9f", -+ "6a941977ba9f6a435199acfc51067ed587f519c5ecb541b8e44111de1d40", -+ "70f6e9d04d289c4e89913ce3530bfde903977d42b146d539bf1bde4e9c92", -+ "2e5a0eaf6e5e1305b9004dce5c0ed7fe59a35608f33837c816d80b79f461", -+ "0cccccccccccccccccccccccccccccac4912d2d9df903ef9888b8a0e4cff", -+ 0xA) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb359v1", -+ "1.2.840.10045.3.0.18", -+ "800000000000000000000000000000000000000000000000000000000000000000000000100000000000000001", -+ "5667676a654b20754f356ea92017d946567c46675556f19556a04616b567d223a5e05656fb549016a96656a557", -+ "2472e2d0197c49363f1fe7f5b6db075d52b6947d135d8ca445805d39bc345626089687742b6329e70680231988", -+ "3c258ef3047767e7ede0f1fdaa79daee3841366a132e163aced4ed2401df9c6bdcde98e8e707c07a2239b1b097", -+ "53d7e08529547048121e9c95f3791dd804963948f34fae7bf44ea82365dc7868fe57e4ae2de211305a407104bd", -+ "01af286bca1af286bca1af286bca1af286bca1af286bc9fb8f6b85c556892c20a7eb964fe7719e74f490758d3b", -+ 0x4C) -+ ); -+ -+ ecCurveDefinitions.add( -+ new ECCurveDefinition( -+ "X9.62 c2tnb431r1", -+ "1.2.840.10045.3.0.20", -+ "800000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000001", -+ "1a827ef00dd6fc0e234caf046c6a5d8a85395b236cc4ad2cf32a0cadbdc9ddf620b0eb9906d0957f6c6feacd615468df104de296cd8f", -+ "10d9b4a3d9047d8b154359abfb1b7f5485b04ceb868237ddc9deda982a679a5a919b626d4e50a8dd731b107a9962381fb5d807bf2618", -+ "120fc05d3c67a99de161d2f4092622feca701be4f50f4758714e8a87bbf2a658ef8c21e7c5efe965361f6c2999c0c247b0dbd70ce6b7", -+ "20d0af8903a96f8d5fa2c255745d3c451b302c9346d9b7e485e7bce41f6b591f3e8f6addcbb0bc4c2f947a7de1a89b625d6a598b3760", -+ "0340340340340340340340340340340340340340340340340340340323c313fab50589703b5ec68d3587fec60d161cc149c1ad4a91", -+ 0x2760) -+ ); - } - - public static String getOIDFromPublicKey(ECPublicKey ecPublicKey) { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h jdk17u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h ---- openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h 2023-11-01 10:27:44.897761587 +0800 -@@ -22,6 +22,13 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ * -+ */ -+ - #ifndef _LIBPROC_H_ - #define _LIBPROC_H_ - -@@ -37,13 +44,17 @@ - #include - #define user_regs_struct pt_regs - #endif --#if defined(aarch64) || defined(arm64) -+#if defined(aarch64) || defined(arm64) || defined(loongarch64) - #include - #define user_regs_struct user_pt_regs - #elif defined(arm) - #include - #define user_regs_struct pt_regs - #endif -+#if defined(mips) || defined(mipsel) || defined(mips64) || defined(mips64el) -+#include -+#define user_regs_struct pt_regs -+#endif - - // This C bool type must be int for compatibility with Linux calls and - // it would be a mistake to equivalence it to C++ bool on many platforms -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp jdk17u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp ---- openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp 2023-11-01 10:27:44.897761587 +0800 +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp b/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp +index 9accba375..200bb1e82 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp @@ -23,6 +23,13 @@ * */ @@ -117813,8 +115864,8 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linu #include #include "libproc.h" #include "proc_service.h" -@@ -60,6 +67,10 @@ - #include "sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext.h" +@@ -64,6 +71,10 @@ + #include "sun_jvm_hotspot_debugger_riscv64_RISCV64ThreadContext.h" #endif +#ifdef loongarch64 @@ -117824,18 +115875,18 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linu class AutoJavaString { JNIEnv* m_env; jstring m_str; -@@ -408,7 +419,7 @@ +@@ -412,7 +423,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo return (err == PS_OK)? array : 0; } --#if defined(i586) || defined(amd64) || defined(ppc64) || defined(ppc64le) || defined(aarch64) -+#if defined(i586) || defined(amd64) || defined(ppc64) || defined(ppc64le) || defined(aarch64) || defined(loongarch64) +-#if defined(i586) || defined(amd64) || defined(ppc64) || defined(ppc64le) || defined(aarch64) || defined(riscv64) ++#if defined(i586) || defined(amd64) || defined(ppc64) || defined(ppc64le) || defined(aarch64) || defined(riscv64) || defined(loongarch64) extern "C" JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0 (JNIEnv *env, jobject this_obj, jint lwp_id) { -@@ -440,6 +451,9 @@ - #ifdef aarch64 - #define NPRGREG sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext_NPRGREG +@@ -447,6 +458,9 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo + #ifdef riscv64 + #define NPRGREG sun_jvm_hotspot_debugger_riscv64_RISCV64ThreadContext_NPRGREG #endif +#ifdef loongarch64 +#define NPRGREG sun_jvm_hotspot_debugger_loongarch64_LOONGARCH64ThreadContext_NPRGREG @@ -117843,9 +115894,9 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linu #if defined(ppc64) || defined(ppc64le) #define NPRGREG sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext_NPRGREG #endif -@@ -516,6 +530,18 @@ - } - #endif /* aarch64 */ +@@ -561,6 +575,18 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo + + #endif /* riscv64 */ +#if defined(loongarch64) + @@ -117862,9 +115913,48 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linu #if defined(ppc64) || defined(ppc64le) #define REG_INDEX(reg) sun_jvm_hotspot_debugger_ppc64_PPC64ThreadContext_##reg -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c jdk17u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c ---- openjdk/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c 2023-09-08 09:39:52.505844851 +0800 +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h +index a69496e77..64312b470 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h +@@ -22,6 +22,13 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ * ++ */ ++ + #ifndef _LIBPROC_H_ + #define _LIBPROC_H_ + +@@ -37,7 +44,7 @@ + #include + #define user_regs_struct pt_regs + #endif +-#if defined(aarch64) || defined(arm64) ++#if defined(aarch64) || defined(arm64) || defined(loongarch64) + #include + #define user_regs_struct user_pt_regs + #elif defined(arm) +@@ -46,6 +53,10 @@ + #elif defined(riscv64) + #include + #endif ++#if defined(mips) || defined(mipsel) || defined(mips64) || defined(mips64el) ++#include ++#define user_regs_struct pt_regs ++#endif + + // This C bool type must be int for compatibility with Linux calls and + // it would be a mistake to equivalence it to C++ bool on many platforms +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c +index 3068f4756..d35cc7322 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c @@ -22,6 +22,12 @@ * */ @@ -117878,18 +115968,150 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/linu #include #include #include -@@ -138,7 +144,7 @@ - #define PTRACE_GETREGS_REQ PT_GETREGS - #endif - --#ifdef PTRACE_GETREGS_REQ -+#if defined(PTRACE_GETREGS_REQ) && !defined(loongarch64) - if (ptrace_getregs(PTRACE_GETREGS_REQ, pid, user, NULL) < 0) { +@@ -143,7 +149,7 @@ static bool process_get_lwp_regs(struct ps_prochandle* ph, pid_t pid, struct use + return false; + } + return true; +-#elif defined(PTRACE_GETREGS_REQ) ++#elif defined(PTRACE_GETREGS_REQ) && !defined(loongarch64) + if (ptrace(PTRACE_GETREGS_REQ, pid, NULL, user) < 0) { print_debug("ptrace(PTRACE_GETREGS, ...) failed for lwp(%d) errno(%d) \"%s\"\n", pid, errno, strerror(errno)); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2023-11-01 10:27:44.901761592 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java +index e0e9b4b67..9af1218ed 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java +@@ -23,6 +23,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2021. These ++ * modifications are Copyright (c) 2018, 2021, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ * ++ */ + package sun.jvm.hotspot; + + import java.rmi.RemoteException; +@@ -38,6 +44,8 @@ import sun.jvm.hotspot.debugger.MachineDescriptionPPC64; + import sun.jvm.hotspot.debugger.MachineDescriptionAArch64; + import sun.jvm.hotspot.debugger.MachineDescriptionRISCV64; + import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; ++import sun.jvm.hotspot.debugger.MachineDescriptionMIPS64; ++import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; + import sun.jvm.hotspot.debugger.NoSuchSymbolException; + import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; + import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; +@@ -572,6 +580,10 @@ public class HotSpotAgent { + machDesc = new MachineDescriptionAArch64(); + } else if (cpu.equals("riscv64")) { + machDesc = new MachineDescriptionRISCV64(); ++ } else if (cpu.equals("mips64")) { ++ machDesc = new MachineDescriptionMIPS64(); ++ } else if (cpu.equals("loongarch64")) { ++ machDesc = new MachineDescriptionLOONGARCH64(); + } else { + try { + machDesc = (MachineDescription) +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +new file mode 100644 +index 000000000..99cea8c7f +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger; ++ ++public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; ++ } ++ ++ ++ public boolean isBigEndian() { ++ return false; ++ } ++ ++ public boolean isLP64() { ++ return true; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java +new file mode 100644 +index 000000000..1b49efd20 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger; ++ ++public class MachineDescriptionMIPS64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; ++ } ++ ++ ++ public boolean isBigEndian() { ++ return "big".equals(System.getProperty("sun.cpu.endian")); ++ } ++ ++ public boolean isLP64() { ++ return true; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java +index 469bb6e06..ea3a118de 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java @@ -23,6 +23,12 @@ * */ @@ -117903,10 +116125,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.debugger.linux; import java.io.*; -@@ -33,11 +39,15 @@ - import sun.jvm.hotspot.debugger.x86.*; +@@ -34,12 +40,16 @@ import sun.jvm.hotspot.debugger.x86.*; import sun.jvm.hotspot.debugger.amd64.*; import sun.jvm.hotspot.debugger.aarch64.*; + import sun.jvm.hotspot.debugger.riscv64.*; +import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.loongarch64.*; import sun.jvm.hotspot.debugger.ppc64.*; @@ -117914,12 +116136,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar import sun.jvm.hotspot.debugger.linux.amd64.*; import sun.jvm.hotspot.debugger.linux.ppc64.*; import sun.jvm.hotspot.debugger.linux.aarch64.*; + import sun.jvm.hotspot.debugger.linux.riscv64.*; +import sun.jvm.hotspot.debugger.linux.mips64.*; +import sun.jvm.hotspot.debugger.linux.loongarch64.*; import sun.jvm.hotspot.utilities.*; class LinuxCDebugger implements CDebugger { -@@ -91,7 +101,21 @@ +@@ -93,7 +103,21 @@ class LinuxCDebugger implements CDebugger { Address pc = context.getRegisterAsAddress(AMD64ThreadContext.RIP); if (pc == null) return null; return LinuxAMD64CFrame.getTopFrame(dbg, pc, context); @@ -117942,9 +116165,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar PPC64ThreadContext context = (PPC64ThreadContext) thread.getContext(); Address sp = context.getRegisterAsAddress(PPC64ThreadContext.SP); if (sp == null) return null; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java +index 69a34fe2a..c21e0d6a6 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java @@ -22,6 +22,12 @@ * */ @@ -117958,7 +116182,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.debugger.linux; import java.lang.reflect.*; -@@ -29,6 +35,8 @@ +@@ -29,6 +35,8 @@ import sun.jvm.hotspot.debugger.*; import sun.jvm.hotspot.debugger.linux.amd64.*; import sun.jvm.hotspot.debugger.linux.x86.*; import sun.jvm.hotspot.debugger.linux.ppc64.*; @@ -117967,7 +116191,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar class LinuxThreadContextFactory { static ThreadContext createThreadContext(LinuxDebugger dbg) { -@@ -37,7 +45,11 @@ +@@ -37,7 +45,11 @@ class LinuxThreadContextFactory { return new LinuxX86ThreadContext(dbg); } else if (cpu.equals("amd64")) { return new LinuxAMD64ThreadContext(dbg); @@ -117980,9 +116204,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar return new LinuxPPC64ThreadContext(dbg); } else { try { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java +new file mode 100644 +index 000000000..0e6caee5a +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -118076,9 +116302,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + private Address fp; + private LinuxDebugger dbg; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..604642598 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -118127,9 +116355,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java +new file mode 100644 +index 000000000..2e3eb564d +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64CFrame.java @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -118211,9 +116441,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + private Address ebp; + private LinuxDebugger dbg; +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java +new file mode 100644 +index 000000000..98e0f3f0b +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/mips64/LinuxMIPS64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -118262,9 +116494,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..1de3cb1a4 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -118394,99 +116628,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + tie the implementation to, for example, the debugging system */ + public abstract Address getRegisterAsAddress(int index); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 2023-09-08 09:39:52.517844867 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; -+ -+public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; -+ } -+ -+ -+ public boolean isBigEndian() { -+ return false; -+ } -+ -+ public boolean isLP64() { -+ return true; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionMIPS64.java 2023-09-08 09:39:52.517844867 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; -+ -+public class MachineDescriptionMIPS64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; -+ } -+ -+ -+ public boolean isBigEndian() { -+ return "big".equals(System.getProperty("sun.cpu.endian")); -+ } -+ -+ public boolean isLP64() { -+ return true; -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java 2023-09-08 09:39:52.525844878 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java +new file mode 100644 +index 000000000..d3479a65e +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/mips64/MIPS64ThreadContext.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -118616,9 +116762,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + tie the implementation to, for example, the debugging system */ + public abstract Address getRegisterAsAddress(int index); +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java +index 7113a3a49..de47531db 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java @@ -22,6 +22,12 @@ * */ @@ -118632,7 +116779,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.debugger.posix.elf; import java.io.FileInputStream; -@@ -63,6 +69,8 @@ +@@ -63,6 +69,8 @@ public interface ELFHeader { public static final int ARCH_i860 = 7; /** MIPS architecture type. */ public static final int ARCH_MIPS = 8; @@ -118641,9 +116788,109 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar /** Returns a file type which is defined by the file type constants. */ public short getFileType(); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java +new file mode 100644 +index 000000000..1f60fa6cf +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java +@@ -0,0 +1,92 @@ ++/* ++ * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger.proc.loongarch64; ++ ++import sun.jvm.hotspot.debugger.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.proc.*; ++import sun.jvm.hotspot.utilities.*; ++ ++public class ProcLOONGARCH64Thread implements ThreadProxy { ++ private ProcDebugger debugger; ++ private int id; ++ ++ public ProcLOONGARCH64Thread(ProcDebugger debugger, Address addr) { ++ this.debugger = debugger; ++ ++ // FIXME: the size here should be configurable. However, making it ++ // so would produce a dependency on the "types" package from the ++ // debugger package, which is not desired. ++ this.id = (int) addr.getCIntegerAt(0, 4, true); ++ } ++ ++ public ProcLOONGARCH64Thread(ProcDebugger debugger, long id) { ++ this.debugger = debugger; ++ this.id = (int) id; ++ } ++ ++ public ThreadContext getContext() throws IllegalThreadStateException { ++ ProcLOONGARCH64ThreadContext context = new ProcLOONGARCH64ThreadContext(debugger); ++ long[] regs = debugger.getThreadIntegerRegisterSet(id); ++ /* ++ _NGREG in reg.h is defined to be 19. Because we have included ++ debug registers LOONGARCH64ThreadContext.NPRGREG is 25. ++ */ ++ ++ if (Assert.ASSERTS_ENABLED) { ++ Assert.that(regs.length <= LOONGARCH64ThreadContext.NPRGREG, "size of register set is greater than " + LOONGARCH64ThreadContext.NPRGREG); ++ } ++ for (int i = 0; i < regs.length; i++) { ++ context.setRegister(i, regs[i]); ++ } ++ return context; ++ } ++ ++ public boolean canSetContext() throws DebuggerException { ++ return false; ++ } ++ ++ public void setContext(ThreadContext context) ++ throws IllegalThreadStateException, DebuggerException { ++ throw new DebuggerException("Unimplemented"); ++ } ++ ++ public String toString() { ++ return "t@" + id; ++ } ++ ++ public boolean equals(Object obj) { ++ if ((obj == null) || !(obj instanceof ProcLOONGARCH64Thread)) { ++ return false; ++ } ++ ++ return (((ProcLOONGARCH64Thread) obj).id == id); ++ } ++ ++ public int hashCode() { ++ return id; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..ef5597ac4 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. @@ -118692,9 +116939,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java +new file mode 100644 +index 000000000..abad1bb38 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -118741,13 +116990,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return new ProcLOONGARCH64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/loongarch64/ProcLOONGARCH64Thread.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java +new file mode 100644 +index 000000000..5c1e0be89 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -118770,18 +117021,18 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * + */ + -+package sun.jvm.hotspot.debugger.proc.loongarch64; ++package sun.jvm.hotspot.debugger.proc.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.proc.*; +import sun.jvm.hotspot.utilities.*; + -+public class ProcLOONGARCH64Thread implements ThreadProxy { ++public class ProcMIPS64Thread implements ThreadProxy { + private ProcDebugger debugger; + private int id; + -+ public ProcLOONGARCH64Thread(ProcDebugger debugger, Address addr) { ++ public ProcMIPS64Thread(ProcDebugger debugger, Address addr) { + this.debugger = debugger; + + // FIXME: the size here should be configurable. However, making it @@ -118790,21 +117041,21 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + this.id = (int) addr.getCIntegerAt(0, 4, true); + } + -+ public ProcLOONGARCH64Thread(ProcDebugger debugger, long id) { ++ public ProcMIPS64Thread(ProcDebugger debugger, long id) { + this.debugger = debugger; + this.id = (int) id; + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ ProcLOONGARCH64ThreadContext context = new ProcLOONGARCH64ThreadContext(debugger); ++ ProcMIPS64ThreadContext context = new ProcMIPS64ThreadContext(debugger); + long[] regs = debugger.getThreadIntegerRegisterSet(id); + /* + _NGREG in reg.h is defined to be 19. Because we have included -+ debug registers LOONGARCH64ThreadContext.NPRGREG is 25. ++ debug registers MIPS64ThreadContext.NPRGREG is 25. + */ + + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length <= LOONGARCH64ThreadContext.NPRGREG, "size of register set is greater than " + LOONGARCH64ThreadContext.NPRGREG); ++ Assert.that(regs.length <= MIPS64ThreadContext.NPRGREG, "size of register set is greater than " + MIPS64ThreadContext.NPRGREG); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); @@ -118826,20 +117077,22 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + } + + public boolean equals(Object obj) { -+ if ((obj == null) || !(obj instanceof ProcLOONGARCH64Thread)) { ++ if ((obj == null) || !(obj instanceof ProcMIPS64Thread)) { + return false; + } + -+ return (((ProcLOONGARCH64Thread) obj).id == id); ++ return (((ProcMIPS64Thread) obj).id == id); + } + + public int hashCode() { + return id; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java +new file mode 100644 +index 000000000..d44223d76 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. @@ -118888,9 +117141,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java +new file mode 100644 +index 000000000..bad478fc5 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -118937,13 +117192,58 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return new ProcMIPS64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/proc/mips64/ProcMIPS64Thread.java 2023-09-08 09:39:52.529844883 +0800 -@@ -0,0 +1,92 @@ +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +index 2bd396c8f..da89480f7 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +@@ -22,6 +22,12 @@ + * + */ + +/* -+ * Copyright (c) 2002, 2003, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. ++ * This file has been modified by Loongson Technology in 2021, These ++ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package sun.jvm.hotspot.debugger.remote; + + import java.rmi.*; +@@ -33,6 +39,8 @@ import sun.jvm.hotspot.debugger.cdbg.*; + import sun.jvm.hotspot.debugger.remote.x86.*; + import sun.jvm.hotspot.debugger.remote.amd64.*; + import sun.jvm.hotspot.debugger.remote.ppc64.*; ++import sun.jvm.hotspot.debugger.remote.mips64.*; ++import sun.jvm.hotspot.debugger.remote.loongarch64.*; + + /** An implementation of Debugger which wraps a + RemoteDebugger, providing remote debugging via RMI. +@@ -71,6 +79,16 @@ public class RemoteDebuggerClient extends DebuggerBase implements JVMDebugger { + cachePageSize = 4096; + cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); + unalignedAccessesOkay = true; ++ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { ++ threadFactory = new RemoteMIPS64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); ++ unalignedAccessesOkay = true; ++ } else if (cpu.equals("loongarch64")) { ++ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); ++ unalignedAccessesOkay = true; + } else { + try { + Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +new file mode 100644 +index 000000000..242dd279e +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +@@ -0,0 +1,54 @@ ++/* ++ * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -118966,76 +117266,40 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * + */ + -+package sun.jvm.hotspot.debugger.proc.mips64; ++package sun.jvm.hotspot.debugger.remote.loongarch64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; -+import sun.jvm.hotspot.debugger.proc.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.remote.*; +import sun.jvm.hotspot.utilities.*; + -+public class ProcMIPS64Thread implements ThreadProxy { -+ private ProcDebugger debugger; -+ private int id; -+ -+ public ProcMIPS64Thread(ProcDebugger debugger, Address addr) { -+ this.debugger = debugger; -+ -+ // FIXME: the size here should be configurable. However, making it -+ // so would produce a dependency on the "types" package from the -+ // debugger package, which is not desired. -+ this.id = (int) addr.getCIntegerAt(0, 4, true); ++public class RemoteLOONGARCH64Thread extends RemoteThread { ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { ++ super(debugger, addr); + } + -+ public ProcMIPS64Thread(ProcDebugger debugger, long id) { -+ this.debugger = debugger; -+ this.id = (int) id; ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { ++ super(debugger, id); + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ ProcMIPS64ThreadContext context = new ProcMIPS64ThreadContext(debugger); -+ long[] regs = debugger.getThreadIntegerRegisterSet(id); -+ /* -+ _NGREG in reg.h is defined to be 19. Because we have included -+ debug registers MIPS64ThreadContext.NPRGREG is 25. -+ */ -+ ++ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); ++ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : ++ debugger.getThreadIntegerRegisterSet(id); + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length <= MIPS64ThreadContext.NPRGREG, "size of register set is greater than " + MIPS64ThreadContext.NPRGREG); ++ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); + } + return context; + } -+ -+ public boolean canSetContext() throws DebuggerException { -+ return false; -+ } -+ -+ public void setContext(ThreadContext context) -+ throws IllegalThreadStateException, DebuggerException { -+ throw new DebuggerException("Unimplemented"); -+ } -+ -+ public String toString() { -+ return "t@" + id; -+ } -+ -+ public boolean equals(Object obj) { -+ if ((obj == null) || !(obj instanceof ProcMIPS64Thread)) { -+ return false; -+ } -+ -+ return (((ProcMIPS64Thread) obj).id == id); -+ } -+ -+ public int hashCode() { -+ return id; -+ } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java +new file mode 100644 +index 000000000..634d5ad04 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -119088,9 +117352,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java +new file mode 100644 +index 000000000..4fb9cc7c0 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -119137,13 +117403,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return new RemoteLOONGARCH64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java +new file mode 100644 +index 000000000..c2f7d841f +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * Copyright (c) 2018, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -119166,28 +117434,28 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * + */ + -+package sun.jvm.hotspot.debugger.remote.loongarch64; ++package sun.jvm.hotspot.debugger.remote.mips64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; ++import sun.jvm.hotspot.debugger.mips64.*; +import sun.jvm.hotspot.debugger.remote.*; +import sun.jvm.hotspot.utilities.*; + -+public class RemoteLOONGARCH64Thread extends RemoteThread { -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { ++public class RemoteMIPS64Thread extends RemoteThread { ++ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, Address addr) { + super(debugger, addr); + } + -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { ++ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, long id) { + super(debugger, id); + } + + public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); ++ RemoteMIPS64ThreadContext context = new RemoteMIPS64ThreadContext(debugger); + long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : + debugger.getThreadIntegerRegisterSet(id); + if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); ++ Assert.that(regs.length == MIPS64ThreadContext.NPRGREG, "size of register set must match"); + } + for (int i = 0; i < regs.length; i++) { + context.setRegister(i, regs[i]); @@ -119195,9 +117463,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return context; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java +new file mode 100644 +index 000000000..23646905d +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadContext.java @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -119250,9 +117520,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.newAddress(getRegister(index)); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java +new file mode 100644 +index 000000000..b39b01449 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64ThreadFactory.java @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. @@ -119284,82 +117556,25 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar +import sun.jvm.hotspot.debugger.*; +import sun.jvm.hotspot.debugger.remote.*; + -+public class RemoteMIPS64ThreadFactory implements RemoteThreadFactory { -+ private RemoteDebuggerClient debugger; -+ -+ public RemoteMIPS64ThreadFactory(RemoteDebuggerClient debugger) { -+ this.debugger = debugger; -+ } -+ -+ public ThreadProxy createThreadWrapper(Address threadIdentifierAddr) { -+ return new RemoteMIPS64Thread(debugger, threadIdentifierAddr); -+ } -+ -+ public ThreadProxy createThreadWrapper(long id) { -+ return new RemoteMIPS64Thread(debugger, id); -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/mips64/RemoteMIPS64Thread.java 2023-09-08 09:39:52.529844883 +0800 -@@ -0,0 +1,54 @@ -+/* -+ * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger.remote.mips64; -+ -+import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.mips64.*; -+import sun.jvm.hotspot.debugger.remote.*; -+import sun.jvm.hotspot.utilities.*; -+ -+public class RemoteMIPS64Thread extends RemoteThread { -+ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, Address addr) { -+ super(debugger, addr); ++public class RemoteMIPS64ThreadFactory implements RemoteThreadFactory { ++ private RemoteDebuggerClient debugger; ++ ++ public RemoteMIPS64ThreadFactory(RemoteDebuggerClient debugger) { ++ this.debugger = debugger; + } + -+ public RemoteMIPS64Thread(RemoteDebuggerClient debugger, long id) { -+ super(debugger, id); ++ public ThreadProxy createThreadWrapper(Address threadIdentifierAddr) { ++ return new RemoteMIPS64Thread(debugger, threadIdentifierAddr); + } + -+ public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteMIPS64ThreadContext context = new RemoteMIPS64ThreadContext(debugger); -+ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : -+ debugger.getThreadIntegerRegisterSet(id); -+ if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == MIPS64ThreadContext.NPRGREG, "size of register set must match"); -+ } -+ for (int i = 0; i < regs.length; i++) { -+ context.setRegister(i, regs[i]); -+ } -+ return context; ++ public ThreadProxy createThreadWrapper(long id) { ++ return new RemoteMIPS64Thread(debugger, id); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2023-09-08 09:39:52.529844883 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java +index d16ac8aae..de1e70a72 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java @@ -22,6 +22,12 @@ * */ @@ -119370,74 +117585,34 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + * available on the same license terms set forth above. + */ + - package sun.jvm.hotspot.debugger.remote; - - import java.rmi.*; -@@ -33,6 +39,8 @@ - import sun.jvm.hotspot.debugger.remote.x86.*; - import sun.jvm.hotspot.debugger.remote.amd64.*; - import sun.jvm.hotspot.debugger.remote.ppc64.*; -+import sun.jvm.hotspot.debugger.remote.mips64.*; -+import sun.jvm.hotspot.debugger.remote.loongarch64.*; - - /** An implementation of Debugger which wraps a - RemoteDebugger, providing remote debugging via RMI. -@@ -71,6 +79,16 @@ - cachePageSize = 4096; - cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); - unalignedAccessesOkay = true; -+ } else if (cpu.equals("mips64") || cpu.equals("mips64el")) { -+ threadFactory = new RemoteMIPS64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); -+ unalignedAccessesOkay = true; -+ } else if (cpu.equals("loongarch64")) { -+ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); -+ unalignedAccessesOkay = true; - } else { - try { - Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2023-11-01 10:27:44.897761587 +0800 -@@ -23,6 +23,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2021. These -+ * modifications are Copyright (c) 2018, 2021, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ * -+ */ - package sun.jvm.hotspot; + package sun.jvm.hotspot.runtime; - import java.rmi.RemoteException; -@@ -37,6 +43,8 @@ - import sun.jvm.hotspot.debugger.MachineDescriptionPPC64; - import sun.jvm.hotspot.debugger.MachineDescriptionAArch64; - import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; -+import sun.jvm.hotspot.debugger.MachineDescriptionMIPS64; -+import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; - import sun.jvm.hotspot.debugger.NoSuchSymbolException; - import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; - import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; -@@ -569,6 +577,10 @@ - machDesc = new MachineDescriptionPPC64(); - } else if (cpu.equals("aarch64")) { - machDesc = new MachineDescriptionAArch64(); -+ } else if (cpu.equals("mips64")) { -+ machDesc = new MachineDescriptionMIPS64(); -+ } else if (cpu.equals("loongarch64")) { -+ machDesc = new MachineDescriptionLOONGARCH64(); - } else { - try { - machDesc = (MachineDescription) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 2023-09-08 09:39:52.565844930 +0800 + import java.util.*; +@@ -36,6 +42,8 @@ import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_riscv64.LinuxRISCV64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_ppc64.LinuxPPC64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_mips64.LinuxMIPS64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_amd64.BsdAMD64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_aarch64.BsdAARCH64JavaThreadPDAccess; +@@ -116,6 +124,10 @@ public class Threads { + access = new LinuxAARCH64JavaThreadPDAccess(); + } else if (cpu.equals("riscv64")) { + access = new LinuxRISCV64JavaThreadPDAccess(); ++ } else if (cpu.equals("mips64")) { ++ access = new LinuxMIPS64JavaThreadPDAccess(); ++ } else if (cpu.equals("loongarch64")) { ++ access = new LinuxLOONGARCH64JavaThreadPDAccess(); + } else { + try { + access = (JavaThreadPDAccess) +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java +new file mode 100644 +index 000000000..75d6bf2c6 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved. @@ -119574,9 +117749,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java +new file mode 100644 +index 000000000..882237449 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_mips64/LinuxMIPS64JavaThreadPDAccess.java @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved. @@ -119713,9 +117890,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java +new file mode 100644 +index 000000000..824270e13 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java @@ -0,0 +1,250 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -119967,9 +118146,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + pcFound = pc; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java +new file mode 100644 +index 000000000..576654594 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java @@ -0,0 +1,519 @@ +/* + * Copyright (c) 2001, 2015, Oracle and/or its affiliates. All rights reserved. @@ -120490,9 +118671,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java +new file mode 100644 +index 000000000..0ad9573a4 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -120553,9 +118736,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java +new file mode 100644 +index 000000000..2cf904d38 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -120609,9 +118794,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java +new file mode 100644 +index 000000000..c11458abe +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64CurrentFrameGuess.java @@ -0,0 +1,217 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -120830,9 +119017,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + pcFound = pc; + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java +new file mode 100644 +index 000000000..e11d64737 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64Frame.java @@ -0,0 +1,539 @@ +/* + * Copyright (c) 2001, 2015, Oracle and/or its affiliates. All rights reserved. @@ -121373,9 +119562,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java +new file mode 100644 +index 000000000..8a4a28a60 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64JavaCallWrapper.java @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -121436,9 +119627,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java 2023-09-08 09:39:52.565844930 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java +new file mode 100644 +index 000000000..f2da760af +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/mips64/MIPS64RegisterMap.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -121492,45 +119685,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java 2023-11-01 10:27:44.901761592 +0800 -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2021, These -+ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - package sun.jvm.hotspot.runtime; - - import java.util.*; -@@ -35,6 +41,8 @@ - import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_ppc64.LinuxPPC64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_mips64.LinuxMIPS64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_amd64.BsdAMD64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_aarch64.BsdAARCH64JavaThreadPDAccess; -@@ -113,6 +121,10 @@ - access = new LinuxPPC64JavaThreadPDAccess(); - } else if (cpu.equals("aarch64")) { - access = new LinuxAARCH64JavaThreadPDAccess(); -+ } else if (cpu.equals("mips64")) { -+ access = new LinuxMIPS64JavaThreadPDAccess(); -+ } else if (cpu.equals("loongarch64")) { -+ access = new LinuxLOONGARCH64JavaThreadPDAccess(); - } else { - try { - access = (JavaThreadPDAccess) -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java ---- openjdk/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2023-11-01 10:27:44.901761592 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java +index f4cd48732..6901946e5 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java @@ -22,6 +22,13 @@ * */ @@ -121545,16 +119703,16 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar package sun.jvm.hotspot.utilities; /** Provides canonicalized OS and CPU information for the rest of the -@@ -50,7 +57,7 @@ +@@ -50,7 +57,7 @@ public class PlatformInfo { public static boolean knownCPU(String cpu) { final String[] KNOWN = -- new String[] {"i386", "x86", "x86_64", "amd64", "ppc64", "ppc64le", "aarch64"}; -+ new String[] {"i386", "x86", "x86_64", "amd64", "ppc64", "ppc64le", "aarch64", "mips64", "mips64el", "loongarch64"}; +- new String[] {"i386", "x86", "x86_64", "amd64", "ppc64", "ppc64le", "aarch64", "riscv64"}; ++ new String[] {"i386", "x86", "x86_64", "amd64", "ppc64", "ppc64le", "aarch64", "riscv64", "mips64", "mips64el", "loongarch64"}; for(String s : KNOWN) { if(s.equals(cpu)) -@@ -83,6 +90,12 @@ +@@ -83,6 +90,12 @@ public class PlatformInfo { if (cpu.equals("ppc64le")) return "ppc64"; @@ -121567,13 +119725,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.hotspot.agent/shar return cpu; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java 2023-11-01 10:27:44.925761621 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java +new file mode 100644 +index 000000000..1f54e9f3c +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -121713,13 +119873,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + return new JVMCIBackend(metaAccess, codeCache, constantReflection, stackIntrospection); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java 2023-11-01 10:27:44.925761621 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java +new file mode 100644 +index 000000000..e1a007000 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java @@ -0,0 +1,297 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -122014,13 +120176,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + return String.format("Allocatable: " + getAllocatableRegisters() + "%n" + "CallerSave: " + getCallerSaveRegisters() + "%n"); + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java 2023-11-01 10:27:44.925761621 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java +new file mode 100644 +index 000000000..0a2e85720 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -122095,13 +120259,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + final long loongarch64UAL = getConstant("VM_Version::CPU_UAL", Long.class); + // Checkstyle: resume +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.loongarch64/src/jdk/vm/ci/hotspot/loongarch64/package-info.java 2023-11-01 10:27:44.925761621 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java +new file mode 100644 +index 000000000..74c6ca980 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -122127,13 +120293,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + * The LoongArch64 HotSpot specific portions of the JVMCI API. + */ +package jdk.vm.ci.hotspot.loongarch64; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64.java 2023-11-01 10:27:44.941761640 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java +new file mode 100644 +index 000000000..930b17e82 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java @@ -0,0 +1,249 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -122380,13 +120548,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/LoongArch64Kind.java 2023-11-01 10:27:44.941761640 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java +new file mode 100644 +index 000000000..047a1dbbe +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java @@ -0,0 +1,163 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -122547,13 +120717,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + } + } +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.loongarch64/src/jdk/vm/ci/loongarch64/package-info.java 2023-11-01 10:27:44.941761640 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java +new file mode 100644 +index 000000000..6df1b7b3a +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -122579,9 +120751,10 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha + * The LoongArch64 platform independent portions of the JVMCI API. + */ +package jdk.vm.ci.loongarch64; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/share/classes/module-info.java jdk17u-ls/src/jdk.internal.vm.ci/share/classes/module-info.java ---- openjdk/src/jdk.internal.vm.ci/share/classes/module-info.java 2022-10-13 03:49:20.000000000 +0800 -+++ jdk17u-ls/src/jdk.internal.vm.ci/share/classes/module-info.java 2023-09-08 09:39:52.705845114 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/module-info.java b/src/jdk.internal.vm.ci/share/classes/module-info.java +index ed1976957..62a4ff4be 100644 +--- a/src/jdk.internal.vm.ci/share/classes/module-info.java ++++ b/src/jdk.internal.vm.ci/share/classes/module-info.java @@ -23,6 +23,12 @@ * questions. */ @@ -122595,17 +120768,27 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/jdk.internal.vm.ci/sha module jdk.internal.vm.ci { exports jdk.vm.ci.services to jdk.internal.vm.compiler, -@@ -39,5 +45,6 @@ +@@ -39,5 +45,6 @@ module jdk.internal.vm.ci { provides jdk.vm.ci.hotspot.HotSpotJVMCIBackendFactory with jdk.vm.ci.hotspot.aarch64.AArch64HotSpotJVMCIBackendFactory, + jdk.vm.ci.hotspot.loongarch64.LoongArch64HotSpotJVMCIBackendFactory, jdk.vm.ci.hotspot.amd64.AMD64HotSpotJVMCIBackendFactory; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/utils/hsdis/Makefile jdk17u-ls/src/utils/hsdis/Makefile ---- openjdk/src/utils/hsdis/Makefile 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/src/utils/hsdis/Makefile 2023-09-08 09:39:53.005845509 +0800 -@@ -89,6 +89,9 @@ +diff --git a/src/utils/IdealGraphVisualizer/.gitignore b/src/utils/IdealGraphVisualizer/.gitignore +new file mode 100644 +index 000000000..785134c44 +--- /dev/null ++++ b/src/utils/IdealGraphVisualizer/.gitignore +@@ -0,0 +1,2 @@ ++/*/target ++.igv.log +\ No newline at end of file +diff --git a/src/utils/hsdis/Makefile b/src/utils/hsdis/Makefile +index 66dac7130..dd2ccd340 100644 +--- a/src/utils/hsdis/Makefile ++++ b/src/utils/hsdis/Makefile +@@ -89,6 +89,9 @@ CC = gcc endif CFLAGS += -O DLDFLAGS += -shared @@ -122615,60 +120798,60 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/src/utils/hsdis/Makefile j LDFLAGS += -ldl OUTFLAGS += -o $@ else -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/.src-rev jdk17u-ls/.src-rev ---- openjdk/.src-rev 2022-10-13 03:49:33.000000000 +0800 -+++ jdk17u-ls/.src-rev 1970-01-01 08:00:00.000000000 +0800 -@@ -1 +0,0 @@ --.:git:0a6252780a86+ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java jdk17u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java ---- openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java 2023-11-01 10:27:45.017761731 +0800 -@@ -22,11 +22,17 @@ +diff --git a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java +index 4c56daebf..928361304 100644 +--- a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java ++++ b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java +@@ -21,12 +21,18 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2021, These + * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @library /test/lib / * @modules java.base/jdk.internal.misc * java.management - * @requires vm.cpu.features ~= ".*aes.*" & !vm.graal.enabled + * @requires (vm.cpu.features ~= ".*aes.*" | os.arch == "loongarch64") & !vm.graal.enabled - * @build sun.hotspot.WhiteBox - * @run driver jdk.test.lib.helpers.ClassFileInstaller sun.hotspot.WhiteBox + * @build jdk.test.whitebox.WhiteBox + * @run driver jdk.test.lib.helpers.ClassFileInstaller jdk.test.whitebox.WhiteBox * @run main/othervm/timeout=600 -Xbootclasspath/a:. -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java jdk17u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java ---- openjdk/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java 2023-11-01 10:27:45.017761731 +0800 -@@ -22,13 +22,19 @@ +diff --git a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java +index 03016ea3d..62ce6c1a7 100644 +--- a/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java ++++ b/test/hotspot/jtreg/compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java +@@ -21,6 +21,12 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2021, These + * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @library /test/lib / - * @modules java.base/jdk.internal.misc +@@ -28,7 +34,7 @@ * java.management * - * @build sun.hotspot.WhiteBox + * @build jdk.test.whitebox.WhiteBox - * @requires !(vm.cpu.features ~= ".*aes.*") + * @requires !(vm.cpu.features ~= ".*aes.*" | os.arch == "loongarch64") * @requires vm.compiler1.enabled | !vm.graal.enabled - * @run driver jdk.test.lib.helpers.ClassFileInstaller sun.hotspot.WhiteBox + * @run driver jdk.test.lib.helpers.ClassFileInstaller jdk.test.whitebox.WhiteBox * @run main/othervm -Xbootclasspath/a:. -XX:+UnlockDiagnosticVMOptions -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java jdk17u-ls/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java ---- openjdk/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2023-11-01 10:27:45.025761740 +0800 +diff --git a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java +index 468cd83d7..40d2b03e3 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java @@ -21,6 +21,12 @@ * questions. */ @@ -122682,71 +120865,241 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile package compiler.intrinsics.sha.cli.testcases; import compiler.intrinsics.sha.cli.DigestOptionsBase; -@@ -32,7 +38,7 @@ +@@ -32,7 +38,7 @@ import jdk.test.lib.cli.predicate.OrPredicate; /** * Generic test case for SHA-related options targeted to any CPU except -- * AArch64, PPC, S390x, and X86. -+ * AArch64, PPC, S390x, LoongArch64, and X86. +- * AArch64, RISCV64, PPC, S390x, and X86. ++ * AArch64, RISCV64, PPC, S390x, LoongArch64, and X86. */ public class GenericTestCaseForOtherCPU extends DigestOptionsBase.TestCase { -@@ -44,13 +50,14 @@ +@@ -44,14 +50,15 @@ public class GenericTestCaseForOtherCPU extends } public GenericTestCaseForOtherCPU(String optionName, boolean checkUseSHA) { -- // Execute the test case on any CPU except AArch64, PPC, S390x, and X86. -+ // Execute the test case on any CPU except AArch64, PPC, S390x, LoongArch64, and X86. +- // Execute the test case on any CPU except AArch64, RISCV64, PPC, S390x, and X86. ++ // Execute the test case on any CPU except AArch64, RISCV64, PPC, S390x, LoongArch64, and X86. super(optionName, new NotPredicate( new OrPredicate(Platform::isAArch64, + new OrPredicate(Platform::isRISCV64, new OrPredicate(Platform::isS390x, new OrPredicate(Platform::isPPC, + new OrPredicate(Platform::isLoongArch64, new OrPredicate(Platform::isX64, -- Platform::isX86)))))); -+ Platform::isX86))))))); +- Platform::isX86))))))); ++ Platform::isX86)))))))); this.checkUseSHA = checkUseSHA; } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java 2023-11-01 10:27:45.033761750 +0800 -@@ -20,14 +20,23 @@ +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java +index d7ecc7c04..0d47a2f30 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java +@@ -20,16 +20,25 @@ * or visit www.oracle.com if you need additional information or have any * questions. */ -+ ++ ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package jdk.vm.ci.code.test; + + import jdk.vm.ci.aarch64.AArch64; + import jdk.vm.ci.amd64.AMD64; ++import jdk.vm.ci.loongarch64.LoongArch64; + import jdk.vm.ci.code.Architecture; + import jdk.vm.ci.code.CodeCacheProvider; + import jdk.vm.ci.code.InstalledCode; + import jdk.vm.ci.code.TargetDescription; + import jdk.vm.ci.code.test.aarch64.AArch64TestAssembler; + import jdk.vm.ci.code.test.amd64.AMD64TestAssembler; ++import jdk.vm.ci.code.test.loongarch64.LoongArch64TestAssembler; + import jdk.vm.ci.hotspot.HotSpotCodeCacheProvider; + import jdk.vm.ci.hotspot.HotSpotCompiledCode; + import jdk.vm.ci.hotspot.HotSpotJVMCIRuntime; +@@ -75,6 +84,8 @@ public class CodeInstallationTest { + return new AMD64TestAssembler(codeCache, config); + } else if (arch instanceof AArch64) { + return new AArch64TestAssembler(codeCache, config); ++ } else if (arch instanceof LoongArch64) { ++ return new LoongArch64TestAssembler(codeCache, config); + } else { + Assert.fail("unsupported architecture"); + return null; +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java +index 2e3f90368..a07fcc8af 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,8 +38,9 @@ + * jdk.internal.vm.ci/jdk.vm.ci.code.site + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.DataPatchTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java +index b88832677..00860c8a6 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.code + * jdk.internal.vm.ci/jdk.vm.ci.code.site +@@ -32,8 +38,9 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.common + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 +- * @compile CodeInstallationTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java ++ * @compile CodeInstallationTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.InterpreterFrameSizeTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java +index f473d089a..6ca7b76f1 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -33,8 +39,9 @@ + * jdk.internal.vm.ci/jdk.vm.ci.common + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.MaxOopMapStackOffsetTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java +index 0f5c8be3f..3b6b464b1 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" + * @library /test/lib / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.code +@@ -33,8 +39,9 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.common + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 +- * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java ++ * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm/native -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Xbootclasspath/a:. jdk.vm.ci.code.test.NativeCallTest + */ + package jdk.vm.ci.code.test; +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java +index e5fc53e80..75494d5cc 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + +/* + * This file has been modified by Loongson Technology in 2022, These + * modifications are Copyright (c) 2022, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + - package jdk.vm.ci.code.test; + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,8 +38,9 @@ + * jdk.internal.vm.ci/jdk.vm.ci.code.site + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleCodeInstallationTest + */ - import jdk.vm.ci.aarch64.AArch64; -+import jdk.vm.ci.loongarch64.LoongArch64; - import jdk.vm.ci.amd64.AMD64; - import jdk.vm.ci.code.Architecture; - import jdk.vm.ci.code.CodeCacheProvider; - import jdk.vm.ci.code.InstalledCode; - import jdk.vm.ci.code.TargetDescription; -+import jdk.vm.ci.code.test.loongarch64.LoongArch64TestAssembler; - import jdk.vm.ci.code.test.aarch64.AArch64TestAssembler; - import jdk.vm.ci.code.test.amd64.AMD64TestAssembler; - import jdk.vm.ci.hotspot.HotSpotCodeCacheProvider; -@@ -75,6 +84,8 @@ - return new AMD64TestAssembler(codeCache, config); - } else if (arch instanceof AArch64) { - return new AArch64TestAssembler(codeCache, config); -+ } else if (arch instanceof LoongArch64) { -+ return new LoongArch64TestAssembler(codeCache, config); - } else { - Assert.fail("unsupported architecture"); - return null; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java 2023-09-08 09:39:53.137845682 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java +index bfd611312..08be94ac1 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java @@ -21,10 +21,16 @@ * questions. */ @@ -122773,12 +121126,13 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java + * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.DataPatchTest + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleDebugInfoTest */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java 2023-09-08 09:39:53.137845682 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java +index 1fb0d77eb..b2d40f70a 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java @@ -21,10 +21,16 @@ * questions. */ @@ -122794,23 +121148,25 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile * @requires vm.jvmci - * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" + * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" + * @library / * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.code - * jdk.internal.vm.ci/jdk.vm.ci.code.site + * jdk.internal.vm.ci/jdk.vm.ci.meta @@ -32,8 +38,9 @@ + * jdk.internal.vm.ci/jdk.vm.ci.code.site * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.common * jdk.internal.vm.ci/jdk.vm.ci.aarch64 + * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 * jdk.internal.vm.ci/jdk.vm.ci.amd64 -- * @compile CodeInstallationTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java -+ * @compile CodeInstallationTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.InterpreterFrameSizeTest +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.VirtualObjectDebugInfoTest */ -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java 2023-09-08 09:39:53.137845682 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java +new file mode 100644 +index 000000000..4c7686845 +--- /dev/null ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java @@ -0,0 +1,568 @@ +/* + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. @@ -123380,106 +121736,11 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile + } + +} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java 2023-09-08 09:39:53.137845682 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -33,8 +39,9 @@ - * jdk.internal.vm.ci/jdk.vm.ci.common - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.MaxOopMapStackOffsetTest - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java 2023-09-08 09:39:53.137845682 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" - * @library /test/lib / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.code -@@ -33,8 +39,9 @@ - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.common - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 -- * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java -+ * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm/native -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Xbootclasspath/a:. jdk.vm.ci.code.test.NativeCallTest - */ - package jdk.vm.ci.code.test; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java 2023-09-08 09:39:53.137845682 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,8 +38,9 @@ - * jdk.internal.vm.ci/jdk.vm.ci.code.site - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleCodeInstallationTest - */ - -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java 2023-09-08 09:39:53.137845682 +0800 -@@ -21,10 +21,16 @@ +diff --git a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java +index 2f2395b77..58482edb3 100644 +--- a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java ++++ b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java +@@ -21,6 +21,12 @@ * questions. */ @@ -123489,87 +121750,68 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile + * available on the same license terms set forth above. + */ + - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,8 +38,9 @@ - * jdk.internal.vm.ci/jdk.vm.ci.code.site - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleDebugInfoTest - */ + package compiler.lib.ir_framework; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java ---- openjdk/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java 2023-09-08 09:39:53.137845682 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ + import compiler.lib.ir_framework.driver.irmatching.IRMatcher; +@@ -58,8 +64,8 @@ public class IRNode { + public static final String ALLOC_ARRAY = "(.*precise klass \\[L.*\\R((.*(?i:mov|mv|xor|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END; + public static final String ALLOC_ARRAY_OF = COMPOSITE_PREFIX + "(.*precise klass \\[L.*" + IS_REPLACED + ";:.*\\R((.*(?i:mov|mv|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END; -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,8 +38,9 @@ - * jdk.internal.vm.ci/jdk.vm.ci.code.site - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.VirtualObjectDebugInfoTest - */ +- public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|mv|or).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END; +- public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|mv|or).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END; ++ public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|mv|or|li).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END; ++ public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|mv|or|li).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END; + // Does not work on s390 (a rule containing this regex will be skipped on s390). + public static final String CHECKCAST_ARRAYCOPY = "(.*((?i:call_leaf_nofp,runtime)|CALL,\\s?runtime leaf nofp|BCTRL.*.leaf call).*checkcast_arraycopy.*" + END; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java jdk17u-ls/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java ---- openjdk/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java 2023-11-01 10:27:45.037761755 +0800 +diff --git a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java +index 85fd3fa93..0655f2b0b 100644 +--- a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java ++++ b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java @@ -21,6 +21,12 @@ * questions. */ +/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022 Loongson Technology, and are made + * available on the same license terms set forth above. + */ + - package compiler.lib.ir_framework; + /* + * @test + * @bug 8279822 +@@ -130,7 +136,7 @@ public abstract class TestConstantsInError implements OutputProcessor { + results.shouldMatch("Test_C1/.*::test \\(3 bytes\\)$") + .shouldMatch("Test_C2/.*::test \\(3 bytes\\)$"); - import compiler.lib.ir_framework.driver.IRMatcher; -@@ -58,8 +64,8 @@ - public static final String ALLOC_ARRAY = "(.*precise klass \\[L.*\\R((.*(?i:mov|xor|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END; - public static final String ALLOC_ARRAY_OF = COMPOSITE_PREFIX + "(.*precise klass \\[L.*" + IS_REPLACED + ";:.*\\R((.*(?i:mov|xorl|nop|spill).*|\\s*|.*LGHI.*)\\R)*.*(?i:call,static).*wrapper for: _new_array_Java" + END; +- if (isC1 && (Platform.isAArch64() || Platform.isRISCV64())) { // no code patching ++ if (isC1 && (Platform.isAArch64() || Platform.isRISCV64() || Platform.isLoongArch64())) { // no code patching + results.shouldMatch("Test_C1/.*::test \\(3 bytes\\) made not entrant") + .shouldMatch("Test_C2/.*::test \\(3 bytes\\) made not entrant"); + } else { +@@ -168,7 +174,7 @@ public abstract class TestConstantsInError implements OutputProcessor { + .shouldMatch("Test_MH3/.*::test \\(3 bytes\\)$") + .shouldMatch("Test_MH4/.*::test \\(3 bytes\\)$"); -- public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|or).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END; -- public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|or).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END; -+ public static final String CHECKCAST_ARRAY = "(((?i:cmp|CLFI|CLR).*precise klass \\[.*;:|.*(?i:mov|or|li).*precise klass \\[.*;:.*\\R.*(cmp|CMP|CLR))" + END; -+ public static final String CHECKCAST_ARRAY_OF = COMPOSITE_PREFIX + "(((?i:cmp|CLFI|CLR).*precise klass \\[.*" + IS_REPLACED + ";:|.*(?i:mov|or|li).*precise klass \\[.*" + IS_REPLACED + ";:.*\\R.*(cmp|CMP|CLR))" + END; - // Does not work on s390 (a rule containing this regex will be skipped on s390). - public static final String CHECKCAST_ARRAYCOPY = "(.*((?i:call_leaf_nofp,runtime)|CALL,\\s?runtime leaf nofp|BCTRL.*.leaf call).*checkcast_arraycopy.*" + END; +- if (isC1 && (Platform.isAArch64() || Platform.isRISCV64())) { // no code patching ++ if (isC1 && (Platform.isAArch64() || Platform.isRISCV64() || Platform.isLoongArch64())) { // no code patching + results.shouldMatch("Test_MH1/.*::test \\(3 bytes\\) made not entrant") + .shouldMatch("Test_MH2/.*::test \\(3 bytes\\) made not entrant") + .shouldMatch("Test_MH3/.*::test \\(3 bytes\\) made not entrant") +@@ -191,7 +197,7 @@ public abstract class TestConstantsInError implements OutputProcessor { + results.shouldMatch("Test_MT1/.*::test \\(3 bytes\\)$") + .shouldMatch("Test_MT2/.*::test \\(3 bytes\\)$"); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java jdk17u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java ---- openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java 2023-11-01 10:27:45.045761764 +0800 +- if (isC1 && (Platform.isAArch64() || Platform.isRISCV64())) { // no code patching ++ if (isC1 && (Platform.isAArch64() || Platform.isRISCV64() || Platform.isLoongArch64())) { // no code patching + results.shouldMatch("Test_MT1/.*::test \\(3 bytes\\) made not entrant") + .shouldMatch("Test_MT2/.*::test \\(3 bytes\\) made not entrant"); + } else { +diff --git a/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java b/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java +index 10d87d51f..dbea76741 100644 +--- a/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java ++++ b/test/hotspot/jtreg/compiler/runtime/criticalnatives/argumentcorruption/CheckLongArgs.java @@ -21,10 +21,17 @@ * questions. */ @@ -123583,14 +121825,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile /* @test * @bug 8167409 - * @requires (os.arch != "aarch64") & (os.arch != "arm") & (vm.flavor != "zero") + * @requires (os.arch != "aarch64") & (os.arch != "arm") & (os.arch != "riscv64") & (vm.flavor != "zero") + * @requires (os.arch != "mips64el") & (os.arch != "loongarch64") & (vm.flavor != "zero") * @run main/othervm/native -Xcomp -XX:+CriticalJNINatives compiler.runtime.criticalnatives.argumentcorruption.CheckLongArgs */ package compiler.runtime.criticalnatives.argumentcorruption; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java jdk17u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java ---- openjdk/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java 2023-11-01 10:27:45.045761764 +0800 +diff --git a/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java b/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java +index 23c1e6e6a..2f402d567 100644 +--- a/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java ++++ b/test/hotspot/jtreg/compiler/runtime/criticalnatives/lookup/LookUp.java @@ -21,10 +21,17 @@ * questions. */ @@ -123604,57 +121847,15 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile /* @test * @bug 8167408 - * @requires (os.arch != "aarch64") & (os.arch != "arm") & (vm.flavor != "zero") + * @requires (os.arch != "aarch64") & (os.arch != "arm") & (os.arch != "riscv64") & (vm.flavor != "zero") + * @requires (os.arch != "mips64el") & (os.arch != "loongarch64") & (vm.flavor != "zero") * @run main/othervm/native -Xcomp -XX:+CriticalJNINatives compiler.runtime.criticalnatives.lookup.LookUp */ package compiler.runtime.criticalnatives.lookup; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java jdk17u-ls/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java ---- openjdk/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java 2023-11-01 10:27:45.045761764 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022 Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @bug 8279822 - * @requires vm.flagless -@@ -130,7 +136,7 @@ - results.shouldMatch("Test_C1/.*::test \\(3 bytes\\)$") - .shouldMatch("Test_C2/.*::test \\(3 bytes\\)$"); - -- if (isC1 && Platform.isAArch64()) { // no code patching -+ if (isC1 && (Platform.isAArch64() || Platform.isLoongArch64())) { // no code patching - results.shouldMatch("Test_C1/.*::test \\(3 bytes\\) made not entrant") - .shouldMatch("Test_C2/.*::test \\(3 bytes\\) made not entrant"); - } else { -@@ -168,7 +174,7 @@ - .shouldMatch("Test_MH3/.*::test \\(3 bytes\\)$") - .shouldMatch("Test_MH4/.*::test \\(3 bytes\\)$"); - -- if (isC1 && Platform.isAArch64()) { // no code patching -+ if (isC1 && (Platform.isAArch64() || Platform.isLoongArch64())) { // no code patching - results.shouldMatch("Test_MH1/.*::test \\(3 bytes\\) made not entrant") - .shouldMatch("Test_MH2/.*::test \\(3 bytes\\) made not entrant") - .shouldMatch("Test_MH3/.*::test \\(3 bytes\\) made not entrant") -@@ -191,7 +197,7 @@ - results.shouldMatch("Test_MT1/.*::test \\(3 bytes\\)$") - .shouldMatch("Test_MT2/.*::test \\(3 bytes\\)$"); - -- if (isC1 && Platform.isAArch64()) { // no code patching -+ if (isC1 && (Platform.isAArch64() || Platform.isLoongArch64())) { // no code patching - results.shouldMatch("Test_MT1/.*::test \\(3 bytes\\) made not entrant") - .shouldMatch("Test_MT2/.*::test \\(3 bytes\\) made not entrant"); - } else { -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java jdk17u-ls/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java ---- openjdk/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2023-11-01 10:27:45.045761764 +0800 +diff --git a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java +index 689c7c8cc..f734c1baa 100644 +--- a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java ++++ b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java @@ -21,6 +21,12 @@ * questions. */ @@ -123668,7 +121869,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile package compiler.testlibrary.sha.predicate; import jdk.test.lib.Platform; -@@ -61,30 +67,35 @@ +@@ -61,19 +67,22 @@ public class IntrinsicPredicates { public static final BooleanSupplier MD5_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", null, null), @@ -123681,17 +121882,19 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile public static final BooleanSupplier SHA1_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha1" }, null), + new OrPredicate(new CPUSpecificPredicate("riscv64.*", new String[] { "sha1" }, null), new OrPredicate(new CPUSpecificPredicate("s390.*", new String[] { "sha1" }, null), + // Basic instructions are used to implement SHA1 Intrinsics on LA, so "sha1" feature is not needed. + new OrPredicate(new CPUSpecificPredicate("loongarch64.*", null, null), // x86 variants new OrPredicate(new CPUSpecificPredicate("amd64.*", new String[] { "sha" }, null), new OrPredicate(new CPUSpecificPredicate("i386.*", new String[] { "sha" }, null), -- new CPUSpecificPredicate("x86.*", new String[] { "sha" }, null))))); -+ new CPUSpecificPredicate("x86.*", new String[] { "sha" }, null)))))); +- new CPUSpecificPredicate("x86.*", new String[] { "sha" }, null)))))); ++ new CPUSpecificPredicate("x86.*", new String[] { "sha" }, null))))))); public static final BooleanSupplier SHA256_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha256" }, null), +@@ -81,12 +90,14 @@ public class IntrinsicPredicates { new OrPredicate(new CPUSpecificPredicate("s390.*", new String[] { "sha256" }, null), new OrPredicate(new CPUSpecificPredicate("ppc64.*", new String[] { "sha" }, null), new OrPredicate(new CPUSpecificPredicate("ppc64le.*", new String[] { "sha" }, null), @@ -123702,223 +121905,42 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/compile new OrPredicate(new CPUSpecificPredicate("i386.*", new String[] { "sha" }, null), new OrPredicate(new CPUSpecificPredicate("x86.*", new String[] { "sha" }, null), new OrPredicate(new CPUSpecificPredicate("amd64.*", new String[] { "avx2", "bmi2" }, null), -- new CPUSpecificPredicate("x86_64", new String[] { "avx2", "bmi2" }, null))))))))); -+ new CPUSpecificPredicate("x86_64", new String[] { "avx2", "bmi2" }, null)))))))))); +- new CPUSpecificPredicate("x86_64", new String[] { "avx2", "bmi2" }, null)))))))))); ++ new CPUSpecificPredicate("x86_64", new String[] { "avx2", "bmi2" }, null))))))))))); public static final BooleanSupplier SHA512_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha512" }, null), -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/loongson/25443/Test25443.java jdk17u-ls/test/hotspot/jtreg/loongson/25443/Test25443.java ---- openjdk/test/hotspot/jtreg/loongson/25443/Test25443.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/loongson/25443/Test25443.java 2023-09-08 09:39:53.233845808 +0800 -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+/** -+ * @test -+ * @summary test c2 or2s -+ * -+ * @run main/othervm -Xcomp -XX:-TieredCompilation Test25443 -+ */ -+public class Test25443 { -+ static short test_ori2s(int v1) { -+ short t = (short)(v1 | 0x14); -+ return t; -+ } -+ -+ static short test_or2s(int v1, int v2) { -+ short t = (short)(v1 | v2); -+ return t; -+ } -+ -+ static short ret; -+ public static void main(String[] args) { -+ for (int i = 0; i < 12000; i++) { //warmup -+ test_ori2s(0x333300); -+ test_or2s(0x333300, 0x14); -+ } -+ -+ if ( (test_ori2s(0x333300) == 0x3314) -+ && (test_or2s(0x333300, 0x14) == 0x3314) -+ && (test_or2s(0x333300, 0x1000) == 0x3300) -+ && (test_or2s(0x333300, 0x8000) == 0xffffb300)) { -+ System.out.println("TEST PASSED"); -+ } else { -+ throw new AssertionError("Not be expected results"); -+ } -+ } -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/loongson/7432/Test7423.java jdk17u-ls/test/hotspot/jtreg/loongson/7432/Test7423.java ---- openjdk/test/hotspot/jtreg/loongson/7432/Test7423.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/loongson/7432/Test7423.java 2023-09-08 09:39:53.233845808 +0800 -@@ -0,0 +1,61 @@ -+/* -+ * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+/** -+ * @test -+ * @summary Divide by zero -+ * -+ * @run main/othervm -Xint Test7423 -+ * @run main/othervm -Xcomp Test7423 -+ */ -+public class Test7423 { -+ -+ private static int divInt(int n) { -+ int a = 1 / n; -+ return a; -+ } -+ -+ private static long divLong(long n) { -+ long a = (long)1 / n; -+ return a; -+ } -+ -+ public static void main(String[] args) throws Exception { -+ -+ try { -+ for (int i = 0; i < 20000; i++) { -+ if (i == 18000) { -+ divInt(0); -+ divLong((long)0); -+ } else { -+ divInt(1); -+ divLong((long)1); -+ } -+ } -+ } catch (java.lang.ArithmeticException exc) { -+ System.out.println("expected-exception " + exc); -+ } -+ } -+ -+} -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/ProblemList.txt jdk17u-ls/test/hotspot/jtreg/ProblemList.txt ---- openjdk/test/hotspot/jtreg/ProblemList.txt 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/ProblemList.txt 2023-11-01 10:27:44.989761697 +0800 +diff --git a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java +index 36f74d01b..035b91b9d 100644 +--- a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java ++++ b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java @@ -21,6 +21,12 @@ - # questions. - # - -+# -+# This file has been modified by Loongson Technology in 2022. These -+# modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# -+ - ############################################################################# - # - # List of quarantined tests -- tests that should not be run by default, because -@@ -166,3 +172,40 @@ - vmTestbase/nsk/jdwp/ThreadReference/ForceEarlyReturn/forceEarlyReturn001/forceEarlyReturn001.java 7199837 generic-all - - ############################################################################# -+ -+# loongson added -+compiler/arraycopy/stress/TestStressArrayCopy.java generic-mips64el -+compiler/intrinsics/math/MaxMinOptimizeTest.java #19808 generic-mips64el -+compiler/runtime/TestConstantsInError.java generic-mips64el -+containers/cgroup/PlainRead.java #20028 generic-mips64el -+runtime/cds/appcds/dynamicArchive/OldClassAndInf.java #24451 generic-all -+runtime/NMT/CheckForProperDetailStackTrace.java #9499 generic-mips64el,generic-loongarch64 -+serviceability/sa/CDSJMapClstats.java #9797 generic-mips64el -+serviceability/sa/ClhsdbCDSCore.java #9797 generic-mips64el -+serviceability/sa/ClhsdbCDSJstackPrintAll.java #9797 generic-mips64el -+serviceability/sa/ClhsdbDumpheap.java #9797 generic-mips64el -+serviceability/sa/ClhsdbInspect.java #9797 generic-mips64el -+serviceability/sa/ClhsdbJdis.java #9797 generic-mips64el -+serviceability/sa/ClhsdbJstack.java#id0 #9797 generic-mips64el -+serviceability/sa/ClhsdbJstack.java#id1 #9797 generic-mips64el -+serviceability/sa/ClhsdbJstackXcompStress.java #10632 generic-mips64el,generic-loongarch64 -+serviceability/sa/ClhsdbPmap.java#id1 #19525 generic-mips64el -+serviceability/sa/ClhsdbPrintAs.java #9797 generic-mips64el -+serviceability/sa/ClhsdbPstack.java#id0 #9797 generic-mips64el -+serviceability/sa/ClhsdbPstack.java#id1 #19525 generic-mips64el,generic-loongarch64 -+serviceability/sa/ClhsdbSource.java #9797 generic-mips64el -+serviceability/sa/ClhsdbThread.java #9797 generic-mips64el -+serviceability/sa/ClhsdbWhere.java #9797 generic-mips64el -+serviceability/sa/DeadlockDetectionTest.java #9797 generic-mips64el -+serviceability/sa/JhsdbThreadInfoTest.java #9797 generic-mips64el -+serviceability/sa/jmap-hprof/JMapHProfLargeHeapTest.java #9797 generic-mips64el -+serviceability/sa/sadebugd/DebugdConnectTest.java #9797 generic-mips64el -+serviceability/sa/sadebugd/RunCommandOnServerTest.java #19812 generic-mips64el -+serviceability/sa/TestClhsdbJstackLock.java #9797 generic-mips64el -+serviceability/sa/TestHeapDumpForInvokeDynamic.java #9797 generic-mips64el -+serviceability/sa/TestInstanceKlassSize.java #9797 generic-mips64el -+serviceability/sa/TestJhsdbJstackLock.java #9797 generic-mips64el -+serviceability/sa/TestJhsdbJstackMixed.java #9797 generic-mips64el -+serviceability/sa/TestJmapCore.java #9797 generic-mips64el -+serviceability/sa/TestJmapCoreMetaspace.java #9797 generic-mips64el -+serviceability/sa/TestPrintMdo.java #9797 generic-mips64el -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java jdk17u-ls/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java ---- openjdk/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java 2023-11-01 10:27:45.081761807 +0800 -@@ -22,6 +22,12 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2021, These + * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test ReservedStackTest * - * @requires vm.opt.DeoptimizeALot != true -@@ -240,7 +246,7 @@ +@@ -240,7 +246,8 @@ public class ReservedStackTest { return Platform.isAix() || (Platform.isLinux() && (Platform.isPPC() || Platform.isS390x() || Platform.isX64() || -- Platform.isX86() || Platform.isAArch64())) || -+ Platform.isX86() || Platform.isAArch64() || Platform.isMIPS() || Platform.isLoongArch64())) || +- Platform.isX86() || Platform.isAArch64() || Platform.isRISCV64())) || ++ Platform.isX86() || Platform.isAArch64() || Platform.isRISCV64() || ++ Platform.isMIPS() || Platform.isLoongArch64())) || Platform.isOSX(); } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java jdk17u-ls/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java ---- openjdk/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java 2022-10-13 03:49:21.000000000 +0800 -+++ jdk17u-ls/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java 2023-11-01 10:27:45.117761850 +0800 +diff --git a/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java b/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java +index 26dd3514e..2818343ec 100644 +--- a/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java ++++ b/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java @@ -21,6 +21,12 @@ * questions. */ @@ -123932,7 +121954,7 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/testlib package ir_framework.tests; import compiler.lib.ir_framework.*; -@@ -207,7 +213,7 @@ +@@ -215,7 +221,7 @@ public class TestIRMatching { runCheck(BadFailOnConstraint.create(Membar.class, "membar()", 1, "MemBar")); String cmp; @@ -123941,311 +121963,290 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/hotspot/jtreg/testlib cmp = "CMP"; } else if (Platform.isS390x()){ cmp = "CLFI"; -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/jdk/jfr/event/os/TestCPUInformation.java jdk17u-ls/test/jdk/jdk/jfr/event/os/TestCPUInformation.java ---- openjdk/test/jdk/jdk/jfr/event/os/TestCPUInformation.java 2022-10-13 03:49:23.000000000 +0800 -+++ jdk17u-ls/test/jdk/jdk/jfr/event/os/TestCPUInformation.java 2023-11-01 10:27:45.289762056 +0800 +diff --git a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java +index 168631895..e2f3a1347 100644 +--- a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java ++++ b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java @@ -21,6 +21,12 @@ * questions. */ +/* -+ * This file has been modified by Loongson Technology in 2021, These -+ * modifications are Copyright (c) 2021, Loongson Technology, and are made ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + - package jdk.jfr.event.os; + package nsk.share.jdi; - import java.util.List; -@@ -52,8 +58,8 @@ - Events.assertField(event, "hwThreads").atLeast(1); - Events.assertField(event, "cores").atLeast(1); - Events.assertField(event, "sockets").atLeast(1); -- Events.assertField(event, "cpu").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "s390"); -- Events.assertField(event, "description").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "s390"); -+ Events.assertField(event, "cpu").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "s390", "MIPS", "LoongArch"); -+ Events.assertField(event, "description").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "s390", "MIPS", "LoongArch"); - } - } - } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/ProblemList.txt jdk17u-ls/test/jdk/ProblemList.txt ---- openjdk/test/jdk/ProblemList.txt 2022-10-13 03:49:22.000000000 +0800 -+++ jdk17u-ls/test/jdk/ProblemList.txt 2023-11-01 10:27:45.157761898 +0800 -@@ -21,6 +21,12 @@ - # or visit www.oracle.com if you need additional information or have any - # questions. - # -+ -+# -+# This file has been modified by Loongson Technology in 2022. These -+# modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# - ########################################################################### - # - # List of tests that should not be run by test/Makefile, for various reasons: -@@ -863,3 +869,42 @@ + import nsk.share.*; +@@ -520,21 +526,22 @@ class CheckedFeatures { + * available only on the Microsoft Windows platform. + * " + */ +- {"linux-i586", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-ia64", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-amd64", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-x64", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-aarch64", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-arm", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-ppc64", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-ppc64le", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-s390x", "com.sun.jdi.SharedMemoryAttach"}, +- {"linux-riscv64", "com.sun.jdi.SharedMemoryAttach"}, +- {"macosx-amd64", "com.sun.jdi.SharedMemoryAttach"}, +- {"mac-x64", "com.sun.jdi.SharedMemoryAttach"}, +- {"macosx-aarch64", "com.sun.jdi.SharedMemoryAttach"}, +- {"mac-aarch64", "com.sun.jdi.SharedMemoryAttach"}, +- {"aix-ppc64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-i586", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-ia64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-amd64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-x64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-aarch64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-arm", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-ppc64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-ppc64le", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-s390x", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-riscv64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"linux-loongarch64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"macosx-amd64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"mac-x64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"macosx-aarch64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"mac-aarch64", "com.sun.jdi.SharedMemoryAttach"}, ++ {"aix-ppc64", "com.sun.jdi.SharedMemoryAttach"}, + // listening connectors + /* +@@ -546,21 +553,22 @@ class CheckedFeatures { + * It is available only on the Microsoft Windows platform. + * " + */ +- {"linux-i586", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-ia64", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-amd64", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-x64", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-aarch64", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-arm", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-ppc64", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-ppc64le", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-s390x", "com.sun.jdi.SharedMemoryListen"}, +- {"linux-riscv64", "com.sun.jdi.SharedMemoryListen"}, +- {"macosx-amd64", "com.sun.jdi.SharedMemoryListen"}, +- {"mac-x64", "com.sun.jdi.SharedMemoryListen"}, +- {"macosx-aarch64", "com.sun.jdi.SharedMemoryListen"}, +- {"mac-aarch64", "com.sun.jdi.SharedMemoryListen"}, +- {"aix-ppc64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-i586", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-ia64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-amd64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-x64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-aarch64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-arm", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-ppc64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-ppc64le", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-s390x", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-riscv64", "com.sun.jdi.SharedMemoryListen"}, ++ {"linux-loongarch64", "com.sun.jdi.SharedMemoryListen"}, ++ {"macosx-amd64", "com.sun.jdi.SharedMemoryListen"}, ++ {"mac-x64", "com.sun.jdi.SharedMemoryListen"}, ++ {"macosx-aarch64", "com.sun.jdi.SharedMemoryListen"}, ++ {"mac-aarch64", "com.sun.jdi.SharedMemoryListen"}, ++ {"aix-ppc64", "com.sun.jdi.SharedMemoryListen"}, - ############################################################################ -+# loongson added -+com/sun/management/OperatingSystemMXBean/TestTotalSwap.java generic-x64 -+java/awt/font/GlyphVector/NLGlyphTest.java #21476 generic-all -+java/lang/StrictMath/Expm1Tests.java #13364 generic-mips64el -+java/lang/StrictMath/Log10Tests.java #13364 generic-mips64el -+java/rmi/server/UnicastRemoteObject/exportObject/GcDuringExport.java #10949 generic-mips64el,generic-loongarch64 -+javax/swing/text/html/parser/Parser/8078268/bug8078268.java #19071 generic-mips64el,generic-loongarch64 -+jdk/jfr/jcmd/TestJcmdStartWithSettings.java #24259 generic-mips64el,generic-loongarch64 -+jdk/internal/platform/cgroup/TestCgroupMetrics.java #19886 generic-mips64el -+security/infra/java/security/cert/CertPathValidator/certification/LetsEncryptCA.java #20115 generic-all -+sun/security/pkcs11/Secmod/AddTrustedCert.java #10583 generic-mips64,generic-x64 -+sun/tools/jhsdb/BasicLauncherTest.java #9381 generic-mips64el,generic-loongarch64 -+sun/tools/jhsdb/HeapDumpTest.java #9381 generic-mips64el,generic-loongarch64 -+sun/tools/jhsdb/HeapDumpTestWithActiveProcess.java #9381 generic-mips64el,generic-loongarch64 -+sun/tools/jhsdb/JShellHeapDumpTest.java #23705 generic-mips64el -+sun/tools/jhsdb/JStackStressTest.java #9381 generic-mips64el,generic-loongarch64 -+tools/jpackage/linux/AppAboutUrlTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/linux/AppCategoryTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/jdk/jpackage/tests/UsrTreeTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/LicenseTypeTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/LinuxBundleNameTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/LinuxResourceTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/PackageDepsTest.java #24942 generic-loongarch64 -+tools/jpackage/linux/ReleaseTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/linux/ShortcutHintTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/AddLauncherTest.java#id1 #24942 generic-loongarch64 -+tools/jpackage/share/AddLShortcutTest.java #24942 generic-loongarch64 -+tools/jpackage/share/AppContentTest.java #24942 generic-loongarch64 -+tools/jpackage/share/AppImagePackageTest.java #24942 generic-loongarch64 -+tools/jpackage/share/AppLauncherEnvTest.java #23520 generic-loongarch64 -+tools/jpackage/share/EmptyFolderPackageTest.java #24942 generic-loongarch64 -+tools/jpackage/share/FileAssociationsTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/IconTest.java #24942 generic-loongarch64 -+tools/jpackage/share/InstallDirTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/jdk/jpackage/tests/VendorTest.java#id1 #24942 generic-loongarch64 -+tools/jpackage/share/MultiLauncherTwoPhaseTest.java #24942 generic-loongarch64 -+tools/jpackage/share/MultiNameTwoPhaseTest.java #24942 generic-loongarch64 -+tools/jpackage/share/RuntimePackageTest.java#id0 #24942 generic-loongarch64 -+tools/jpackage/share/SimplePackageTest.java #24942 generic-loongarch64 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/ProblemList-Xcomp.txt jdk17u-ls/test/jdk/ProblemList-Xcomp.txt ---- openjdk/test/jdk/ProblemList-Xcomp.txt 2022-10-13 03:49:22.000000000 +0800 -+++ jdk17u-ls/test/jdk/ProblemList-Xcomp.txt 2023-09-08 09:39:54.321847238 +0800 -@@ -21,6 +21,12 @@ - # questions. - # + // launching connectors + /* +@@ -575,78 +583,82 @@ class CheckedFeatures { + * Windows, the shared memory transport is used. On Linux the socket transport is used. + * " + */ +- {"linux-i586", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-i586", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-i586", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-i586", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ ++ {"linux-ia64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-ia64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, -+# -+# This file has been modified by Loongson Technology in 2022. These -+# modifications are Copyright (c) 2020, 2022, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# -+ - ############################################################################# - # - # List of quarantined tests for testing in Xcomp mode. -@@ -28,3 +34,67 @@ - ############################################################################# +- {"linux-ia64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-ia64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-amd64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-amd64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, - java/lang/invoke/MethodHandles/CatchExceptionTest.java 8146623 generic-all -+ -+# loongson added -+com/sun/jndi/dns/ConfigTests/PortUnreachable.java generic-mips64el,generic-loongarch64 -+com/sun/jndi/dns/ConfigTests/Timeout.java generic-mips64el,generic-loongarch64 -+com/sun/jndi/ldap/LdapCBPropertiesTest.java generic-mips64el,generic-loongarch64 -+com/sun/jndi/ldap/NamingExceptionMessageTest.java generic-mips64el,generic-loongarch64 -+com/sun/net/httpserver/bugs/6725892/Test.java generic-mips64el,generic-loongarch64 -+com/sun/net/httpserver/bugs/B6393710.java generic-all -+com/sun/net/httpserver/bugs/B6401598.java generic-all -+com/sun/net/httpserver/bugs/B6529200.java generic-all -+com/sun/net/httpserver/Test10.java generic-all -+com/sun/net/httpserver/Test1.java generic-all -+jdk/jfr/api/consumer/TestRecordedFullStackTrace.java generic-all -+jdk/jfr/api/metadata/eventtype/TestUnloadingEventClass.java generic-all -+jdk/jfr/event/compiler/TestCompilerInlining.java generic-all -+jdk/jfr/event/compiler/TestDeoptimization.java generic-all -+jdk/jfr/event/profiling/TestFullStackTrace.java generic-all -+jdk/security/logging/TestTLSHandshakeLog.java #24512 generic-mips64el,generic-loongarch64 -+java/foreign/TestMismatch.java #17281 generic-mips64el -+java/foreign/TestResourceScope.java #24568 generic-mips64el,generic-loongarch64 -+java/net/httpclient/TimeoutOrdering.java generic-mips64el,generic-loongarch64 -+java/net/httpclient/ManyRequests2.java generic-mips64el,generic-loongarch64 -+java/net/httpclient/MaxStreams.java generic-mips64el,generic-loongarch64 -+java/net/Socket/DeadlockTest.java generic-mips64el,generic-loongarch64 -+java/net/Socket/RejectIPv6.java generic-mips64el -+java/net/URLClassLoader/HttpTest.java generic-mips64el -+java/net/URLConnection/ChunkedEncoding.java generic-mips64el,generic-loongarch64 -+java/net/URLConnection/ZeroContentLength.java generic-mips64el,generic-loongarch64 -+java/nio/channels/spi/SelectorProvider/inheritedChannel/InheritedChannelTest.java generic-mips64el,generic-loongarch64 -+java/nio/file/Files/CheckPermissions.java #9588 generic-mips64el,generic-loongarch64 -+java/rmi/server/RemoteServer/AddrInUse.java #24512 generic-mips64el,generic-loongarch64 -+java/rmi/server/RMISocketFactory/useSocketFactory/registry/UseCustomSocketFactory.java #24512 generic-mips64el,generic-loongarch64 -+java/rmi/server/RMISocketFactory/useSocketFactory/unicast/UseCustomSocketFactory.java #24512 generic-mips64el,generic-loongarch64 -+java/rmi/server/Unreferenced/leaseCheckInterval/LeaseCheckInterval.java #24512 generic-mips64el,generic-loongarch64 -+java/rmi/transport/acceptLoop/CloseServerSocketOnTermination.java #24512 generic-mips64el,generic-loongarch64 -+javax/net/ssl/ServerName/SSLSocketSNISensitive.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/SSLSession/SessionCacheSizeTests.java #24512 generic-mips64el,generic-loongarch64 -+javax/net/ssl/SSLSession/SessionTimeOutTests.java #24512 generic-mips64el,generic-loongarch64 -+javax/net/ssl/Stapling/HttpsUrlConnClient.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/Stapling/SSLEngineWithStapling.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/Stapling/SSLSocketWithStapling.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/Stapling/StapleEnableProps.java generic-mips64el,generic-loongarch64 -+javax/net/ssl/TLSCommon/TestSessionLocalPrincipal.java generic-mips64el -+sun/net/ftp/TestFtpTimeValue.java #19889 generic-all -+sun/net/InetAddress/nameservice/simple/DefaultCaching.java generic-mips64el -+sun/net/www/http/HttpClient/B8209178.java generic-all -+sun/net/www/protocol/http/AsyncDisconnect.java generic-mips64el,generic-loongarch64 -+sun/net/www/protocol/https/HttpsURLConnection/CookieHttpsClientTest.java generic-mips64el -+sun/net/www/protocol/https/HttpsURLConnection/ReadTimeout.java generic-loongarch64 -+sun/security/krb5/auto/NullRenewUntil.java #24512 generic-mips64el,generic-loongarch64 -+sun/security/krb5/auto/Unreachable.java generic-mips64el -+sun/security/ssl/CipherSuite/RestrictNamedGroup.java generic-mips64el -+sun/security/ssl/SSLSocketImpl/ClientSocketCloseHang.java generic-loongarch64 -+sun/security/ssl/SignatureScheme/CustomizedClientSchemes.java generic-mips64el -+sun/security/ssl/SignatureScheme/CustomizedServerSchemes.java generic-mips64el -+sun/security/ssl/SignatureScheme/SigAlgosExtTestWithTLS13.java generic-mips64el -+sun/security/ssl/SSLLogger/LoggingFormatConsistency.java generic-mips64el -+sun/security/ssl/SSLSocketImpl/DisableExtensions.java generic-mips64el -+sun/security/ssl/SSLSocketImpl/IgnorableExceptionMessages.java #24512 generic-mips64el,generic-loongarch64 -+sun/security/ssl/SSLSocketImpl/SSLSocketBruceForceClose.java generic-mips64el,generic-loongarch64 -+sun/security/ssl/SSLSocketImpl/SSLSocketCloseHang.java generic-mips64el,generic-loongarch64 -+sun/security/ssl/Stapling/StatusResponseManager.java generic-mips64el,generic-loongarch64 -+tools/jar/compat/CLICompatibility.java generic-mips64el,generic-loongarch64 -+tools/jar/compat/CLICpatibility.java generic-all -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/PKCS11Test.java jdk17u-ls/test/jdk/sun/security/pkcs11/PKCS11Test.java ---- openjdk/test/jdk/sun/security/pkcs11/PKCS11Test.java 2022-10-13 03:49:23.000000000 +0800 -+++ jdk17u-ls/test/jdk/sun/security/pkcs11/PKCS11Test.java 2023-11-01 10:27:45.305762075 +0800 -@@ -21,6 +21,12 @@ - * questions. - */ +- {"linux-amd64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-amd64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-x64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-x64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - // common infrastructure for SunPKCS11 tests +- {"linux-x64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-x64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-aarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-aarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, - import java.io.ByteArrayOutputStream; -@@ -693,6 +699,9 @@ - "/usr/lib64/" }); - osMap.put("Linux-ppc64-64", new String[] { "/usr/lib64/" }); - osMap.put("Linux-ppc64le-64", new String[] { "/usr/lib64/" }); -+ osMap.put("Linux-mips64el-64", new String[]{"/usr/lib64/"}); -+ osMap.put("Linux-loongarch64-64", new String[]{"/usr/lib/loongarch64-linux-gnu/", -+ "/usr/lib64/" }); - osMap.put("Linux-s390x-64", new String[] { "/usr/lib64/" }); - osMap.put("Windows-x86-32", new String[] {}); - osMap.put("Windows-amd64-64", new String[] {}); -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java jdk17u-ls/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java ---- openjdk/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java 2022-10-13 03:49:24.000000000 +0800 -+++ jdk17u-ls/test/jdk/sun/security/pkcs11/sslecc/ClientJSSEServerJSSE.java 2023-09-08 09:39:55.861849263 +0800 -@@ -34,9 +34,9 @@ - * @library /test/lib .. ../../../../javax/net/ssl/TLSCommon - * @library ../../../../java/security/testlibrary - * @modules jdk.crypto.cryptoki -- * @run main/othervm -Djdk.tls.namedGroups="secp256r1" -+ * @run main/othervm -Djdk.tls.namedGroups="secp256r1,sect193r1" - * ClientJSSEServerJSSE -- * @run main/othervm -Djdk.tls.namedGroups="secp256r1" -+ * @run main/othervm -Djdk.tls.namedGroups="secp256r1,sect193r1" - * ClientJSSEServerJSSE sm policy - */ +- {"linux-aarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-aarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-arm", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-arm", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/langtools/ProblemList.txt jdk17u-ls/test/langtools/ProblemList.txt ---- openjdk/test/langtools/ProblemList.txt 2022-10-13 03:49:23.000000000 +0800 -+++ jdk17u-ls/test/langtools/ProblemList.txt 2023-11-01 10:27:45.325762099 +0800 -@@ -21,6 +21,12 @@ - # or visit www.oracle.com if you need additional information or have any - # questions. - # -+ -+# -+# This file has been modified by Loongson Technology in 2021. These -+# modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made -+# available on the same license terms set forth above. -+# - ########################################################################### +- {"linux-arm", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-arm", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-ppc64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-ppc64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, - ########################################################################### -@@ -72,3 +78,5 @@ - # - # jdeps +- {"linux-ppc64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-ppc64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-ppc64le", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-ppc64le", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, -+# loongson added -+jdk/jshell/ToolBasicTest.java #23126 generic-mips64el,generic-loongarch64 -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/langtools/ProblemList-Xcomp.txt jdk17u-ls/test/langtools/ProblemList-Xcomp.txt ---- openjdk/test/langtools/ProblemList-Xcomp.txt 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/test/langtools/ProblemList-Xcomp.txt 2023-09-08 09:39:56.001849447 +0800 -@@ -0,0 +1,33 @@ -+# -+# Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. -+# Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. -+# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+# -+# This code is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License version 2 only, as -+# published by the Free Software Foundation. -+# -+# This code is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+# version 2 for more details (a copy is included in the LICENSE file that -+# accompanied this code). -+# -+# You should have received a copy of the GNU General Public License version -+# 2 along with this work; if not, write to the Free Software Foundation, -+# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+# -+# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+# or visit www.oracle.com if you need additional information or have any -+# questions. -+# -+ -+############################################################################# -+# loongson added -+jdk/jshell/JdiBadOptionLaunchExecutionControlTest.java generic-mips64el -+jdk/jshell/JdiFailingLaunchExecutionControlTest.java #25693 generic-mips64el,generic-loongarch64 -+jdk/jshell/JdiFailingListenExecutionControlTest.java #25693 generic-mips64el,generic-loongarch64 -+jdk/jshell/JdiHangingLaunchExecutionControlTest.java #25693 generic-mips64el,generic-loongarch64 -+jdk/jshell/JdiHangingListenExecutionControlTest.java #25693 generic-mips64el,generic-loongarch64 -+jdk/jshell/ToolTabSnippetTest.java #24512 generic-mips64el,generic-loongarch64 -+tools/javac/Paths/Diagnostics.sh generic-mips64el -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/lib/jdk/test/lib/Platform.java jdk17u-ls/test/lib/jdk/test/lib/Platform.java ---- openjdk/test/lib/jdk/test/lib/Platform.java 2022-10-13 03:49:24.000000000 +0800 -+++ jdk17u-ls/test/lib/jdk/test/lib/Platform.java 2023-11-01 10:27:45.353762133 +0800 +- {"linux-ppc64le", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-ppc64le", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-s390x", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-s390x", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"linux-s390x", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-s390x", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-riscv64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-riscv64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"linux-riscv64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"linux-riscv64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"linux-loongarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"linux-loongarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"windows-i586", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, +- {"windows-i586", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, ++ {"windows-i586", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, ++ {"windows-i586", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, + +- {"windows-ia64", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, +- {"windows-ia64", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, ++ {"windows-ia64", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, ++ {"windows-ia64", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, + +- {"windows-amd64", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, +- {"windows-amd64", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, ++ {"windows-amd64", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, ++ {"windows-amd64", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, + +- {"windows-x64", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, +- {"windows-x64", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, ++ {"windows-x64", "com.sun.jdi.CommandLineLaunch", "dt_socket"}, ++ {"windows-x64", "com.sun.jdi.RawCommandLineLaunch", "dt_socket"}, + +- {"macosx-amd64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"macosx-amd64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"macosx-amd64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"macosx-amd64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"mac-x64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"mac-x64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"mac-x64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"mac-x64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"macosx-aarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"macosx-aarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"macosx-aarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"macosx-aarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"mac-aarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"mac-aarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"mac-aarch64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"mac-aarch64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + +- {"aix-ppc64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, +- {"aix-ppc64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, ++ {"aix-ppc64", "com.sun.jdi.CommandLineLaunch", "dt_shmem"}, ++ {"aix-ppc64", "com.sun.jdi.RawCommandLineLaunch", "dt_shmem"}, + + // shared memory transport is implemented only on windows platform +- {"linux-i586", "dt_shmem"}, +- {"linux-ia64", "dt_shmem"}, +- {"linux-amd64", "dt_shmem"}, +- {"linux-x64", "dt_shmem"}, +- {"linux-aarch64", "dt_shmem"}, +- {"linux-arm", "dt_shmem"}, +- {"linux-ppc64", "dt_shmem"}, +- {"linux-ppc64le", "dt_shmem"}, +- {"linux-s390x", "dt_shmem"}, +- {"linux-riscv64", "dt_shmem"}, +- {"macosx-amd64", "dt_shmem"}, +- {"mac-x64", "dt_shmem"}, +- {"macosx-aarch64", "dt_shmem"}, +- {"mac-aarch64", "dt_shmem"}, +- {"aix-ppc64", "dt_shmem"}, ++ {"linux-i586", "dt_shmem"}, ++ {"linux-ia64", "dt_shmem"}, ++ {"linux-amd64", "dt_shmem"}, ++ {"linux-x64", "dt_shmem"}, ++ {"linux-aarch64", "dt_shmem"}, ++ {"linux-arm", "dt_shmem"}, ++ {"linux-ppc64", "dt_shmem"}, ++ {"linux-ppc64le", "dt_shmem"}, ++ {"linux-s390x", "dt_shmem"}, ++ {"linux-riscv64", "dt_shmem"}, ++ {"linux-loongarch64", "dt_shmem"}, ++ {"macosx-amd64", "dt_shmem"}, ++ {"mac-x64", "dt_shmem"}, ++ {"macosx-aarch64", "dt_shmem"}, ++ {"mac-aarch64", "dt_shmem"}, ++ {"aix-ppc64", "dt_shmem"}, + }; + } +diff --git a/test/jdk/java/nio/channels/DatagramChannel/Disconnect.java b/test/jdk/java/nio/channels/DatagramChannel/Disconnect.java +index cdc5882fe..16120f851 100644 +--- a/test/jdk/java/nio/channels/DatagramChannel/Disconnect.java ++++ b/test/jdk/java/nio/channels/DatagramChannel/Disconnect.java +@@ -52,7 +52,7 @@ public class Disconnect { + if (IPSupport.hasIPv4()) { + // test with IPv4 only + try (DatagramChannel dc = DatagramChannel.open(StandardProtocolFamily.INET)) { +- InetAddress lo4 = InetAddress.ofLiteral("127.0.0.1"); ++ InetAddress lo4 = InetAddress.getByName("127.0.0.1"); + System.out.println("Testing with INET family and " + lo4); + test(dc, lo4); + test(dc, lo4); +@@ -62,7 +62,7 @@ public class Disconnect { + if (IPSupport.hasIPv6()) { + // test with IPv6 only + try (DatagramChannel dc = DatagramChannel.open(StandardProtocolFamily.INET6)) { +- InetAddress lo6 = InetAddress.ofLiteral("::1"); ++ InetAddress lo6 = InetAddress.getByName("::1"); + System.out.println("Testing with INET6 family and " + lo6); + test(dc, lo6); + test(dc, lo6); +diff --git a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java +index c51665800..913136a1f 100644 +--- a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java ++++ b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java @@ -21,6 +21,12 @@ * questions. */ +/* + * This file has been modified by Loongson Technology in 2021, These -+ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made ++ * modifications are Copyright (c) 2021, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + - package jdk.test.lib; - - import java.io.FileNotFoundException; -@@ -214,6 +220,14 @@ - return isArch("(i386)|(x86(?!_64))"); - } + package jdk.jfr.event.os; -+ public static boolean isMIPS() { -+ return isArch("mips.*"); -+ } -+ -+ public static boolean isLoongArch64() { -+ return isArch("loongarch64"); -+ } -+ - public static String getOsArch() { - return osArch; + import java.util.List; +@@ -52,8 +58,8 @@ public class TestCPUInformation { + Events.assertField(event, "hwThreads").atLeast(1); + Events.assertField(event, "cores").atLeast(1); + Events.assertField(event, "sockets").atLeast(1); +- Events.assertField(event, "cpu").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "RISCV64", "s390"); +- Events.assertField(event, "description").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "RISCV64", "s390"); ++ Events.assertField(event, "cpu").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "RISCV64", "s390", "MIPS", "LoongArch"); ++ Events.assertField(event, "description").containsAny("Intel", "AMD", "Unknown x86", "ARM", "PPC", "PowerPC", "AArch64", "RISCV64", "s390", "MIPS", "LoongArch"); + } } -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java jdk17u-ls/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java ---- openjdk/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java 2022-10-13 03:49:24.000000000 +0800 -+++ jdk17u-ls/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java 2023-11-01 10:27:45.349762128 +0800 -@@ -33,6 +33,12 @@ + } +diff --git a/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java b/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java +index e78e200ac..2b9fcc0ff 100644 +--- a/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java ++++ b/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java +@@ -33,6 +33,12 @@ import java.util.HashSet; import java.util.List; import java.util.Set; @@ -124258,83 +122259,44 @@ diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/lib-test/jdk/test/lib /** * @test * @summary Verify that for each group of mutually exclusive predicates defined -@@ -45,7 +51,7 @@ +@@ -45,7 +51,7 @@ import java.util.Set; */ public class TestMutuallyExclusivePlatformPredicates { private static enum MethodGroup { -- ARCH("isAArch64", "isARM", "isPPC", "isS390x", "isX64", "isX86"), -+ ARCH("isAArch64", "isARM", "isPPC", "isS390x", "isX64", "isX86", "isMIPS", "isLoongArch64"), +- ARCH("isAArch64", "isARM", "isRISCV64", "isPPC", "isS390x", "isX64", "isX86"), ++ ARCH("isAArch64", "isARM", "isRISCV64", "isPPC", "isS390x", "isX64", "isX86", "isMIPS", "isLoongArch64"), BITNESS("is32bit", "is64bit"), OS("isAix", "isLinux", "isOSX", "isWindows"), VM_TYPE("isClient", "isServer", "isMinimal", "isZero", "isEmbedded"), -diff -x '.git*' -x .jcheck -x .workflow -Naur openjdk/test/micro/org/openjdk/bench/loongarch/C2Memory.java jdk17u-ls/test/micro/org/openjdk/bench/loongarch/C2Memory.java ---- openjdk/test/micro/org/openjdk/bench/loongarch/C2Memory.java 1970-01-01 08:00:00.000000000 +0800 -+++ jdk17u-ls/test/micro/org/openjdk/bench/loongarch/C2Memory.java 2023-09-08 09:39:56.669850325 +0800 -@@ -0,0 +1,67 @@ +diff --git a/test/lib/jdk/test/lib/Platform.java b/test/lib/jdk/test/lib/Platform.java +index 2e2e16e65..64b42446e 100644 +--- a/test/lib/jdk/test/lib/Platform.java ++++ b/test/lib/jdk/test/lib/Platform.java +@@ -21,6 +21,12 @@ + * questions. + */ + +/* -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. ++ * This file has been modified by Loongson Technology in 2021, These ++ * modifications are Copyright (c) 2019, 2021, Loongson Technology, and are made ++ * available on the same license terms set forth above. + */ + -+package org.openjdk.bench.loongarch; -+ -+import org.openjdk.jmh.annotations.Benchmark; -+ -+public class C2Memory { -+ public static int sum; -+ public static int array1[] = new int[0x8000]; -+ public static int array2[] = new int[0x8000]; -+ -+ @Benchmark -+ public void testMethod() { -+ for (int i = 0; i<10000;i++) { -+ sum = array1[0x7fff] + array2[0x1f0]; -+ array1[0x7fff] += array2[0x1f0]; -+ } + package jdk.test.lib; + + import java.io.BufferedReader; +@@ -234,6 +240,14 @@ public class Platform { + return isArch("(i386)|(x86(?!_64))"); + } + ++ public static boolean isMIPS() { ++ return isArch("mips.*"); + } + -+ @Benchmark -+ public void testBasePosIndexOffset() { -+ int xstart = 30000; -+ long carry = 63; -+ -+ for (int j=xstart; j >= 0; j--) { -+ array2[j] = array1[xstart]; -+ } -+ -+ array2[xstart] = (int)carry; ++ public static boolean isLoongArch64() { ++ return isArch("loongarch64"); + } + -+ public static byte b_array1[] = new byte[0x8000]; -+ public static byte b_array2[] = new byte[0x8000]; -+ -+ @Benchmark -+ public void testBaseIndexOffset() { -+ int xstart = 10000; -+ byte carry = 63; -+ -+ for (int j=xstart; j >= 0; j--) { -+ b_array2[j] = b_array1[xstart]; -+ } -+ -+ b_array2[xstart] = carry; -+ } -+} + public static String getOsArch() { + return osArch; + }